1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
3 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core2 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3
4 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=pentium4 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
6 define <8 x i32> @sext_8i16_to_8i32(<8 x i16> %A) nounwind uwtable readnone ssp {
7 ; AVX1-LABEL: sext_8i16_to_8i32:
9 ; AVX1-NEXT: vpmovsxwd %xmm0, %xmm1
10 ; AVX1-NEXT: vmovhlps {{.*#+}} xmm0 = xmm0[1,1]
11 ; AVX1-NEXT: vpmovsxwd %xmm0, %xmm0
12 ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
15 ; AVX2-LABEL: sext_8i16_to_8i32:
17 ; AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
20 ; SSE-LABEL: sext_8i16_to_8i32:
22 ; SSE-NEXT: movdqa %xmm0, %xmm1
23 ; SSE-NEXT: ## kill: XMM0<def> XMM1<kill>
24 ; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
25 ; SSE-NEXT: pslld $16, %xmm0
26 ; SSE-NEXT: psrad $16, %xmm0
27 ; SSE-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
28 ; SSE-NEXT: pslld $16, %xmm1
29 ; SSE-NEXT: psrad $16, %xmm1
32 %B = sext <8 x i16> %A to <8 x i32>
36 define <4 x i64> @sext_4i32_to_4i64(<4 x i32> %A) nounwind uwtable readnone ssp {
37 ; AVX1-LABEL: sext_4i32_to_4i64:
39 ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1
40 ; AVX1-NEXT: vmovhlps {{.*#+}} xmm0 = xmm0[1,1]
41 ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0
42 ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
45 ; AVX2-LABEL: sext_4i32_to_4i64:
47 ; AVX2-NEXT: vpmovsxdq %xmm0, %ymm0
50 ; SSE-LABEL: sext_4i32_to_4i64:
52 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,0,1,0]
53 ; SSE-NEXT: movd %xmm1, %rax
55 ; SSE-NEXT: movd %rax, %xmm2
56 ; SSE-NEXT: punpckhqdq {{.*#+}} xmm1 = xmm1[1,1]
57 ; SSE-NEXT: movd %xmm1, %rax
59 ; SSE-NEXT: movd %rax, %xmm1
60 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm1[0]
61 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,0,3,0]
62 ; SSE-NEXT: movd %xmm0, %rax
64 ; SSE-NEXT: movd %rax, %xmm1
65 ; SSE-NEXT: punpckhqdq {{.*#+}} xmm0 = xmm0[1,1]
66 ; SSE-NEXT: movd %xmm0, %rax
68 ; SSE-NEXT: movd %rax, %xmm0
69 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
70 ; SSE-NEXT: movdqa %xmm2, %xmm0
73 %B = sext <4 x i32> %A to <4 x i64>
77 define <4 x i32> @load_sext_test1(<4 x i16> *%ptr) {
78 ; AVX-LABEL: load_sext_test1:
80 ; AVX-NEXT: vpmovsxwd (%rdi), %xmm0
83 ; SSE-LABEL: load_sext_test1:
85 ; SSE-NEXT: movq (%rdi), %xmm0
86 ; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
87 ; SSE-NEXT: psrad $16, %xmm0
90 %X = load <4 x i16>* %ptr
91 %Y = sext <4 x i16> %X to <4 x i32>
95 define <4 x i32> @load_sext_test2(<4 x i8> *%ptr) {
96 ; AVX-LABEL: load_sext_test2:
98 ; AVX-NEXT: vpmovsxbd (%rdi), %xmm0
101 ; SSSE3-LABEL: load_sext_test2:
103 ; SSSE3-NEXT: movd (%rdi), %xmm0
104 ; SSSE3-NEXT: pshufb {{.*#+}} xmm0 = zero,zero,zero,xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3]
105 ; SSSE3-NEXT: psrad $24, %xmm0
108 ; SSE2-LABEL: load_sext_test2:
110 ; SSE2-NEXT: movl (%rdi), %eax
111 ; SSE2-NEXT: movl %eax, %ecx
112 ; SSE2-NEXT: shll $8, %ecx
113 ; SSE2-NEXT: movd %eax, %xmm0
114 ; SSE2-NEXT: pextrw $1, %xmm0, %edx
115 ; SSE2-NEXT: pinsrw $1, %ecx, %xmm0
116 ; SSE2-NEXT: pinsrw $3, %eax, %xmm0
117 ; SSE2-NEXT: movl %edx, %eax
118 ; SSE2-NEXT: shll $8, %eax
119 ; SSE2-NEXT: pinsrw $5, %eax, %xmm0
120 ; SSE2-NEXT: pinsrw $7, %edx, %xmm0
121 ; SSE2-NEXT: psrad $24, %xmm0
123 %X = load <4 x i8>* %ptr
124 %Y = sext <4 x i8> %X to <4 x i32>
128 define <2 x i64> @load_sext_test3(<2 x i8> *%ptr) {
129 ; AVX-LABEL: load_sext_test3:
131 ; AVX-NEXT: vpmovsxbq (%rdi), %xmm0
134 ; SSE-LABEL: load_sext_test3:
136 ; SSE-NEXT: movsbq 1(%rdi), %rax
137 ; SSE-NEXT: movd %rax, %xmm1
138 ; SSE-NEXT: movsbq (%rdi), %rax
139 ; SSE-NEXT: movd %rax, %xmm0
140 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
142 %X = load <2 x i8>* %ptr
143 %Y = sext <2 x i8> %X to <2 x i64>
147 define <2 x i64> @load_sext_test4(<2 x i16> *%ptr) {
148 ; AVX-LABEL: load_sext_test4:
150 ; AVX-NEXT: vpmovsxwq (%rdi), %xmm0
153 ; SSE-LABEL: load_sext_test4:
155 ; SSE-NEXT: movswq 2(%rdi), %rax
156 ; SSE-NEXT: movd %rax, %xmm1
157 ; SSE-NEXT: movswq (%rdi), %rax
158 ; SSE-NEXT: movd %rax, %xmm0
159 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
161 %X = load <2 x i16>* %ptr
162 %Y = sext <2 x i16> %X to <2 x i64>
166 define <2 x i64> @load_sext_test5(<2 x i32> *%ptr) {
167 ; AVX-LABEL: load_sext_test5:
169 ; AVX-NEXT: vpmovsxdq (%rdi), %xmm0
172 ; SSE-LABEL: load_sext_test5:
174 ; SSE-NEXT: movslq 4(%rdi), %rax
175 ; SSE-NEXT: movd %rax, %xmm1
176 ; SSE-NEXT: movslq (%rdi), %rax
177 ; SSE-NEXT: movd %rax, %xmm0
178 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
180 %X = load <2 x i32>* %ptr
181 %Y = sext <2 x i32> %X to <2 x i64>
185 define <8 x i16> @load_sext_test6(<8 x i8> *%ptr) {
186 ; AVX-LABEL: load_sext_test6:
188 ; AVX-NEXT: vpmovsxbw (%rdi), %xmm0
191 ; SSE-LABEL: load_sext_test6:
193 ; SSE-NEXT: movq (%rdi), %xmm0
194 ; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
195 ; SSE-NEXT: psraw $8, %xmm0
197 %X = load <8 x i8>* %ptr
198 %Y = sext <8 x i8> %X to <8 x i16>
202 define <4 x i64> @sext_4i1_to_4i64(<4 x i1> %mask) {
203 ; AVX1-LABEL: sext_4i1_to_4i64:
205 ; AVX1-NEXT: vpslld $31, %xmm0, %xmm0
206 ; AVX1-NEXT: vpsrad $31, %xmm0, %xmm0
207 ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1
208 ; AVX1-NEXT: vmovhlps {{.*#+}} xmm0 = xmm0[1,1]
209 ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0
210 ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
213 ; AVX2-LABEL: sext_4i1_to_4i64:
215 ; AVX2-NEXT: vpslld $31, %xmm0, %xmm0
216 ; AVX2-NEXT: vpsrad $31, %xmm0, %xmm0
217 ; AVX2-NEXT: vpmovsxdq %xmm0, %ymm0
220 ; SSE-LABEL: sext_4i1_to_4i64:
222 ; SSE-NEXT: pslld $31, %xmm0
223 ; SSE-NEXT: psrad $31, %xmm0
224 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,0,1,0]
225 ; SSE-NEXT: movd %xmm1, %rax
227 ; SSE-NEXT: movd %rax, %xmm2
228 ; SSE-NEXT: punpckhqdq {{.*#+}} xmm1 = xmm1[1,1]
229 ; SSE-NEXT: movd %xmm1, %rax
231 ; SSE-NEXT: movd %rax, %xmm1
232 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm1[0]
233 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,0,3,0]
234 ; SSE-NEXT: movd %xmm0, %rax
236 ; SSE-NEXT: movd %rax, %xmm1
237 ; SSE-NEXT: punpckhqdq {{.*#+}} xmm0 = xmm0[1,1]
238 ; SSE-NEXT: movd %xmm0, %rax
240 ; SSE-NEXT: movd %rax, %xmm0
241 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
242 ; SSE-NEXT: movdqa %xmm2, %xmm0
244 %extmask = sext <4 x i1> %mask to <4 x i64>
245 ret <4 x i64> %extmask
248 define <16 x i16> @sext_16i8_to_16i16(<16 x i8> *%ptr) {
249 ; AVX1-LABEL: sext_16i8_to_16i16:
251 ; AVX1-NEXT: vmovdqa (%rdi), %xmm0
252 ; AVX1-NEXT: vpmovsxbw %xmm0, %xmm1
253 ; AVX1-NEXT: vmovhlps {{.*#+}} xmm0 = xmm0[1,1]
254 ; AVX1-NEXT: vpmovsxbw %xmm0, %xmm0
255 ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
258 ; AVX2-LABEL: sext_16i8_to_16i16:
260 ; AVX2-NEXT: vmovdqa (%rdi), %xmm0
261 ; AVX2-NEXT: vpmovsxbw %xmm0, %ymm0
264 ; SSE-LABEL: sext_16i8_to_16i16:
266 ; SSE-NEXT: movdqa (%rdi), %xmm1
267 ; SSE-NEXT: movdqa %xmm1, %xmm0
268 ; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
269 ; SSE-NEXT: psllw $8, %xmm0
270 ; SSE-NEXT: psraw $8, %xmm0
271 ; SSE-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15]
272 ; SSE-NEXT: psllw $8, %xmm1
273 ; SSE-NEXT: psraw $8, %xmm1
275 %X = load <16 x i8>* %ptr
276 %Y = sext <16 x i8> %X to <16 x i16>
280 define <4 x i64> @sext_4i8_to_4i64(<4 x i8> %mask) {
281 ; AVX1-LABEL: sext_4i8_to_4i64:
283 ; AVX1-NEXT: vpslld $24, %xmm0, %xmm0
284 ; AVX1-NEXT: vpsrad $24, %xmm0, %xmm0
285 ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1
286 ; AVX1-NEXT: vmovhlps {{.*#+}} xmm0 = xmm0[1,1]
287 ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0
288 ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
291 ; AVX2-LABEL: sext_4i8_to_4i64:
293 ; AVX2-NEXT: vpslld $24, %xmm0, %xmm0
294 ; AVX2-NEXT: vpsrad $24, %xmm0, %xmm0
295 ; AVX2-NEXT: vpmovsxdq %xmm0, %ymm0
298 ; SSE-LABEL: sext_4i8_to_4i64:
300 ; SSE-NEXT: pslld $24, %xmm0
301 ; SSE-NEXT: psrad $24, %xmm0
302 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,0,1,0]
303 ; SSE-NEXT: movd %xmm1, %rax
305 ; SSE-NEXT: movd %rax, %xmm2
306 ; SSE-NEXT: punpckhqdq {{.*#+}} xmm1 = xmm1[1,1]
307 ; SSE-NEXT: movd %xmm1, %rax
309 ; SSE-NEXT: movd %rax, %xmm1
310 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm1[0]
311 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,0,3,0]
312 ; SSE-NEXT: movd %xmm0, %rax
314 ; SSE-NEXT: movd %rax, %xmm1
315 ; SSE-NEXT: punpckhqdq {{.*#+}} xmm0 = xmm0[1,1]
316 ; SSE-NEXT: movd %xmm0, %rax
318 ; SSE-NEXT: movd %rax, %xmm0
319 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
320 ; SSE-NEXT: movdqa %xmm2, %xmm0
322 %extmask = sext <4 x i8> %mask to <4 x i64>
323 ret <4 x i64> %extmask
326 define <4 x i64> @load_sext_4i8_to_4i64(<4 x i8> *%ptr) {
327 ; AVX1-LABEL: load_sext_4i8_to_4i64:
329 ; AVX1-NEXT: vpmovsxbd (%rdi), %xmm0
330 ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1
331 ; AVX1-NEXT: vmovhlps {{.*#+}} xmm0 = xmm0[1,1]
332 ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0
333 ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
336 ; AVX2-LABEL: load_sext_4i8_to_4i64:
338 ; AVX2-NEXT: vpmovsxbq (%rdi), %ymm0
341 ; SSSE3-LABEL: load_sext_4i8_to_4i64:
343 ; SSSE3-NEXT: movd (%rdi), %xmm1
344 ; SSSE3-NEXT: pshufb {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
345 ; SSSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm1[0,0,1,0]
346 ; SSSE3-NEXT: movd %xmm2, %rax
347 ; SSSE3-NEXT: movsbq %al, %rax
348 ; SSSE3-NEXT: movd %rax, %xmm0
349 ; SSSE3-NEXT: punpckhqdq {{.*#+}} xmm2 = xmm2[1,1]
350 ; SSSE3-NEXT: movd %xmm2, %rax
351 ; SSSE3-NEXT: movsbq %al, %rax
352 ; SSSE3-NEXT: movd %rax, %xmm2
353 ; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
354 ; SSSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,0,3,0]
355 ; SSSE3-NEXT: movd %xmm2, %rax
356 ; SSSE3-NEXT: movsbq %al, %rax
357 ; SSSE3-NEXT: movd %rax, %xmm1
358 ; SSSE3-NEXT: punpckhqdq {{.*#+}} xmm2 = xmm2[1,1]
359 ; SSSE3-NEXT: movd %xmm2, %rax
360 ; SSSE3-NEXT: movsbq %al, %rax
361 ; SSSE3-NEXT: movd %rax, %xmm2
362 ; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
365 ; SSE2-LABEL: load_sext_4i8_to_4i64:
367 ; SSE2-NEXT: movl (%rdi), %eax
368 ; SSE2-NEXT: movd %eax, %xmm1
369 ; SSE2-NEXT: pextrw $1, %xmm1, %ecx
370 ; SSE2-NEXT: pinsrw $0, %eax, %xmm1
371 ; SSE2-NEXT: movzbl %ah, %eax
372 ; SSE2-NEXT: pinsrw $2, %eax, %xmm1
373 ; SSE2-NEXT: pinsrw $4, %ecx, %xmm1
374 ; SSE2-NEXT: shrl $8, %ecx
375 ; SSE2-NEXT: pinsrw $6, %ecx, %xmm1
376 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[0,0,1,0]
377 ; SSE2-NEXT: movd %xmm2, %rax
378 ; SSE2-NEXT: movsbq %al, %rax
379 ; SSE2-NEXT: movd %rax, %xmm0
380 ; SSE2-NEXT: punpckhqdq {{.*#+}} xmm2 = xmm2[1,1]
381 ; SSE2-NEXT: movd %xmm2, %rax
382 ; SSE2-NEXT: movsbq %al, %rax
383 ; SSE2-NEXT: movd %rax, %xmm2
384 ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
385 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,0,3,0]
386 ; SSE2-NEXT: movd %xmm2, %rax
387 ; SSE2-NEXT: movsbq %al, %rax
388 ; SSE2-NEXT: movd %rax, %xmm1
389 ; SSE2-NEXT: punpckhqdq {{.*#+}} xmm2 = xmm2[1,1]
390 ; SSE2-NEXT: movd %xmm2, %rax
391 ; SSE2-NEXT: movsbq %al, %rax
392 ; SSE2-NEXT: movd %rax, %xmm2
393 ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
395 %X = load <4 x i8>* %ptr
396 %Y = sext <4 x i8> %X to <4 x i64>
400 define <4 x i64> @load_sext_4i16_to_4i64(<4 x i16> *%ptr) {
401 ; AVX1-LABEL: load_sext_4i16_to_4i64:
403 ; AVX1-NEXT: vpmovsxwd (%rdi), %xmm0
404 ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1
405 ; AVX1-NEXT: vmovhlps {{.*#+}} xmm0 = xmm0[1,1]
406 ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0
407 ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
410 ; AVX2-LABEL: load_sext_4i16_to_4i64:
412 ; AVX2-NEXT: vpmovsxwq (%rdi), %ymm0
415 ; SSE-LABEL: load_sext_4i16_to_4i64:
417 ; SSE-NEXT: movq (%rdi), %xmm1
418 ; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
419 ; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm1[0,0,1,0]
420 ; SSE-NEXT: movd %xmm2, %rax
421 ; SSE-NEXT: movswq %ax, %rax
422 ; SSE-NEXT: movd %rax, %xmm0
423 ; SSE-NEXT: punpckhqdq {{.*#+}} xmm2 = xmm2[1,1]
424 ; SSE-NEXT: movd %xmm2, %rax
425 ; SSE-NEXT: movswq %ax, %rax
426 ; SSE-NEXT: movd %rax, %xmm2
427 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
428 ; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,0,3,0]
429 ; SSE-NEXT: movd %xmm2, %rax
430 ; SSE-NEXT: movswq %ax, %rax
431 ; SSE-NEXT: movd %rax, %xmm1
432 ; SSE-NEXT: punpckhqdq {{.*#+}} xmm2 = xmm2[1,1]
433 ; SSE-NEXT: movd %xmm2, %rax
434 ; SSE-NEXT: movswq %ax, %rax
435 ; SSE-NEXT: movd %rax, %xmm2
436 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
438 %X = load <4 x i16>* %ptr
439 %Y = sext <4 x i16> %X to <4 x i64>