1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse3 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE3
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+ssse3 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSSE3
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
8 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
9 target triple = "x86_64-unknown-unknown"
11 define <4 x i32> @shuffle_v4i32_0001(<4 x i32> %a, <4 x i32> %b) {
12 ; SSE-LABEL: shuffle_v4i32_0001:
14 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,1]
17 ; AVX-LABEL: shuffle_v4i32_0001:
19 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,1]
21 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
22 ret <4 x i32> %shuffle
24 define <4 x i32> @shuffle_v4i32_0020(<4 x i32> %a, <4 x i32> %b) {
25 ; SSE-LABEL: shuffle_v4i32_0020:
27 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,2,0]
30 ; AVX-LABEL: shuffle_v4i32_0020:
32 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,2,0]
34 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
35 ret <4 x i32> %shuffle
37 define <4 x i32> @shuffle_v4i32_0112(<4 x i32> %a, <4 x i32> %b) {
38 ; SSE-LABEL: shuffle_v4i32_0112:
40 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,2]
43 ; AVX-LABEL: shuffle_v4i32_0112:
45 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,1,2]
47 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 1, i32 2>
48 ret <4 x i32> %shuffle
50 define <4 x i32> @shuffle_v4i32_0300(<4 x i32> %a, <4 x i32> %b) {
51 ; SSE-LABEL: shuffle_v4i32_0300:
53 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,3,0,0]
56 ; AVX-LABEL: shuffle_v4i32_0300:
58 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,3,0,0]
60 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
61 ret <4 x i32> %shuffle
63 define <4 x i32> @shuffle_v4i32_1000(<4 x i32> %a, <4 x i32> %b) {
64 ; SSE-LABEL: shuffle_v4i32_1000:
66 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,0,0]
69 ; AVX-LABEL: shuffle_v4i32_1000:
71 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,0,0,0]
73 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
74 ret <4 x i32> %shuffle
76 define <4 x i32> @shuffle_v4i32_2200(<4 x i32> %a, <4 x i32> %b) {
77 ; SSE-LABEL: shuffle_v4i32_2200:
79 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,2,0,0]
82 ; AVX-LABEL: shuffle_v4i32_2200:
84 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,2,0,0]
86 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
87 ret <4 x i32> %shuffle
89 define <4 x i32> @shuffle_v4i32_3330(<4 x i32> %a, <4 x i32> %b) {
90 ; SSE-LABEL: shuffle_v4i32_3330:
92 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,3,3,0]
95 ; AVX-LABEL: shuffle_v4i32_3330:
97 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[3,3,3,0]
99 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
100 ret <4 x i32> %shuffle
102 define <4 x i32> @shuffle_v4i32_3210(<4 x i32> %a, <4 x i32> %b) {
103 ; SSE-LABEL: shuffle_v4i32_3210:
105 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,2,1,0]
108 ; AVX-LABEL: shuffle_v4i32_3210:
110 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[3,2,1,0]
112 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
113 ret <4 x i32> %shuffle
116 define <4 x i32> @shuffle_v4i32_2121(<4 x i32> %a, <4 x i32> %b) {
117 ; SSE-LABEL: shuffle_v4i32_2121:
119 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,1,2,1]
122 ; AVX-LABEL: shuffle_v4i32_2121:
124 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,1,2,1]
126 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 1, i32 2, i32 1>
127 ret <4 x i32> %shuffle
130 define <4 x float> @shuffle_v4f32_0001(<4 x float> %a, <4 x float> %b) {
131 ; SSE-LABEL: shuffle_v4f32_0001:
133 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,0,1]
136 ; AVX-LABEL: shuffle_v4f32_0001:
138 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,1]
140 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
141 ret <4 x float> %shuffle
143 define <4 x float> @shuffle_v4f32_0020(<4 x float> %a, <4 x float> %b) {
144 ; SSE-LABEL: shuffle_v4f32_0020:
146 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,2,0]
149 ; AVX-LABEL: shuffle_v4f32_0020:
151 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,2,0]
153 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
154 ret <4 x float> %shuffle
156 define <4 x float> @shuffle_v4f32_0300(<4 x float> %a, <4 x float> %b) {
157 ; SSE-LABEL: shuffle_v4f32_0300:
159 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3,0,0]
162 ; AVX-LABEL: shuffle_v4f32_0300:
164 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,3,0,0]
166 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
167 ret <4 x float> %shuffle
169 define <4 x float> @shuffle_v4f32_1000(<4 x float> %a, <4 x float> %b) {
170 ; SSE-LABEL: shuffle_v4f32_1000:
172 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,0,0,0]
175 ; AVX-LABEL: shuffle_v4f32_1000:
177 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,0,0,0]
179 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
180 ret <4 x float> %shuffle
182 define <4 x float> @shuffle_v4f32_2200(<4 x float> %a, <4 x float> %b) {
183 ; SSE-LABEL: shuffle_v4f32_2200:
185 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,2,0,0]
188 ; AVX-LABEL: shuffle_v4f32_2200:
190 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,0,0]
192 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
193 ret <4 x float> %shuffle
195 define <4 x float> @shuffle_v4f32_3330(<4 x float> %a, <4 x float> %b) {
196 ; SSE-LABEL: shuffle_v4f32_3330:
198 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,0]
201 ; AVX-LABEL: shuffle_v4f32_3330:
203 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,3,3,0]
205 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
206 ret <4 x float> %shuffle
208 define <4 x float> @shuffle_v4f32_3210(<4 x float> %a, <4 x float> %b) {
209 ; SSE-LABEL: shuffle_v4f32_3210:
211 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2,1,0]
214 ; AVX-LABEL: shuffle_v4f32_3210:
216 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0]
218 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
219 ret <4 x float> %shuffle
221 define <4 x float> @shuffle_v4f32_0011(<4 x float> %a, <4 x float> %b) {
222 ; SSE-LABEL: shuffle_v4f32_0011:
224 ; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0,0,1,1]
227 ; AVX-LABEL: shuffle_v4f32_0011:
229 ; AVX-NEXT: vunpcklps {{.*#+}} xmm0 = xmm0[0,0,1,1]
231 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 1, i32 1>
232 ret <4 x float> %shuffle
234 define <4 x float> @shuffle_v4f32_2233(<4 x float> %a, <4 x float> %b) {
235 ; SSE-LABEL: shuffle_v4f32_2233:
237 ; SSE-NEXT: unpckhps {{.*#+}} xmm0 = xmm0[2,2,3,3]
240 ; AVX-LABEL: shuffle_v4f32_2233:
242 ; AVX-NEXT: vunpckhps {{.*#+}} xmm0 = xmm0[2,2,3,3]
244 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 2, i32 3, i32 3>
245 ret <4 x float> %shuffle
247 define <4 x float> @shuffle_v4f32_0022(<4 x float> %a, <4 x float> %b) {
248 ; SSE2-LABEL: shuffle_v4f32_0022:
250 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,2,2]
253 ; SSE3-LABEL: shuffle_v4f32_0022:
255 ; SSE3-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
258 ; SSSE3-LABEL: shuffle_v4f32_0022:
260 ; SSSE3-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
263 ; SSE41-LABEL: shuffle_v4f32_0022:
265 ; SSE41-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
268 ; AVX-LABEL: shuffle_v4f32_0022:
270 ; AVX-NEXT: vmovsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
272 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 2>
273 ret <4 x float> %shuffle
275 define <4 x float> @shuffle_v4f32_1133(<4 x float> %a, <4 x float> %b) {
276 ; SSE2-LABEL: shuffle_v4f32_1133:
278 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,3,3]
281 ; SSE3-LABEL: shuffle_v4f32_1133:
283 ; SSE3-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
286 ; SSSE3-LABEL: shuffle_v4f32_1133:
288 ; SSSE3-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
291 ; SSE41-LABEL: shuffle_v4f32_1133:
293 ; SSE41-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
296 ; AVX-LABEL: shuffle_v4f32_1133:
298 ; AVX-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
300 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 1, i32 3, i32 3>
301 ret <4 x float> %shuffle
304 define <4 x i32> @shuffle_v4i32_0124(<4 x i32> %a, <4 x i32> %b) {
305 ; SSE2-LABEL: shuffle_v4i32_0124:
307 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
308 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
311 ; SSE3-LABEL: shuffle_v4i32_0124:
313 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
314 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
317 ; SSSE3-LABEL: shuffle_v4i32_0124:
319 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
320 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
323 ; SSE41-LABEL: shuffle_v4i32_0124:
325 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0]
328 ; AVX-LABEL: shuffle_v4i32_0124:
330 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0]
332 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
333 ret <4 x i32> %shuffle
335 define <4 x i32> @shuffle_v4i32_0142(<4 x i32> %a, <4 x i32> %b) {
336 ; SSE-LABEL: shuffle_v4i32_0142:
338 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
339 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
342 ; AVX-LABEL: shuffle_v4i32_0142:
344 ; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
345 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
347 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 2>
348 ret <4 x i32> %shuffle
350 define <4 x i32> @shuffle_v4i32_0412(<4 x i32> %a, <4 x i32> %b) {
351 ; SSE-LABEL: shuffle_v4i32_0412:
353 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
354 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[1,2]
355 ; SSE-NEXT: movaps %xmm1, %xmm0
358 ; AVX-LABEL: shuffle_v4i32_0412:
360 ; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
361 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm1[2,0],xmm0[1,2]
363 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 2>
364 ret <4 x i32> %shuffle
366 define <4 x i32> @shuffle_v4i32_4012(<4 x i32> %a, <4 x i32> %b) {
367 ; SSE-LABEL: shuffle_v4i32_4012:
369 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
370 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
371 ; SSE-NEXT: movaps %xmm1, %xmm0
374 ; AVX-LABEL: shuffle_v4i32_4012:
376 ; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
377 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm1[0,2],xmm0[1,2]
379 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 1, i32 2>
380 ret <4 x i32> %shuffle
382 define <4 x i32> @shuffle_v4i32_0145(<4 x i32> %a, <4 x i32> %b) {
383 ; SSE-LABEL: shuffle_v4i32_0145:
385 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
388 ; AVX-LABEL: shuffle_v4i32_0145:
390 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
392 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
393 ret <4 x i32> %shuffle
395 define <4 x i32> @shuffle_v4i32_0451(<4 x i32> %a, <4 x i32> %b) {
396 ; SSE-LABEL: shuffle_v4i32_0451:
398 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
399 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
402 ; AVX-LABEL: shuffle_v4i32_0451:
404 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
405 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
407 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 5, i32 1>
408 ret <4 x i32> %shuffle
410 define <4 x i32> @shuffle_v4i32_4501(<4 x i32> %a, <4 x i32> %b) {
411 ; SSE-LABEL: shuffle_v4i32_4501:
413 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
414 ; SSE-NEXT: movdqa %xmm1, %xmm0
417 ; AVX-LABEL: shuffle_v4i32_4501:
419 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
421 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
422 ret <4 x i32> %shuffle
424 define <4 x i32> @shuffle_v4i32_4015(<4 x i32> %a, <4 x i32> %b) {
425 ; SSE-LABEL: shuffle_v4i32_4015:
427 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
428 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0,1,3]
431 ; AVX-LABEL: shuffle_v4i32_4015:
433 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
434 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[2,0,1,3]
436 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 1, i32 5>
437 ret <4 x i32> %shuffle
440 define <4 x float> @shuffle_v4f32_4zzz(<4 x float> %a) {
441 ; SSE2-LABEL: shuffle_v4f32_4zzz:
443 ; SSE2-NEXT: xorps %xmm1, %xmm1
444 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
445 ; SSE2-NEXT: movaps %xmm1, %xmm0
448 ; SSE3-LABEL: shuffle_v4f32_4zzz:
450 ; SSE3-NEXT: xorps %xmm1, %xmm1
451 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
452 ; SSE3-NEXT: movaps %xmm1, %xmm0
455 ; SSSE3-LABEL: shuffle_v4f32_4zzz:
457 ; SSSE3-NEXT: xorps %xmm1, %xmm1
458 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
459 ; SSSE3-NEXT: movaps %xmm1, %xmm0
462 ; SSE41-LABEL: shuffle_v4f32_4zzz:
464 ; SSE41-NEXT: xorps %xmm1, %xmm1
465 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
468 ; AVX-LABEL: shuffle_v4f32_4zzz:
470 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
471 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
473 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
474 ret <4 x float> %shuffle
477 define <4 x float> @shuffle_v4f32_z4zz(<4 x float> %a) {
478 ; SSE2-LABEL: shuffle_v4f32_z4zz:
480 ; SSE2-NEXT: xorps %xmm1, %xmm1
481 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[2,0]
482 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[3,0]
485 ; SSE3-LABEL: shuffle_v4f32_z4zz:
487 ; SSE3-NEXT: xorps %xmm1, %xmm1
488 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[2,0]
489 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[3,0]
492 ; SSSE3-LABEL: shuffle_v4f32_z4zz:
494 ; SSSE3-NEXT: xorps %xmm1, %xmm1
495 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[2,0]
496 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[3,0]
499 ; SSE41-LABEL: shuffle_v4f32_z4zz:
501 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[0],zero,zero
504 ; AVX-LABEL: shuffle_v4f32_z4zz:
506 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm0[0],zero,zero
508 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 2, i32 4, i32 3, i32 0>
509 ret <4 x float> %shuffle
512 define <4 x float> @shuffle_v4f32_zz4z(<4 x float> %a) {
513 ; SSE2-LABEL: shuffle_v4f32_zz4z:
515 ; SSE2-NEXT: xorps %xmm1, %xmm1
516 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
517 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,2]
518 ; SSE2-NEXT: movaps %xmm1, %xmm0
521 ; SSE3-LABEL: shuffle_v4f32_zz4z:
523 ; SSE3-NEXT: xorps %xmm1, %xmm1
524 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
525 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,2]
526 ; SSE3-NEXT: movaps %xmm1, %xmm0
529 ; SSSE3-LABEL: shuffle_v4f32_zz4z:
531 ; SSSE3-NEXT: xorps %xmm1, %xmm1
532 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
533 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,2]
534 ; SSSE3-NEXT: movaps %xmm1, %xmm0
537 ; SSE41-LABEL: shuffle_v4f32_zz4z:
539 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,zero,xmm0[0],zero
542 ; AVX-LABEL: shuffle_v4f32_zz4z:
544 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,zero,xmm0[0],zero
546 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 0, i32 4, i32 0>
547 ret <4 x float> %shuffle
550 define <4 x float> @shuffle_v4f32_zuu4(<4 x float> %a) {
551 ; SSE2-LABEL: shuffle_v4f32_zuu4:
553 ; SSE2-NEXT: xorps %xmm1, %xmm1
554 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
555 ; SSE2-NEXT: movaps %xmm1, %xmm0
558 ; SSE3-LABEL: shuffle_v4f32_zuu4:
560 ; SSE3-NEXT: xorps %xmm1, %xmm1
561 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
562 ; SSE3-NEXT: movaps %xmm1, %xmm0
565 ; SSSE3-LABEL: shuffle_v4f32_zuu4:
567 ; SSSE3-NEXT: xorps %xmm1, %xmm1
568 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
569 ; SSSE3-NEXT: movaps %xmm1, %xmm0
572 ; SSE41-LABEL: shuffle_v4f32_zuu4:
574 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,zero,zero,xmm0[0]
577 ; AVX-LABEL: shuffle_v4f32_zuu4:
579 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,zero,zero,xmm0[0]
581 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 undef, i32 undef, i32 4>
582 ret <4 x float> %shuffle
585 define <4 x float> @shuffle_v4f32_zzz7(<4 x float> %a) {
586 ; SSE2-LABEL: shuffle_v4f32_zzz7:
588 ; SSE2-NEXT: xorps %xmm1, %xmm1
589 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
590 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
591 ; SSE2-NEXT: movaps %xmm1, %xmm0
594 ; SSE3-LABEL: shuffle_v4f32_zzz7:
596 ; SSE3-NEXT: xorps %xmm1, %xmm1
597 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
598 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
599 ; SSE3-NEXT: movaps %xmm1, %xmm0
602 ; SSSE3-LABEL: shuffle_v4f32_zzz7:
604 ; SSSE3-NEXT: xorps %xmm1, %xmm1
605 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
606 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
607 ; SSSE3-NEXT: movaps %xmm1, %xmm0
610 ; SSE41-LABEL: shuffle_v4f32_zzz7:
612 ; SSE41-NEXT: xorps %xmm1, %xmm1
613 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
616 ; AVX-LABEL: shuffle_v4f32_zzz7:
618 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
619 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
621 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
622 ret <4 x float> %shuffle
625 define <4 x float> @shuffle_v4f32_z6zz(<4 x float> %a) {
626 ; SSE2-LABEL: shuffle_v4f32_z6zz:
628 ; SSE2-NEXT: xorps %xmm1, %xmm1
629 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
630 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
633 ; SSE3-LABEL: shuffle_v4f32_z6zz:
635 ; SSE3-NEXT: xorps %xmm1, %xmm1
636 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
637 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
640 ; SSSE3-LABEL: shuffle_v4f32_z6zz:
642 ; SSSE3-NEXT: xorps %xmm1, %xmm1
643 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
644 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
647 ; SSE41-LABEL: shuffle_v4f32_z6zz:
649 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
652 ; AVX-LABEL: shuffle_v4f32_z6zz:
654 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
656 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 6, i32 2, i32 3>
657 ret <4 x float> %shuffle
660 define <4 x float> @shuffle_v4f32_0z23(<4 x float> %a) {
661 ; SSE-LABEL: shuffle_v4f32_0z23:
663 ; SSE-NEXT: xorps %xmm1, %xmm1
664 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
665 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3]
666 ; SSE-NEXT: movaps %xmm1, %xmm0
669 ; AVX-LABEL: shuffle_v4f32_0z23:
671 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
672 ; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
673 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm1[2,0],xmm0[2,3]
675 %shuffle = shufflevector <4 x float> %a, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 2, i32 3>
676 ret <4 x float> %shuffle
679 define <4 x float> @shuffle_v4f32_01z3(<4 x float> %a) {
680 ; SSE-LABEL: shuffle_v4f32_01z3:
682 ; SSE-NEXT: xorps %xmm1, %xmm1
683 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]
684 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
687 ; AVX-LABEL: shuffle_v4f32_01z3:
689 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
690 ; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]
691 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
693 %shuffle = shufflevector <4 x float> %a, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 4, i32 3>
694 ret <4 x float> %shuffle
697 define <4 x float> @shuffle_v4f32_012z(<4 x float> %a) {
698 ; SSE2-LABEL: shuffle_v4f32_012z:
700 ; SSE2-NEXT: xorps %xmm1, %xmm1
701 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[2,0]
702 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
705 ; SSE3-LABEL: shuffle_v4f32_012z:
707 ; SSE3-NEXT: xorps %xmm1, %xmm1
708 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[2,0]
709 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
712 ; SSSE3-LABEL: shuffle_v4f32_012z:
714 ; SSSE3-NEXT: xorps %xmm1, %xmm1
715 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[2,0]
716 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
719 ; SSE41-LABEL: shuffle_v4f32_012z:
721 ; SSE41-NEXT: xorps %xmm1, %xmm1
722 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
725 ; AVX-LABEL: shuffle_v4f32_012z:
727 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
728 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
730 %shuffle = shufflevector <4 x float> %a, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
731 ret <4 x float> %shuffle
734 define <4 x float> @shuffle_v4f32_0zz3(<4 x float> %a) {
735 ; SSE-LABEL: shuffle_v4f32_0zz3:
737 ; SSE-NEXT: xorps %xmm1, %xmm1
738 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3],xmm1[0,0]
739 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
742 ; AVX-LABEL: shuffle_v4f32_0zz3:
744 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
745 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,3],xmm1[0,0]
746 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
748 %shuffle = shufflevector <4 x float> %a, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 4, i32 3>
749 ret <4 x float> %shuffle
752 define <4 x i32> @shuffle_v4i32_4zzz(<4 x i32> %a) {
753 ; SSE2-LABEL: shuffle_v4i32_4zzz:
755 ; SSE2-NEXT: xorps %xmm1, %xmm1
756 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
757 ; SSE2-NEXT: movaps %xmm1, %xmm0
760 ; SSE3-LABEL: shuffle_v4i32_4zzz:
762 ; SSE3-NEXT: xorps %xmm1, %xmm1
763 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
764 ; SSE3-NEXT: movaps %xmm1, %xmm0
767 ; SSSE3-LABEL: shuffle_v4i32_4zzz:
769 ; SSSE3-NEXT: xorps %xmm1, %xmm1
770 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
771 ; SSSE3-NEXT: movaps %xmm1, %xmm0
774 ; SSE41-LABEL: shuffle_v4i32_4zzz:
776 ; SSE41-NEXT: pxor %xmm1, %xmm1
777 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
780 ; AVX-LABEL: shuffle_v4i32_4zzz:
782 ; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
783 ; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
785 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
786 ret <4 x i32> %shuffle
789 define <4 x i32> @shuffle_v4i32_z4zz(<4 x i32> %a) {
790 ; SSE2-LABEL: shuffle_v4i32_z4zz:
792 ; SSE2-NEXT: xorps %xmm1, %xmm1
793 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
794 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
797 ; SSE3-LABEL: shuffle_v4i32_z4zz:
799 ; SSE3-NEXT: xorps %xmm1, %xmm1
800 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
801 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
804 ; SSSE3-LABEL: shuffle_v4i32_z4zz:
806 ; SSSE3-NEXT: xorps %xmm1, %xmm1
807 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
808 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
811 ; SSE41-LABEL: shuffle_v4i32_z4zz:
813 ; SSE41-NEXT: pxor %xmm1, %xmm1
814 ; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3,4,5,6,7]
815 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
818 ; AVX-LABEL: shuffle_v4i32_z4zz:
820 ; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
821 ; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
822 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,0,1,1]
824 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 2, i32 4, i32 3, i32 0>
825 ret <4 x i32> %shuffle
828 define <4 x i32> @shuffle_v4i32_zz4z(<4 x i32> %a) {
829 ; SSE2-LABEL: shuffle_v4i32_zz4z:
831 ; SSE2-NEXT: xorps %xmm1, %xmm1
832 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
833 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
836 ; SSE3-LABEL: shuffle_v4i32_zz4z:
838 ; SSE3-NEXT: xorps %xmm1, %xmm1
839 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
840 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
843 ; SSSE3-LABEL: shuffle_v4i32_zz4z:
845 ; SSSE3-NEXT: xorps %xmm1, %xmm1
846 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
847 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
850 ; SSE41-LABEL: shuffle_v4i32_zz4z:
852 ; SSE41-NEXT: pxor %xmm1, %xmm1
853 ; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3,4,5,6,7]
854 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
857 ; AVX-LABEL: shuffle_v4i32_zz4z:
859 ; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
860 ; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
861 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,0,1]
863 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 0, i32 4, i32 0>
864 ret <4 x i32> %shuffle
867 define <4 x i32> @shuffle_v4i32_zuu4(<4 x i32> %a) {
868 ; SSE-LABEL: shuffle_v4i32_zuu4:
870 ; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3]
873 ; AVX-LABEL: shuffle_v4i32_zuu4:
875 ; AVX-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3]
877 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 undef, i32 undef, i32 4>
878 ret <4 x i32> %shuffle
881 define <4 x i32> @shuffle_v4i32_z6zz(<4 x i32> %a) {
882 ; SSE2-LABEL: shuffle_v4i32_z6zz:
884 ; SSE2-NEXT: xorps %xmm1, %xmm1
885 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
886 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
889 ; SSE3-LABEL: shuffle_v4i32_z6zz:
891 ; SSE3-NEXT: xorps %xmm1, %xmm1
892 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
893 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
896 ; SSSE3-LABEL: shuffle_v4i32_z6zz:
898 ; SSSE3-NEXT: xorps %xmm1, %xmm1
899 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
900 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
903 ; SSE41-LABEL: shuffle_v4i32_z6zz:
905 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
908 ; AVX-LABEL: shuffle_v4i32_z6zz:
910 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
912 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 6, i32 2, i32 3>
913 ret <4 x i32> %shuffle
916 define <4 x i32> @shuffle_v4i32_7012(<4 x i32> %a, <4 x i32> %b) {
917 ; SSE2-LABEL: shuffle_v4i32_7012:
919 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[0,0]
920 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
921 ; SSE2-NEXT: movaps %xmm1, %xmm0
924 ; SSE3-LABEL: shuffle_v4i32_7012:
926 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[0,0]
927 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
928 ; SSE3-NEXT: movaps %xmm1, %xmm0
931 ; SSSE3-LABEL: shuffle_v4i32_7012:
933 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
936 ; SSE41-LABEL: shuffle_v4i32_7012:
938 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
941 ; AVX-LABEL: shuffle_v4i32_7012:
943 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
945 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 7, i32 0, i32 1, i32 2>
946 ret <4 x i32> %shuffle
949 define <4 x i32> @shuffle_v4i32_6701(<4 x i32> %a, <4 x i32> %b) {
950 ; SSE2-LABEL: shuffle_v4i32_6701:
952 ; SSE2-NEXT: shufpd {{.*#+}} xmm1 = xmm1[1],xmm0[0]
953 ; SSE2-NEXT: movapd %xmm1, %xmm0
956 ; SSE3-LABEL: shuffle_v4i32_6701:
958 ; SSE3-NEXT: shufpd {{.*#+}} xmm1 = xmm1[1],xmm0[0]
959 ; SSE3-NEXT: movapd %xmm1, %xmm0
962 ; SSSE3-LABEL: shuffle_v4i32_6701:
964 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
967 ; SSE41-LABEL: shuffle_v4i32_6701:
969 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
972 ; AVX-LABEL: shuffle_v4i32_6701:
974 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
976 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
977 ret <4 x i32> %shuffle
980 define <4 x i32> @shuffle_v4i32_5670(<4 x i32> %a, <4 x i32> %b) {
981 ; SSE2-LABEL: shuffle_v4i32_5670:
983 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
984 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,2],xmm0[2,0]
985 ; SSE2-NEXT: movaps %xmm1, %xmm0
988 ; SSE3-LABEL: shuffle_v4i32_5670:
990 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
991 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,2],xmm0[2,0]
992 ; SSE3-NEXT: movaps %xmm1, %xmm0
995 ; SSSE3-LABEL: shuffle_v4i32_5670:
997 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
1000 ; SSE41-LABEL: shuffle_v4i32_5670:
1002 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
1005 ; AVX-LABEL: shuffle_v4i32_5670:
1007 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
1009 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 5, i32 6, i32 7, i32 0>
1010 ret <4 x i32> %shuffle
1013 define <4 x i32> @shuffle_v4i32_1234(<4 x i32> %a, <4 x i32> %b) {
1014 ; SSE2-LABEL: shuffle_v4i32_1234:
1016 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]
1017 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,2],xmm1[2,0]
1020 ; SSE3-LABEL: shuffle_v4i32_1234:
1022 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]
1023 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,2],xmm1[2,0]
1026 ; SSSE3-LABEL: shuffle_v4i32_1234:
1028 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
1029 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
1032 ; SSE41-LABEL: shuffle_v4i32_1234:
1034 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
1035 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1038 ; AVX-LABEL: shuffle_v4i32_1234:
1040 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
1042 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
1043 ret <4 x i32> %shuffle
1046 define <4 x i32> @shuffle_v4i32_2345(<4 x i32> %a, <4 x i32> %b) {
1047 ; SSE2-LABEL: shuffle_v4i32_2345:
1049 ; SSE2-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1],xmm1[0]
1052 ; SSE3-LABEL: shuffle_v4i32_2345:
1054 ; SSE3-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1],xmm1[0]
1057 ; SSSE3-LABEL: shuffle_v4i32_2345:
1059 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
1060 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
1063 ; SSE41-LABEL: shuffle_v4i32_2345:
1065 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
1066 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1069 ; AVX-LABEL: shuffle_v4i32_2345:
1071 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
1073 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 3, i32 4, i32 5>
1074 ret <4 x i32> %shuffle
1077 define <4 x i32> @shuffle_v4i32_3456(<4 x i32> %a, <4 x i32> %b) {
1078 ; SSE2-LABEL: shuffle_v4i32_3456:
1080 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[0,0]
1081 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[1,2]
1084 ; SSE3-LABEL: shuffle_v4i32_3456:
1086 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[0,0]
1087 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[1,2]
1090 ; SSSE3-LABEL: shuffle_v4i32_3456:
1092 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1093 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
1096 ; SSE41-LABEL: shuffle_v4i32_3456:
1098 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1099 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1102 ; AVX-LABEL: shuffle_v4i32_3456:
1104 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1106 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 4, i32 5, i32 6>
1107 ret <4 x i32> %shuffle
1110 define <4 x i32> @shuffle_v4i32_0u1u(<4 x i32> %a, <4 x i32> %b) {
1111 ; SSE2-LABEL: shuffle_v4i32_0u1u:
1113 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
1116 ; SSE3-LABEL: shuffle_v4i32_0u1u:
1118 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
1121 ; SSSE3-LABEL: shuffle_v4i32_0u1u:
1123 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
1126 ; SSE41-LABEL: shuffle_v4i32_0u1u:
1128 ; SSE41-NEXT: pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1131 ; AVX-LABEL: shuffle_v4i32_0u1u:
1133 ; AVX-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1135 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 undef, i32 1, i32 undef>
1136 ret <4 x i32> %shuffle
1139 define <4 x i32> @shuffle_v4i32_0z1z(<4 x i32> %a) {
1140 ; SSE2-LABEL: shuffle_v4i32_0z1z:
1142 ; SSE2-NEXT: pxor %xmm1, %xmm1
1143 ; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1146 ; SSE3-LABEL: shuffle_v4i32_0z1z:
1148 ; SSE3-NEXT: pxor %xmm1, %xmm1
1149 ; SSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1152 ; SSSE3-LABEL: shuffle_v4i32_0z1z:
1154 ; SSSE3-NEXT: pxor %xmm1, %xmm1
1155 ; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1158 ; SSE41-LABEL: shuffle_v4i32_0z1z:
1160 ; SSE41-NEXT: pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1163 ; AVX-LABEL: shuffle_v4i32_0z1z:
1165 ; AVX-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1167 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 1, i32 7>
1168 ret <4 x i32> %shuffle
1171 define <4 x i32> @shuffle_v4i32_01zu(<4 x i32> %a) {
1172 ; SSE-LABEL: shuffle_v4i32_01zu:
1174 ; SSE-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero
1177 ; AVX-LABEL: shuffle_v4i32_01zu:
1179 ; AVX-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
1181 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 7, i32 undef>
1182 ret <4 x i32> %shuffle
1185 define <4 x i32> @shuffle_v4i32_0z23(<4 x i32> %a) {
1186 ; SSE-LABEL: shuffle_v4i32_0z23:
1188 ; SSE-NEXT: andps {{.*}}(%rip), %xmm0
1191 ; AVX-LABEL: shuffle_v4i32_0z23:
1193 ; AVX-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0
1195 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 2, i32 3>
1196 ret <4 x i32> %shuffle
1199 define <4 x i32> @shuffle_v4i32_01z3(<4 x i32> %a) {
1200 ; SSE-LABEL: shuffle_v4i32_01z3:
1202 ; SSE-NEXT: andps {{.*}}(%rip), %xmm0
1205 ; AVX-LABEL: shuffle_v4i32_01z3:
1207 ; AVX-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0
1209 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 4, i32 3>
1210 ret <4 x i32> %shuffle
1213 define <4 x i32> @shuffle_v4i32_012z(<4 x i32> %a) {
1214 ; SSE2-LABEL: shuffle_v4i32_012z:
1216 ; SSE2-NEXT: andps {{.*}}(%rip), %xmm0
1219 ; SSE3-LABEL: shuffle_v4i32_012z:
1221 ; SSE3-NEXT: andps {{.*}}(%rip), %xmm0
1224 ; SSSE3-LABEL: shuffle_v4i32_012z:
1226 ; SSSE3-NEXT: andps {{.*}}(%rip), %xmm0
1229 ; SSE41-LABEL: shuffle_v4i32_012z:
1231 ; SSE41-NEXT: pxor %xmm1, %xmm1
1232 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5],xmm1[6,7]
1235 ; AVX1-LABEL: shuffle_v4i32_012z:
1237 ; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
1238 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5],xmm1[6,7]
1241 ; AVX2-LABEL: shuffle_v4i32_012z:
1243 ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
1244 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
1246 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
1247 ret <4 x i32> %shuffle
1250 define <4 x i32> @shuffle_v4i32_0zz3(<4 x i32> %a) {
1251 ; SSE-LABEL: shuffle_v4i32_0zz3:
1253 ; SSE-NEXT: andps {{.*}}(%rip), %xmm0
1256 ; AVX-LABEL: shuffle_v4i32_0zz3:
1258 ; AVX-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0
1260 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 4, i32 3>
1261 ret <4 x i32> %shuffle
1264 define <4 x i32> @insert_reg_and_zero_v4i32(i32 %a) {
1265 ; SSE-LABEL: insert_reg_and_zero_v4i32:
1267 ; SSE-NEXT: movd %edi, %xmm0
1270 ; AVX-LABEL: insert_reg_and_zero_v4i32:
1272 ; AVX-NEXT: vmovd %edi, %xmm0
1274 %v = insertelement <4 x i32> undef, i32 %a, i32 0
1275 %shuffle = shufflevector <4 x i32> %v, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1276 ret <4 x i32> %shuffle
1279 define <4 x i32> @insert_mem_and_zero_v4i32(i32* %ptr) {
1280 ; SSE-LABEL: insert_mem_and_zero_v4i32:
1282 ; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
1285 ; AVX-LABEL: insert_mem_and_zero_v4i32:
1287 ; AVX-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
1290 %v = insertelement <4 x i32> undef, i32 %a, i32 0
1291 %shuffle = shufflevector <4 x i32> %v, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1292 ret <4 x i32> %shuffle
1295 define <4 x float> @insert_reg_and_zero_v4f32(float %a) {
1296 ; SSE2-LABEL: insert_reg_and_zero_v4f32:
1298 ; SSE2-NEXT: xorps %xmm1, %xmm1
1299 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1300 ; SSE2-NEXT: movaps %xmm1, %xmm0
1303 ; SSE3-LABEL: insert_reg_and_zero_v4f32:
1305 ; SSE3-NEXT: xorps %xmm1, %xmm1
1306 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1307 ; SSE3-NEXT: movaps %xmm1, %xmm0
1310 ; SSSE3-LABEL: insert_reg_and_zero_v4f32:
1312 ; SSSE3-NEXT: xorps %xmm1, %xmm1
1313 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1314 ; SSSE3-NEXT: movaps %xmm1, %xmm0
1317 ; SSE41-LABEL: insert_reg_and_zero_v4f32:
1319 ; SSE41-NEXT: xorps %xmm1, %xmm1
1320 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
1323 ; AVX-LABEL: insert_reg_and_zero_v4f32:
1325 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
1326 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
1328 %v = insertelement <4 x float> undef, float %a, i32 0
1329 %shuffle = shufflevector <4 x float> %v, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1330 ret <4 x float> %shuffle
1333 define <4 x float> @insert_mem_and_zero_v4f32(float* %ptr) {
1334 ; SSE-LABEL: insert_mem_and_zero_v4f32:
1336 ; SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1339 ; AVX-LABEL: insert_mem_and_zero_v4f32:
1341 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1343 %a = load float* %ptr
1344 %v = insertelement <4 x float> undef, float %a, i32 0
1345 %shuffle = shufflevector <4 x float> %v, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1346 ret <4 x float> %shuffle
1349 define <4 x i32> @insert_reg_lo_v4i32(i64 %a, <4 x i32> %b) {
1350 ; SSE2-LABEL: insert_reg_lo_v4i32:
1352 ; SSE2-NEXT: movd %rdi, %xmm1
1353 ; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
1356 ; SSE3-LABEL: insert_reg_lo_v4i32:
1358 ; SSE3-NEXT: movd %rdi, %xmm1
1359 ; SSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
1362 ; SSSE3-LABEL: insert_reg_lo_v4i32:
1364 ; SSSE3-NEXT: movd %rdi, %xmm1
1365 ; SSSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
1368 ; SSE41-LABEL: insert_reg_lo_v4i32:
1370 ; SSE41-NEXT: movd %rdi, %xmm1
1371 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1374 ; AVX1-LABEL: insert_reg_lo_v4i32:
1376 ; AVX1-NEXT: vmovq %rdi, %xmm1
1377 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1380 ; AVX2-LABEL: insert_reg_lo_v4i32:
1382 ; AVX2-NEXT: vmovq %rdi, %xmm1
1383 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
1385 %a.cast = bitcast i64 %a to <2 x i32>
1386 %v = shufflevector <2 x i32> %a.cast, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1387 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1388 ret <4 x i32> %shuffle
1391 define <4 x i32> @insert_mem_lo_v4i32(<2 x i32>* %ptr, <4 x i32> %b) {
1392 ; SSE2-LABEL: insert_mem_lo_v4i32:
1394 ; SSE2-NEXT: movlpd (%rdi), %xmm0
1397 ; SSE3-LABEL: insert_mem_lo_v4i32:
1399 ; SSE3-NEXT: movlpd (%rdi), %xmm0
1402 ; SSSE3-LABEL: insert_mem_lo_v4i32:
1404 ; SSSE3-NEXT: movlpd (%rdi), %xmm0
1407 ; SSE41-LABEL: insert_mem_lo_v4i32:
1409 ; SSE41-NEXT: movq {{.*#+}} xmm1 = mem[0],zero
1410 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1413 ; AVX1-LABEL: insert_mem_lo_v4i32:
1415 ; AVX1-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
1416 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1419 ; AVX2-LABEL: insert_mem_lo_v4i32:
1421 ; AVX2-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
1422 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
1424 %a = load <2 x i32>* %ptr
1425 %v = shufflevector <2 x i32> %a, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1426 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1427 ret <4 x i32> %shuffle
1430 define <4 x i32> @insert_reg_hi_v4i32(i64 %a, <4 x i32> %b) {
1431 ; SSE-LABEL: insert_reg_hi_v4i32:
1433 ; SSE-NEXT: movd %rdi, %xmm1
1434 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1437 ; AVX-LABEL: insert_reg_hi_v4i32:
1439 ; AVX-NEXT: vmovq %rdi, %xmm1
1440 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1442 %a.cast = bitcast i64 %a to <2 x i32>
1443 %v = shufflevector <2 x i32> %a.cast, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1444 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1445 ret <4 x i32> %shuffle
1448 define <4 x i32> @insert_mem_hi_v4i32(<2 x i32>* %ptr, <4 x i32> %b) {
1449 ; SSE-LABEL: insert_mem_hi_v4i32:
1451 ; SSE-NEXT: movq {{.*#+}} xmm1 = mem[0],zero
1452 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1455 ; AVX-LABEL: insert_mem_hi_v4i32:
1457 ; AVX-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
1458 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1460 %a = load <2 x i32>* %ptr
1461 %v = shufflevector <2 x i32> %a, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1462 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1463 ret <4 x i32> %shuffle
1466 define <4 x float> @insert_reg_lo_v4f32(double %a, <4 x float> %b) {
1467 ; SSE-LABEL: insert_reg_lo_v4f32:
1469 ; SSE-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1]
1470 ; SSE-NEXT: movapd %xmm1, %xmm0
1473 ; AVX-LABEL: insert_reg_lo_v4f32:
1475 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
1477 %a.cast = bitcast double %a to <2 x float>
1478 %v = shufflevector <2 x float> %a.cast, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1479 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1480 ret <4 x float> %shuffle
1483 define <4 x float> @insert_mem_lo_v4f32(<2 x float>* %ptr, <4 x float> %b) {
1484 ; SSE-LABEL: insert_mem_lo_v4f32:
1486 ; SSE-NEXT: movlpd (%rdi), %xmm0
1489 ; AVX-LABEL: insert_mem_lo_v4f32:
1491 ; AVX-NEXT: vmovlpd (%rdi), %xmm0, %xmm0
1493 %a = load <2 x float>* %ptr
1494 %v = shufflevector <2 x float> %a, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1495 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1496 ret <4 x float> %shuffle
1499 define <4 x float> @insert_reg_hi_v4f32(double %a, <4 x float> %b) {
1500 ; SSE-LABEL: insert_reg_hi_v4f32:
1502 ; SSE-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm0[0]
1503 ; SSE-NEXT: movapd %xmm1, %xmm0
1506 ; AVX-LABEL: insert_reg_hi_v4f32:
1508 ; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
1510 %a.cast = bitcast double %a to <2 x float>
1511 %v = shufflevector <2 x float> %a.cast, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1512 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1513 ret <4 x float> %shuffle
1516 define <4 x float> @insert_mem_hi_v4f32(<2 x float>* %ptr, <4 x float> %b) {
1517 ; SSE-LABEL: insert_mem_hi_v4f32:
1519 ; SSE-NEXT: movhpd (%rdi), %xmm0
1522 ; AVX-LABEL: insert_mem_hi_v4f32:
1524 ; AVX-NEXT: vmovhpd (%rdi), %xmm0, %xmm0
1526 %a = load <2 x float>* %ptr
1527 %v = shufflevector <2 x float> %a, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1528 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1529 ret <4 x float> %shuffle
1532 define <4 x float> @shuffle_mem_v4f32_3210(<4 x float>* %ptr) {
1533 ; SSE-LABEL: shuffle_mem_v4f32_3210:
1535 ; SSE-NEXT: movaps (%rdi), %xmm0
1536 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2,1,0]
1539 ; AVX-LABEL: shuffle_mem_v4f32_3210:
1541 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = mem[3,2,1,0]
1543 %a = load <4 x float>* %ptr
1544 %shuffle = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
1545 ret <4 x float> %shuffle
1549 ; Shuffle to logical bit shifts
1552 define <4 x i32> @shuffle_v4i32_z0zX(<4 x i32> %a) {
1553 ; SSE-LABEL: shuffle_v4i32_z0zX:
1555 ; SSE-NEXT: psllq $32, %xmm0
1558 ; AVX-LABEL: shuffle_v4i32_z0zX:
1560 ; AVX-NEXT: vpsllq $32, %xmm0, %xmm0
1562 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 4, i32 0, i32 4, i32 undef>
1563 ret <4 x i32> %shuffle
1566 define <4 x i32> @shuffle_v4i32_1z3z(<4 x i32> %a) {
1567 ; SSE-LABEL: shuffle_v4i32_1z3z:
1569 ; SSE-NEXT: psrlq $32, %xmm0
1572 ; AVX-LABEL: shuffle_v4i32_1z3z:
1574 ; AVX-NEXT: vpsrlq $32, %xmm0, %xmm0
1576 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 1, i32 4, i32 3, i32 4>
1577 ret <4 x i32> %shuffle