1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=CHECK-SSE2
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=CHECK-AVX1
4 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
5 target triple = "x86_64-unknown-unknown"
7 define <4 x i32> @shuffle_v4i32_0001(<4 x i32> %a, <4 x i32> %b) {
8 ; CHECK-SSE2-LABEL: @shuffle_v4i32_0001
9 ; CHECK-SSE2: pshufd {{.*}} # xmm0 = xmm0[0,0,0,1]
10 ; CHECK-SSE2-NEXT: retq
11 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
12 ret <4 x i32> %shuffle
14 define <4 x i32> @shuffle_v4i32_0020(<4 x i32> %a, <4 x i32> %b) {
15 ; CHECK-SSE2-LABEL: @shuffle_v4i32_0020
16 ; CHECK-SSE2: pshufd {{.*}} # xmm0 = xmm0[0,0,2,0]
17 ; CHECK-SSE2-NEXT: retq
18 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
19 ret <4 x i32> %shuffle
21 define <4 x i32> @shuffle_v4i32_0112(<4 x i32> %a, <4 x i32> %b) {
22 ; CHECK-SSE2-LABEL: @shuffle_v4i32_0112
23 ; CHECK-SSE2: pshufd {{.*}} # xmm0 = xmm0[0,1,1,2]
24 ; CHECK-SSE2-NEXT: retq
25 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 1, i32 2>
26 ret <4 x i32> %shuffle
28 define <4 x i32> @shuffle_v4i32_0300(<4 x i32> %a, <4 x i32> %b) {
29 ; CHECK-SSE2-LABEL: @shuffle_v4i32_0300
30 ; CHECK-SSE2: pshufd {{.*}} # xmm0 = xmm0[0,3,0,0]
31 ; CHECK-SSE2-NEXT: retq
32 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
33 ret <4 x i32> %shuffle
35 define <4 x i32> @shuffle_v4i32_1000(<4 x i32> %a, <4 x i32> %b) {
36 ; CHECK-SSE2-LABEL: @shuffle_v4i32_1000
37 ; CHECK-SSE2: pshufd {{.*}} # xmm0 = xmm0[1,0,0,0]
38 ; CHECK-SSE2-NEXT: retq
39 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
40 ret <4 x i32> %shuffle
42 define <4 x i32> @shuffle_v4i32_2200(<4 x i32> %a, <4 x i32> %b) {
43 ; CHECK-SSE2-LABEL: @shuffle_v4i32_2200
44 ; CHECK-SSE2: pshufd {{.*}} # xmm0 = xmm0[2,2,0,0]
45 ; CHECK-SSE2-NEXT: retq
46 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
47 ret <4 x i32> %shuffle
49 define <4 x i32> @shuffle_v4i32_3330(<4 x i32> %a, <4 x i32> %b) {
50 ; CHECK-SSE2-LABEL: @shuffle_v4i32_3330
51 ; CHECK-SSE2: pshufd {{.*}} # xmm0 = xmm0[3,3,3,0]
52 ; CHECK-SSE2-NEXT: retq
53 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
54 ret <4 x i32> %shuffle
56 define <4 x i32> @shuffle_v4i32_3210(<4 x i32> %a, <4 x i32> %b) {
57 ; CHECK-SSE2-LABEL: @shuffle_v4i32_3210
58 ; CHECK-SSE2: pshufd {{.*}} # xmm0 = xmm0[3,2,1,0]
59 ; CHECK-SSE2-NEXT: retq
60 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
61 ret <4 x i32> %shuffle
64 define <4 x i32> @shuffle_v4i32_2121(<4 x i32> %a, <4 x i32> %b) {
65 ; CHECK-AVX1-LABEL: @shuffle_v4i32_2121
66 ; CHECK-AVX1: vpshufd {{.*}} # xmm0 = xmm0[2,1,2,1]
67 ; CHECK-AVX1-NEXT: retq
68 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 1, i32 2, i32 1>
69 ret <4 x i32> %shuffle
72 define <4 x float> @shuffle_v4f32_0001(<4 x float> %a, <4 x float> %b) {
73 ; CHECK-SSE2-LABEL: @shuffle_v4f32_0001
74 ; CHECK-SSE2: shufps {{.*}} # xmm0 = xmm0[0,0,0,1]
75 ; CHECK-SSE2-NEXT: retq
76 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
77 ret <4 x float> %shuffle
79 define <4 x float> @shuffle_v4f32_0020(<4 x float> %a, <4 x float> %b) {
80 ; CHECK-SSE2-LABEL: @shuffle_v4f32_0020
81 ; CHECK-SSE2: shufps {{.*}} # xmm0 = xmm0[0,0,2,0]
82 ; CHECK-SSE2-NEXT: retq
83 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
84 ret <4 x float> %shuffle
86 define <4 x float> @shuffle_v4f32_0300(<4 x float> %a, <4 x float> %b) {
87 ; CHECK-SSE2-LABEL: @shuffle_v4f32_0300
88 ; CHECK-SSE2: shufps {{.*}} # xmm0 = xmm0[0,3,0,0]
89 ; CHECK-SSE2-NEXT: retq
90 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
91 ret <4 x float> %shuffle
93 define <4 x float> @shuffle_v4f32_1000(<4 x float> %a, <4 x float> %b) {
94 ; CHECK-SSE2-LABEL: @shuffle_v4f32_1000
95 ; CHECK-SSE2: shufps {{.*}} # xmm0 = xmm0[1,0,0,0]
96 ; CHECK-SSE2-NEXT: retq
97 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
98 ret <4 x float> %shuffle
100 define <4 x float> @shuffle_v4f32_2200(<4 x float> %a, <4 x float> %b) {
101 ; CHECK-SSE2-LABEL: @shuffle_v4f32_2200
102 ; CHECK-SSE2: shufps {{.*}} # xmm0 = xmm0[2,2,0,0]
103 ; CHECK-SSE2-NEXT: retq
104 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
105 ret <4 x float> %shuffle
107 define <4 x float> @shuffle_v4f32_3330(<4 x float> %a, <4 x float> %b) {
108 ; CHECK-SSE2-LABEL: @shuffle_v4f32_3330
109 ; CHECK-SSE2: shufps {{.*}} # xmm0 = xmm0[3,3,3,0]
110 ; CHECK-SSE2-NEXT: retq
111 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
112 ret <4 x float> %shuffle
114 define <4 x float> @shuffle_v4f32_3210(<4 x float> %a, <4 x float> %b) {
115 ; CHECK-SSE2-LABEL: @shuffle_v4f32_3210
116 ; CHECK-SSE2: shufps {{.*}} # xmm0 = xmm0[3,2,1,0]
117 ; CHECK-SSE2-NEXT: retq
118 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
119 ret <4 x float> %shuffle
122 define <4 x i32> @shuffle_v4i32_0124(<4 x i32> %a, <4 x i32> %b) {
123 ; CHECK-SSE2-LABEL: @shuffle_v4i32_0124
124 ; CHECK-SSE2: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[2,0]
125 ; CHECK-SSE2-NEXT: shufps {{.*}} # xmm0 = xmm0[0,1],xmm1[2,0]
126 ; CHECK-SSE2-NEXT: retq
127 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
128 ret <4 x i32> %shuffle
130 define <4 x i32> @shuffle_v4i32_0142(<4 x i32> %a, <4 x i32> %b) {
131 ; CHECK-SSE2-LABEL: @shuffle_v4i32_0142
132 ; CHECK-SSE2: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[2,0]
133 ; CHECK-SSE2-NEXT: shufps {{.*}} # xmm0 = xmm0[0,1],xmm1[0,2]
134 ; CHECK-SSE2-NEXT: retq
135 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 2>
136 ret <4 x i32> %shuffle
138 define <4 x i32> @shuffle_v4i32_0412(<4 x i32> %a, <4 x i32> %b) {
139 ; CHECK-SSE2-LABEL: @shuffle_v4i32_0412
140 ; CHECK-SSE2: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[0,0]
141 ; CHECK-SSE2-NEXT: shufps {{.*}} # xmm1 = xmm1[2,0],xmm0[1,2]
142 ; CHECK-SSE2-NEXT: movaps %xmm1, %xmm0
143 ; CHECK-SSE2-NEXT: retq
144 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 2>
145 ret <4 x i32> %shuffle
147 define <4 x i32> @shuffle_v4i32_4012(<4 x i32> %a, <4 x i32> %b) {
148 ; CHECK-SSE2-LABEL: @shuffle_v4i32_4012
149 ; CHECK-SSE2: shufps {{.*}} # xmm1 = xmm1[0,0],xmm0[0,0]
150 ; CHECK-SSE2-NEXT: shufps {{.*}} # xmm1 = xmm1[0,2],xmm0[1,2]
151 ; CHECK-SSE2-NEXT: movaps %xmm1, %xmm0
152 ; CHECK-SSE2-NEXT: retq
153 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 1, i32 2>
154 ret <4 x i32> %shuffle
156 define <4 x i32> @shuffle_v4i32_0145(<4 x i32> %a, <4 x i32> %b) {
157 ; CHECK-SSE2-LABEL: @shuffle_v4i32_0145
158 ; CHECK-SSE2: punpcklqdq {{.*}} # xmm0 = xmm0[0],xmm1[0]
159 ; CHECK-SSE2-NEXT: retq
160 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
161 ret <4 x i32> %shuffle
163 define <4 x i32> @shuffle_v4i32_0451(<4 x i32> %a, <4 x i32> %b) {
164 ; CHECK-SSE2-LABEL: @shuffle_v4i32_0451
165 ; CHECK-SSE2: shufps {{.*}} # xmm0 = xmm0[0,1],xmm1[0,1]
166 ; CHECK-SSE2-NEXT: shufps {{.*}} # xmm0 = xmm0[0,2,3,1]
167 ; CHECK-SSE2-NEXT: retq
168 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 5, i32 1>
169 ret <4 x i32> %shuffle
171 define <4 x i32> @shuffle_v4i32_4501(<4 x i32> %a, <4 x i32> %b) {
172 ; CHECK-SSE2-LABEL: @shuffle_v4i32_4501
173 ; CHECK-SSE2: punpcklqdq {{.*}} # xmm1 = xmm1[0],xmm0[0]
174 ; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm0
175 ; CHECK-SSE2-NEXT: retq
176 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
177 ret <4 x i32> %shuffle
179 define <4 x i32> @shuffle_v4i32_4015(<4 x i32> %a, <4 x i32> %b) {
180 ; CHECK-SSE2-LABEL: @shuffle_v4i32_4015
181 ; CHECK-SSE2: shufps {{.*}} # xmm0 = xmm0[0,1],xmm1[0,1]
182 ; CHECK-SSE2-NEXT: shufps {{.*}} # xmm0 = xmm0[2,0,1,3]
183 ; CHECK-SSE2-NEXT: retq
184 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 1, i32 5>
185 ret <4 x i32> %shuffle