1 ; RUN: llc < %s -mcpu=x86-64 -mattr=+sse2 | FileCheck %s --check-prefix=CHECK-SSE2
3 ; Verify that the DAG combiner correctly folds bitwise operations across
4 ; shuffles, nested shuffles with undef, pairs of nested shuffles, and other
5 ; basic and always-safe patterns. Also test that the DAG combiner will combine
6 ; target-specific shuffle instructions where reasonable.
8 target triple = "x86_64-unknown-unknown"
10 declare <4 x i32> @llvm.x86.sse2.pshuf.d(<4 x i32>, i8)
11 declare <8 x i16> @llvm.x86.sse2.pshufl.w(<8 x i16>, i8)
12 declare <8 x i16> @llvm.x86.sse2.pshufh.w(<8 x i16>, i8)
14 define <4 x i32> @combine_pshufd1(<4 x i32> %a) {
15 ; CHECK-SSE2-LABEL: @combine_pshufd1
17 ; CHECK-SSE2-NEXT: retq
18 %b = call <4 x i32> @llvm.x86.sse2.pshuf.d(<4 x i32> %a, i8 27)
19 %c = call <4 x i32> @llvm.x86.sse2.pshuf.d(<4 x i32> %b, i8 27)
23 define <4 x i32> @combine_pshufd2(<4 x i32> %a) {
24 ; CHECK-SSE2-LABEL: @combine_pshufd2
26 ; CHECK-SSE2-NEXT: retq
27 %b = call <4 x i32> @llvm.x86.sse2.pshuf.d(<4 x i32> %a, i8 27)
28 %b.cast = bitcast <4 x i32> %b to <8 x i16>
29 %c = call <8 x i16> @llvm.x86.sse2.pshufl.w(<8 x i16> %b.cast, i8 -28)
30 %c.cast = bitcast <8 x i16> %c to <4 x i32>
31 %d = call <4 x i32> @llvm.x86.sse2.pshuf.d(<4 x i32> %c.cast, i8 27)
35 define <4 x i32> @combine_pshufd3(<4 x i32> %a) {
36 ; CHECK-SSE2-LABEL: @combine_pshufd3
38 ; CHECK-SSE2-NEXT: retq
39 %b = call <4 x i32> @llvm.x86.sse2.pshuf.d(<4 x i32> %a, i8 27)
40 %b.cast = bitcast <4 x i32> %b to <8 x i16>
41 %c = call <8 x i16> @llvm.x86.sse2.pshufh.w(<8 x i16> %b.cast, i8 -28)
42 %c.cast = bitcast <8 x i16> %c to <4 x i32>
43 %d = call <4 x i32> @llvm.x86.sse2.pshuf.d(<4 x i32> %c.cast, i8 27)
47 define <4 x i32> @combine_pshufd4(<4 x i32> %a) {
48 ; CHECK-SSE2-LABEL: @combine_pshufd4
50 ; CHECK-SSE2-NEXT: pshufhw {{.*}} # xmm0 = xmm0[0,1,2,3,7,6,5,4]
51 ; CHECK-SSE2-NEXT: retq
52 %b = call <4 x i32> @llvm.x86.sse2.pshuf.d(<4 x i32> %a, i8 -31)
53 %b.cast = bitcast <4 x i32> %b to <8 x i16>
54 %c = call <8 x i16> @llvm.x86.sse2.pshufh.w(<8 x i16> %b.cast, i8 27)
55 %c.cast = bitcast <8 x i16> %c to <4 x i32>
56 %d = call <4 x i32> @llvm.x86.sse2.pshuf.d(<4 x i32> %c.cast, i8 -31)
60 define <4 x i32> @combine_pshufd5(<4 x i32> %a) {
61 ; CHECK-SSE2-LABEL: @combine_pshufd5
63 ; CHECK-SSE2-NEXT: pshuflw {{.*}} # xmm0 = xmm0[3,2,1,0,4,5,6,7]
64 ; CHECK-SSE2-NEXT: retq
65 %b = call <4 x i32> @llvm.x86.sse2.pshuf.d(<4 x i32> %a, i8 -76)
66 %b.cast = bitcast <4 x i32> %b to <8 x i16>
67 %c = call <8 x i16> @llvm.x86.sse2.pshufl.w(<8 x i16> %b.cast, i8 27)
68 %c.cast = bitcast <8 x i16> %c to <4 x i32>
69 %d = call <4 x i32> @llvm.x86.sse2.pshuf.d(<4 x i32> %c.cast, i8 -76)
73 define <4 x i32> @combine_pshufd6(<4 x i32> %a) {
74 ; CHECK-SSE2-LABEL: @combine_pshufd6
76 ; CHECK-SSE2-NEXT: pshufd $0
77 ; CHECK-SSE2-NEXT: retq
78 %b = call <4 x i32> @llvm.x86.sse2.pshuf.d(<4 x i32> %a, i8 0)
79 %c = call <4 x i32> @llvm.x86.sse2.pshuf.d(<4 x i32> %b, i8 8)
83 define <8 x i16> @combine_pshuflw1(<8 x i16> %a) {
84 ; CHECK-SSE2-LABEL: @combine_pshuflw1
86 ; CHECK-SSE2-NEXT: retq
87 %b = call <8 x i16> @llvm.x86.sse2.pshufl.w(<8 x i16> %a, i8 27)
88 %c = call <8 x i16> @llvm.x86.sse2.pshufl.w(<8 x i16> %b, i8 27)
92 define <8 x i16> @combine_pshuflw2(<8 x i16> %a) {
93 ; CHECK-SSE2-LABEL: @combine_pshuflw2
95 ; CHECK-SSE2-NEXT: retq
96 %b = call <8 x i16> @llvm.x86.sse2.pshufl.w(<8 x i16> %a, i8 27)
97 %c = call <8 x i16> @llvm.x86.sse2.pshufh.w(<8 x i16> %b, i8 -28)
98 %d = call <8 x i16> @llvm.x86.sse2.pshufl.w(<8 x i16> %c, i8 27)
102 define <8 x i16> @combine_pshuflw3(<8 x i16> %a) {
103 ; CHECK-SSE2-LABEL: @combine_pshuflw3
104 ; CHECK-SSE2: # BB#0:
105 ; CHECK-SSE2-NEXT: pshufhw {{.*}} # xmm0 = xmm0[0,1,2,3,7,6,5,4]
106 ; CHECK-SSE2-NEXT: retq
107 %b = call <8 x i16> @llvm.x86.sse2.pshufl.w(<8 x i16> %a, i8 27)
108 %c = call <8 x i16> @llvm.x86.sse2.pshufh.w(<8 x i16> %b, i8 27)
109 %d = call <8 x i16> @llvm.x86.sse2.pshufl.w(<8 x i16> %c, i8 27)
113 define <8 x i16> @combine_pshufhw1(<8 x i16> %a) {
114 ; CHECK-SSE2-LABEL: @combine_pshufhw1
115 ; CHECK-SSE2: # BB#0:
116 ; CHECK-SSE2-NEXT: pshuflw {{.*}} # xmm0 = xmm0[3,2,1,0,4,5,6,7]
117 ; CHECK-SSE2-NEXT: retq
118 %b = call <8 x i16> @llvm.x86.sse2.pshufh.w(<8 x i16> %a, i8 27)
119 %c = call <8 x i16> @llvm.x86.sse2.pshufl.w(<8 x i16> %b, i8 27)
120 %d = call <8 x i16> @llvm.x86.sse2.pshufh.w(<8 x i16> %c, i8 27)