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Add an additional pattern for BLCI since opt can turn (not (add x, 1)) into (sub...
[oota-llvm.git]
/
test
/
CodeGen
/
X86
/
xtest.ll
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; RUN: llc < %s -march=x86-64 -mattr=+rtm | FileCheck %s
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declare i32 @llvm.x86.xtest() nounwind
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define i32 @test_xtest() nounwind uwtable {
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entry:
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%0 = tail call i32 @llvm.x86.xtest() nounwind
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ret i32 %0
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; CHECK: test_xtest
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; CHECK: xtest
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}