1 ; RUN: opt < %s -msan -msan-check-access-address=0 -S | FileCheck %s
3 ; Test instrumentation of vector shift instructions.
5 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
6 target triple = "x86_64-unknown-linux-gnu"
8 declare x86_mmx @llvm.x86.mmx.psll.d(x86_mmx, x86_mmx)
9 declare <8 x i32> @llvm.x86.avx2.psllv.d.256(<8 x i32>, <8 x i32>)
10 declare <4 x i32> @llvm.x86.avx2.psllv.d(<4 x i32>, <4 x i32>)
11 declare <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16>, <8 x i16>)
12 declare <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16>, i32)
13 declare <2 x i64> @llvm.x86.sse2.psll.dq(<2 x i64>, i32)
14 declare <2 x i64> @llvm.x86.sse2.psll.dq.bs(<2 x i64>, i32)
16 define i64 @test_mmx(i64 %x.coerce, i64 %y.coerce) sanitize_memory {
18 %0 = bitcast i64 %x.coerce to <2 x i32>
19 %1 = bitcast <2 x i32> %0 to x86_mmx
20 %2 = bitcast i64 %y.coerce to x86_mmx
21 %3 = tail call x86_mmx @llvm.x86.mmx.psll.d(x86_mmx %1, x86_mmx %2)
22 %4 = bitcast x86_mmx %3 to <2 x i32>
23 %5 = bitcast <2 x i32> %4 to <1 x i64>
24 %6 = extractelement <1 x i64> %5, i32 0
29 ; CHECK: = icmp ne i64 {{.*}}, 0
30 ; CHECK: [[C:%.*]] = sext i1 {{.*}} to i64
31 ; CHECK: [[A:%.*]] = call x86_mmx @llvm.x86.mmx.psll.d(
32 ; CHECK: [[B:%.*]] = bitcast x86_mmx {{.*}}[[A]] to i64
33 ; CHECK: = or i64 {{.*}}[[B]], {{.*}}[[C]]
34 ; CHECK: call x86_mmx @llvm.x86.mmx.psll.d(
38 define <8 x i16> @test_sse2_scalar(<8 x i16> %x, i32 %y) sanitize_memory {
40 %0 = tail call <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16> %x, i32 %y)
44 ; CHECK: @test_sse2_scalar
45 ; CHECK: = icmp ne i32 {{.*}}, 0
46 ; CHECK: = sext i1 {{.*}} to i128
47 ; CHECK: = bitcast i128 {{.*}} to <8 x i16>
48 ; CHECK: = call <8 x i16> @llvm.x86.sse2.pslli.w(
49 ; CHECK: = or <8 x i16>
50 ; CHECK: call <8 x i16> @llvm.x86.sse2.pslli.w(
51 ; CHECK: ret <8 x i16>
54 define <8 x i16> @test_sse2(<8 x i16> %x, <8 x i16> %y) sanitize_memory {
56 %0 = tail call <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16> %x, <8 x i16> %y)
61 ; CHECK: = bitcast <8 x i16> {{.*}} to i128
62 ; CHECK: = trunc i128 {{.*}} to i64
63 ; CHECK: = icmp ne i64 {{.*}}, 0
64 ; CHECK: = sext i1 {{.*}} to i128
65 ; CHECK: = bitcast i128 {{.*}} to <8 x i16>
66 ; CHECK: = call <8 x i16> @llvm.x86.sse2.psrl.w(
67 ; CHECK: = or <8 x i16>
68 ; CHECK: call <8 x i16> @llvm.x86.sse2.psrl.w(
69 ; CHECK: ret <8 x i16>
72 ; Test variable shift (i.e. vector by vector).
74 define <4 x i32> @test_avx2(<4 x i32> %x, <4 x i32> %y) sanitize_memory {
76 %0 = tail call <4 x i32> @llvm.x86.avx2.psllv.d(<4 x i32> %x, <4 x i32> %y)
81 ; CHECK: = icmp ne <4 x i32> {{.*}}, zeroinitializer
82 ; CHECK: = sext <4 x i1> {{.*}} to <4 x i32>
83 ; CHECK: = call <4 x i32> @llvm.x86.avx2.psllv.d(
84 ; CHECK: = or <4 x i32>
85 ; CHECK: = tail call <4 x i32> @llvm.x86.avx2.psllv.d(
86 ; CHECK: ret <4 x i32>
88 define <8 x i32> @test_avx2_256(<8 x i32> %x, <8 x i32> %y) sanitize_memory {
90 %0 = tail call <8 x i32> @llvm.x86.avx2.psllv.d.256(<8 x i32> %x, <8 x i32> %y)
94 ; CHECK: @test_avx2_256
95 ; CHECK: = icmp ne <8 x i32> {{.*}}, zeroinitializer
96 ; CHECK: = sext <8 x i1> {{.*}} to <8 x i32>
97 ; CHECK: = call <8 x i32> @llvm.x86.avx2.psllv.d.256(
98 ; CHECK: = or <8 x i32>
99 ; CHECK: = tail call <8 x i32> @llvm.x86.avx2.psllv.d.256(
100 ; CHECK: ret <8 x i32>