[AArch64] Make the use of FP instructions optional, but enabled by default.
[oota-llvm.git] / test / MC / AArch64 / neon-simd-copy.s
1 // RUN: llvm-mc -triple=aarch64 -mattr=+neon -show-encoding < %s | FileCheck %s
2
3 // Check that the assembler can handle the documented syntax for AArch64
4
5
6 //------------------------------------------------------------------------------
7 // Insert element (vector, from main)
8 //------------------------------------------------------------------------------
9          ins v2.b[2], w1
10          ins v7.h[7], w14
11          ins v20.s[0], w30
12          ins v1.d[1], x7
13          
14 // CHECK: ins   v2.b[2], w1           // encoding: [0x22,0x1c,0x05,0x4e]
15 // CHECK: ins   v7.h[7], w14          // encoding: [0xc7,0x1d,0x1e,0x4e]
16 // CHECK: ins   v20.s[0], w30         // encoding: [0xd4,0x1f,0x04,0x4e]
17 // CHECK: ins   v1.d[1], x7           // encoding: [0xe1,0x1c,0x18,0x4e]
18
19
20 //------------------------------------------------------------------------------
21 // Signed integer move (main, from element)
22 //------------------------------------------------------------------------------
23          smov w1, v0.b[15]
24          smov w14, v6.h[4]
25          smov x1, v0.b[15]
26          smov x14, v6.h[4]
27          smov x20, v9.s[2]
28
29 // CHECK: smov  w1, v0.b[15]          // encoding: [0x01,0x2c,0x1f,0x0e]
30 // CHECK: smov  w14, v6.h[4]          // encoding: [0xce,0x2c,0x12,0x0e]
31 // CHECK: smov  x1, v0.b[15]          // encoding: [0x01,0x2c,0x1f,0x4e]
32 // CHECK: smov  x14, v6.h[4]          // encoding: [0xce,0x2c,0x12,0x4e]
33 // CHECK: smov  x20, v9.s[2]          // encoding: [0x34,0x2d,0x14,0x4e]         
34
35
36 //------------------------------------------------------------------------------
37 // Unsigned integer move (main, from element)
38 //------------------------------------------------------------------------------
39          umov w1, v0.b[15]
40          umov w14, v6.h[4]
41          umov w20, v9.s[2]
42          umov x7, v18.d[1]
43
44 // CHECK: umov  w1, v0.b[15]          // encoding: [0x01,0x3c,0x1f,0x0e]
45 // CHECK: umov  w14, v6.h[4]          // encoding: [0xce,0x3c,0x12,0x0e]
46 // CHECK: umov  w20, v9.s[2]          // encoding: [0x34,0x3d,0x14,0x0e]
47 // CHECK: umov  x7, v18.d[1]          // encoding: [0x47,0x3e,0x18,0x4e]
48
49 //------------------------------------------------------------------------------
50 // Insert element (vector, from element)
51 //------------------------------------------------------------------------------
52
53          Ins v1.b[14], v3.b[6]
54          Ins v6.h[7], v7.h[5]
55          Ins v15.s[3], v22.s[2]
56          Ins v0.d[0], v4.d[1]
57
58 // CHECK: ins   v1.b[14], v3.b[6]       // encoding: [0x61,0x34,0x1d,0x6e]
59 // CHECK: ins   v6.h[7], v7.h[5]        // encoding: [0xe6,0x54,0x1e,0x6e]
60 // CHECK: ins   v15.s[3], v22.s[2]      // encoding: [0xcf,0x5e,0x1c,0x6e]
61 // CHECK: ins   v0.d[0], v4.d[1]        // encoding: [0x80,0x44,0x08,0x6e]
62
63 //------------------------------------------------------------------------------
64 // Duplicate to all lanes( vector, from element)
65 //------------------------------------------------------------------------------
66          dup v1.8b, v2.b[2]
67          dup v11.4h, v7.h[7]
68          dup v17.2s, v20.s[0]
69          dup v1.16b, v2.b[2]
70          dup v11.8h, v7.h[7]
71          dup v17.4s, v20.s[0]
72          dup v5.2d, v1.d[1]         
73
74 // CHECK: dup v1.8b, v2.b[2]        // encoding: [0x41,0x04,0x05,0x0e]
75 // CHECK: dup v11.4h, v7.h[7]       // encoding: [0xeb,0x04,0x1e,0x0e]
76 // CHECK: dup v17.2s, v20.s[0]      // encoding: [0x91,0x06,0x04,0x0e]
77 // CHECK: dup v1.16b, v2.b[2]       // encoding: [0x41,0x04,0x05,0x4e]
78 // CHECK: dup v11.8h, v7.h[7]       // encoding: [0xeb,0x04,0x1e,0x4e]
79 // CHECK: dup v17.4s, v20.s[0]      // encoding: [0x91,0x06,0x04,0x4e]
80 // CHECK: dup v5.2d, v1.d[1]        // encoding: [0x25,0x04,0x18,0x4e]
81
82 //------------------------------------------------------------------------------
83 // Duplicate to all lanes( vector, from main)
84 //------------------------------------------------------------------------------
85          dup v1.8b, w1
86          dup v11.4h, w14
87          dup v17.2s, w30
88          dup v1.16b, w2
89          dup v11.8h, w16
90          dup v17.4s, w28
91          dup v5.2d, x0        
92
93 // CHECK: dup   v1.8b, w1             // encoding: [0x21,0x0c,0x01,0x0e]
94 // CHECK: dup   v11.4h, w14           // encoding: [0xcb,0x0d,0x0a,0x0e]
95 // CHECK: dup   v17.2s, w30           // encoding: [0xd1,0x0f,0x14,0x0e]
96 // CHECK: dup   v1.16b, w2            // encoding: [0x41,0x0c,0x01,0x4e]
97 // CHECK: dup   v11.8h, w16           // encoding: [0x0b,0x0e,0x0a,0x4e]
98 // CHECK: dup   v17.4s, w28           // encoding: [0x91,0x0f,0x14,0x4e]
99 // CHECK: dup   v5.2d, x0             // encoding: [0x05,0x0c,0x08,0x4e]
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