[AArch64] Add additional extract-extend patterns for smov
[oota-llvm.git] / test / MC / ARM / Windows / mov32t-range.s
1 @ RUN: llvm-mc -triple thumbv7-windows-itanium -filetype obj -o - %s \
2 @ RUN:   | llvm-readobj -r - | FileCheck -check-prefix CHECK-RELOCATIONS %s
3
4 @ RUN: llvm-mc -triple thumbv7-windows-itanium -filetype obj -o - %s \
5 @ RUN:   | llvm-objdump -d - | FileCheck -check-prefix CHECK-ENCODING %s
6
7         .syntax unified
8         .thumb
9         .text
10
11         .def truncation
12                 .scl 3
13                 .type 32
14         .endef
15         .align 2
16         .thumb_func
17 truncation:
18         movw r0, :lower16:.Lerange
19         movt r0, :upper16:.Lerange
20         bx lr
21
22         .section .rdata,"rd"
23 .Lbuffer:
24         .zero 65536
25 .Lerange:
26         .asciz "-erange"
27
28 @ CHECK-RELOCATIONS: Relocations [
29 @ CHECK-RELOCATIONS:   .text {
30 @ CHECK-RELOCATIONS:     0x0 IMAGE_REL_ARM_MOV32T .rdata
31 @ CHECK-RELOCATIONS-NOT: 0x4 IMAGE_REL_ARM_MOV32T .rdata
32 @ CHECK-RELOCATIONS:   }
33 @ CHECK-RELOCATIONS: ]
34
35 @ CHECK-ENCODING:      0: 40 f2 00 00
36 @ CHECK-ENCODING-NEXT: 4: c0 f2 01 00
37