ARM MCRR/MCRR2 immediate operand range checking.
[oota-llvm.git] / test / MC / ARM / arm_instructions.s
1 @ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding %s | FileCheck %s
2
3 @ CHECK: nop
4 @ CHECK: encoding: [0x00,0xf0,0x20,0xe3]
5         nop
6
7 @ CHECK: nopeq
8 @ CHECK: encoding: [0x00,0xf0,0x20,0x03]
9         nopeq
10
11 @ CHECK: trap
12 @ CHECK: encoding: [0xfe,0xde,0xff,0xe7]
13         trap
14
15 @ CHECK: bx     lr
16 @ CHECK: encoding: [0x1e,0xff,0x2f,0xe1]
17         bx lr
18
19 @ CHECK: vqdmull.s32    q8, d17, d16
20 @ CHECK: encoding: [0xa0,0x0d,0xe1,0xf2]
21         vqdmull.s32     q8, d17, d16
22
23 @ CHECK: and    r1, r2, r3 @ encoding: [0x03,0x10,0x02,0xe0]
24         and r1,r2,r3
25
26 @ CHECK: ands   r1, r2, r3 @ encoding: [0x03,0x10,0x12,0xe0]
27         ands r1,r2,r3
28
29 @ CHECK: eor    r1, r2, r3 @ encoding: [0x03,0x10,0x22,0xe0]
30         eor r1,r2,r3
31
32 @ CHECK: eors   r1, r2, r3 @ encoding: [0x03,0x10,0x32,0xe0]
33         eors r1,r2,r3
34
35 @ CHECK: sub    r1, r2, r3 @ encoding: [0x03,0x10,0x42,0xe0]
36         sub r1,r2,r3
37
38 @ CHECK: subs   r1, r2, r3 @ encoding: [0x03,0x10,0x52,0xe0]
39         subs r1,r2,r3
40
41 @ CHECK: add    r1, r2, r3 @ encoding: [0x03,0x10,0x82,0xe0]
42         add r1,r2,r3
43
44 @ CHECK: adds   r1, r2, r3 @ encoding: [0x03,0x10,0x92,0xe0]
45         adds r1,r2,r3
46
47 @ CHECK: adc    r1, r2, r3 @ encoding: [0x03,0x10,0xa2,0xe0]
48         adc r1,r2,r3
49
50 @ CHECK: sbc    r1, r2, r3 @ encoding: [0x03,0x10,0xc2,0xe0]
51         sbc r1,r2,r3
52
53 @ CHECK: orr    r1, r2, r3 @ encoding: [0x03,0x10,0x82,0xe1]
54         orr r1,r2,r3
55
56 @ CHECK: orrs   r1, r2, r3 @ encoding: [0x03,0x10,0x92,0xe1]
57         orrs r1,r2,r3
58
59 @ CHECK: bic    r1, r2, r3 @ encoding: [0x03,0x10,0xc2,0xe1]
60         bic r1,r2,r3
61
62 @ CHECK: bics   r1, r2, r3 @ encoding: [0x03,0x10,0xd2,0xe1]
63         bics r1,r2,r3
64
65 @ CHECK: mov    r1, r2 @ encoding: [0x02,0x10,0xa0,0xe1]
66         mov r1,r2
67
68 @ CHECK: mvn    r1, r2 @ encoding: [0x02,0x10,0xe0,0xe1]
69         mvn r1,r2
70
71 @ CHECK: mvns   r1, r2 @ encoding: [0x02,0x10,0xf0,0xe1]
72         mvns r1,r2
73
74 @ CHECK: rsb    r1, r2, r3 @ encoding: [0x03,0x10,0x62,0xe0]
75         rsb r1,r2,r3
76
77 @ CHECK: rsc    r1, r2, r3 @ encoding: [0x03,0x10,0xe2,0xe0]
78         rsc r1,r2,r3
79
80 @ CHECK: mlas   r1, r2, r3, r4 @ encoding: [0x92,0x43,0x31,0xe0]
81         mlas r1,r2,r3,r4
82
83 @ CHECK: bfi  r0, r0, #5, #7 @ encoding: [0x90,0x02,0xcb,0xe7]
84         bfi  r0, r0, #5, #7
85
86 @ CHECK: bkpt  #10 @ encoding: [0x7a,0x00,0x20,0xe1]
87         bkpt  #10
88
89 @ CHECK: mrs  r8, cpsr @ encoding: [0x00,0x80,0x0f,0xe1]
90         mrs  r8, cpsr
91
92 @ CHECK: mrc  p14, #0, r1, c1, c2, #4 @ encoding: [0x92,0x1e,0x11,0xee]
93         mrc  p14, #0, r1, c1, c2, #4
94 @ CHECK: mrrc  p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0xec]
95         mrrc  p7, #1, r5, r4, c1
96
97 @ CHECK: mrc2  p14, #0, r1, c1, c2, #4 @ encoding: [0x92,0x1e,0x11,0xfe]
98         mrc2  p14, #0, r1, c1, c2, #4
99 @ CHECK: mrrc2  p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0xfc]
100         mrrc2  p7, #1, r5, r4, c1
101
102 @ CHECK: cdp  p7, #1, c1, c1, c1, #4 @ encoding: [0x81,0x17,0x11,0xee]
103         cdp  p7, #1, c1, c1, c1, #4
104 @ CHECK: cdp2  p7, #1, c1, c1, c1, #4 @ encoding: [0x81,0x17,0x11,0xfe]
105         cdp2  p7, #1, c1, c1, c1, #4
106
107 @ CHECK: qadd  r1, r2, r3 @ encoding: [0x52,0x10,0x03,0xe1]
108         qadd  r1, r2, r3
109
110 @ CHECK: qsub  r1, r2, r3 @ encoding: [0x52,0x10,0x23,0xe1]
111         qsub  r1, r2, r3
112
113 @ CHECK: qdadd  r1, r2, r3 @ encoding: [0x52,0x10,0x43,0xe1]
114         qdadd  r1, r2, r3
115
116 @ CHECK: qdsub  r1, r2, r3 @ encoding: [0x52,0x10,0x63,0xe1]
117         qdsub  r1, r2, r3
118
119 @ CHECK: wfe @ encoding: [0x02,0xf0,0x20,0xe3]
120         wfe
121
122 @ CHECK: wfi @ encoding: [0x03,0xf0,0x20,0xe3]
123         wfi
124
125 @ CHECK: yield @ encoding: [0x01,0xf0,0x20,0xe3]
126         yield
127
128 @ CHECK: nop @ encoding: [0x00,0xf0,0x20,0xe3]
129         nop
130
131 @ CHECK: cpsie  aif @ encoding: [0xc0,0x01,0x08,0xf1]
132         cpsie  aif
133
134 @ CHECK: cps  #15 @ encoding: [0x0f,0x00,0x02,0xf1]
135         cps  #15
136
137 @ CHECK: cpsie  if, #10 @ encoding: [0xca,0x00,0x0a,0xf1]
138         cpsie  if, #10
139
140 @ CHECK: msr  cpsr_fc, r0 @ encoding: [0x00,0xf0,0x29,0xe1]
141         msr  apsr, r0
142
143 @ CHECK: msr  cpsr_s, r0 @ encoding: [0x00,0xf0,0x24,0xe1]
144         msr  apsr_g, r0
145
146 @ CHECK: msr  cpsr_f, r0 @ encoding: [0x00,0xf0,0x28,0xe1]
147         msr  apsr_nzcvq, r0
148
149 @ CHECK: msr  cpsr_fs, r0 @ encoding: [0x00,0xf0,0x2c,0xe1]
150         msr  apsr_nzcvqg, r0
151
152 @ CHECK: msr  cpsr_fc, r0 @ encoding: [0x00,0xf0,0x29,0xe1]
153         msr  cpsr_fc, r0
154
155 @ CHECK: msr  cpsr_c, r0 @ encoding: [0x00,0xf0,0x21,0xe1]
156         msr  cpsr_c, r0
157
158 @ CHECK: msr  cpsr_x, r0 @ encoding: [0x00,0xf0,0x22,0xe1]
159         msr  cpsr_x, r0
160
161 @ CHECK: msr  cpsr_fc, r0 @ encoding: [0x00,0xf0,0x29,0xe1]
162         msr  cpsr_fc, r0
163
164 @ CHECK: msr  cpsr_fc, r0 @ encoding: [0x00,0xf0,0x29,0xe1]
165         msr  cpsr_all, r0
166
167 @ CHECK: msr  cpsr_fsx, r0 @ encoding: [0x00,0xf0,0x2e,0xe1]
168         msr  cpsr_fsx, r0
169
170 @ CHECK: msr  spsr_fc, r0 @ encoding: [0x00,0xf0,0x69,0xe1]
171         msr  spsr_fc, r0
172
173 @ CHECK: msr  spsr_fsxc, r0 @ encoding: [0x00,0xf0,0x6f,0xe1]
174         msr  spsr_fsxc, r0
175
176 @ CHECK: msr  cpsr_fsxc, r0 @ encoding: [0x00,0xf0,0x2f,0xe1]
177         msr  cpsr_fsxc, r0
178
179 @ CHECK: add    r1, r2, r3, lsl r4      @ encoding: [0x13,0x14,0x82,0xe0]
180   add r1, r2, r3, lsl r4
181
182 @ CHECK: strexb  r0, r1, [r2] @ encoding: [0x91,0x0f,0xc2,0xe1]
183         strexb  r0, r1, [r2]
184
185 @ CHECK: strexh  r0, r1, [r2] @ encoding: [0x91,0x0f,0xe2,0xe1]
186         strexh  r0, r1, [r2]
187
188 @ CHECK: strex  r0, r1, [r2] @ encoding: [0x91,0x0f,0x82,0xe1]
189         strex  r0, r1, [r2]
190
191 @ CHECK: strexd  r0, r2, r3, [r1] @ encoding: [0x92,0x0f,0xa1,0xe1]
192         strexd  r0, r2, r3, [r1]
193
194 @ CHECK: ldrexb  r0, [r0] @ encoding: [0x9f,0x0f,0xd0,0xe1]
195         ldrexb  r0, [r0]
196
197 @ CHECK: ldrexh  r0, [r0] @ encoding: [0x9f,0x0f,0xf0,0xe1]
198         ldrexh  r0, [r0]
199
200 @ CHECK: ldrex  r0, [r0] @ encoding: [0x9f,0x0f,0x90,0xe1]
201         ldrex  r0, [r0]
202
203 @ CHECK: ldrexd  r0, r1, [r0] @ encoding: [0x9f,0x0f,0xb0,0xe1]
204         ldrexd  r0, r1, [r0]
205
206 @ CHECK: ssat16  r0, #7, r0 @ encoding: [0x30,0x0f,0xa6,0xe6]
207         ssat16  r0, #7, r0
208