Tweak Thumb1 ADD encoding selection a bit.
[oota-llvm.git] / test / MC / ARM / basic-thumb-instructions.s
1 @ RUN: llvm-mc -triple=thumbv6-apple-darwin -show-encoding < %s | FileCheck %s
2   .syntax unified
3   .globl _func
4
5 @ Check that the assembler can handle the documented syntax from the ARM ARM.
6 @ For complex constructs like shifter operands, check more thoroughly for them
7 @ once then spot check that following instructions accept the form generally.
8 @ This gives us good coverage while keeping the overall size of the test
9 @ more reasonable.
10
11
12 @ FIXME: Some 3-operand instructions have a 2-operand assembly syntax.
13
14 _func:
15 @ CHECK: _func
16
17 @------------------------------------------------------------------------------
18 @ ADC (register)
19 @------------------------------------------------------------------------------
20         adcs r4, r6
21
22 @ CHECK: adcs   r4, r6                  @ encoding: [0x74,0x41]
23
24
25 @------------------------------------------------------------------------------
26 @ ADD (immediate)
27 @------------------------------------------------------------------------------
28         adds r1, r2, #3
29 @ When Rd is not explicitly specified, encoding T2 is preferred even though
30 @ the literal is in the range [0,7] which would allow encoding T1.
31         adds r2, #3
32         adds r2, #8
33
34 @ CHECK: adds   r1, r2, #3              @ encoding: [0xd1,0x1c]
35 @ CHECK: adds   r2, #3                  @ encoding: [0x03,0x32]
36 @ CHECK: adds   r2, #8                  @ encoding: [0x08,0x32]
37
38
39 @------------------------------------------------------------------------------
40 @ ADD (register)
41 @------------------------------------------------------------------------------
42         adds r1, r2, r3
43         add r2, r8
44
45 @ CHECK: adds   r1, r2, r3              @ encoding: [0xd1,0x18]
46 @ CHECK: add    r2, r8                  @ encoding: [0x42,0x44]
47
48
49 @------------------------------------------------------------------------------
50 @ ADD (SP plus immediate)
51 @------------------------------------------------------------------------------
52         add sp, #4
53         add sp, #508
54         add sp, sp, #4
55         add r2, sp, #8
56         add r2, sp, #1020
57
58 @ CHECK: add    sp, #4                  @ encoding: [0x01,0xb0]
59 @ CHECK: add    sp, #508                @ encoding: [0x7f,0xb0]
60 @ CHECK: add    sp, #4                  @ encoding: [0x01,0xb0]
61 @ CHECK: add    r2, sp, #8              @ encoding: [0x02,0xaa]
62 @ CHECK: add    r2, sp, #1020           @ encoding: [0xff,0xaa]
63
64
65 @------------------------------------------------------------------------------
66 @ ADD (SP plus register)
67 @------------------------------------------------------------------------------
68         add sp, r3
69         add r2, sp, r2
70
71 @ CHECK: add    sp, r3                  @ encoding: [0x9d,0x44]
72 @ CHECK: add    r2, sp, r2              @ encoding: [0x6a,0x44]
73
74
75 @------------------------------------------------------------------------------
76 @ ADR
77 @------------------------------------------------------------------------------
78         adr r2, _baz
79         adr     r2, #3
80
81 @ CHECK: adr    r2, _baz                @ encoding: [A,0xa2]
82             @   fixup A - offset: 0, value: _baz, kind: fixup_thumb_adr_pcrel_10
83 @ CHECK: adr    r2, #3                  @ encoding: [0x03,0xa2]
84
85 @------------------------------------------------------------------------------
86 @ ASR (immediate)
87 @------------------------------------------------------------------------------
88         asrs r2, r3, #32
89         asrs r2, r3, #5
90         asrs r2, r3, #1
91
92 @ CHECK: asrs   r2, r3, #32             @ encoding: [0x1a,0x10]
93 @ CHECK: asrs   r2, r3, #5              @ encoding: [0x5a,0x11]
94 @ CHECK: asrs   r2, r3, #1              @ encoding: [0x5a,0x10]
95
96
97 @------------------------------------------------------------------------------
98 @ ASR (register)
99 @------------------------------------------------------------------------------
100         asrs r5, r2
101
102 @ CHECK: asrs   r5, r2                  @ encoding: [0x15,0x41]
103
104
105 @------------------------------------------------------------------------------
106 @ B
107 @------------------------------------------------------------------------------
108         b _baz
109         beq _bar
110         b       #1838
111         b       #-420
112
113 @ CHECK: b      _baz                    @ encoding: [A,0xe0'A']
114              @   fixup A - offset: 0, value: _baz, kind: fixup_arm_thumb_br
115 @ CHECK: beq    _bar                    @ encoding: [A,0xd0]
116              @   fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_bcc
117 @ CHECK: b       #1838                   @ encoding: [0x97,0xe3]
118 @ CHECK: b       #-420                   @ encoding: [0x2e,0xe7]
119
120 @------------------------------------------------------------------------------
121 @ BICS
122 @------------------------------------------------------------------------------
123         bics r1, r6
124
125 @ CHECK: bics   r1, r6                  @ encoding: [0xb1,0x43]
126
127
128 @------------------------------------------------------------------------------
129 @ BKPT
130 @------------------------------------------------------------------------------
131         bkpt #0
132         bkpt #255
133
134 @ CHECK: bkpt   #0                      @ encoding: [0x00,0xbe]
135 @ CHECK: bkpt   #255                    @ encoding: [0xff,0xbe]
136
137
138 @------------------------------------------------------------------------------
139 @ BL/BLX (immediate)
140 @------------------------------------------------------------------------------
141         bl _bar
142         blx _baz
143
144 @ CHECK: bl     _bar                    @ encoding: [A,0xf0'A',A,0xf8'A']
145              @   fixup A - offset: 0, value: _bar, kind: fixup_arm_thumb_bl
146 @ CHECK: blx    _baz                    @ encoding: [A,0xf0'A',A,0xe8'A']
147              @   fixup A - offset: 0, value: _baz, kind: fixup_arm_thumb_blx
148
149
150 @------------------------------------------------------------------------------
151 @ BLX (register)
152 @------------------------------------------------------------------------------
153         blx r4
154
155 @ CHECK: blx    r4                      @ encoding: [0xa0,0x47]
156
157
158 @------------------------------------------------------------------------------
159 @ BX
160 @------------------------------------------------------------------------------
161         bx r2
162
163 @ CHECK: bx     r2                      @ encoding: [0x10,0x47]
164
165
166 @------------------------------------------------------------------------------
167 @ CMN
168 @------------------------------------------------------------------------------
169
170         cmn r5, r1
171
172 @ CHECK: cmn    r5, r1                  @ encoding: [0xcd,0x42]
173
174
175 @------------------------------------------------------------------------------
176 @ CMP
177 @------------------------------------------------------------------------------
178         cmp r6, #32
179         cmp r3, r4
180         cmp r8, r1
181
182 @ CHECK: cmp    r6, #32                 @ encoding: [0x20,0x2e]
183 @ CHECK: cmp    r3, r4                  @ encoding: [0xa3,0x42]
184 @ CHECK: cmp    r8, r1                  @ encoding: [0x88,0x45]
185
186 @------------------------------------------------------------------------------
187 @ EOR
188 @------------------------------------------------------------------------------
189         eors r4, r5
190
191 @ CHECK: eors   r4, r5                  @ encoding: [0x6c,0x40]
192
193
194 @------------------------------------------------------------------------------
195 @ LDM
196 @------------------------------------------------------------------------------
197         ldm r3, {r0, r1, r2, r3, r4, r5, r6, r7}
198         ldm r2!, {r1, r3, r4, r5, r7}
199         ldm r1, {r1}
200
201 @ CHECK: ldm    r3, {r0, r1, r2, r3, r4, r5, r6, r7} @ encoding: [0xff,0xcb]
202 @ CHECK: ldm    r2!, {r1, r3, r4, r5, r7} @ encoding: [0xba,0xca]
203 @ CHECK: ldm    r1, {r1}                @ encoding: [0x02,0xc9]
204
205
206 @------------------------------------------------------------------------------
207 @ LDR (immediate)
208 @------------------------------------------------------------------------------
209         ldr r1, [r5]
210         ldr r2, [r6, #32]
211         ldr r3, [r7, #124]
212         ldr r1, [sp]
213         ldr r2, [sp, #24]
214         ldr r3, [sp, #1020]
215
216
217 @ CHECK: ldr    r1, [r5]                @ encoding: [0x29,0x68]
218 @ CHECK: ldr    r2, [r6, #32]           @ encoding: [0x32,0x6a]
219 @ CHECK: ldr    r3, [r7, #124]          @ encoding: [0xfb,0x6f]
220 @ CHECK: ldr    r1, [sp]                @ encoding: [0x00,0x99]
221 @ CHECK: ldr    r2, [sp, #24]           @ encoding: [0x06,0x9a]
222 @ CHECK: ldr    r3, [sp, #1020]         @ encoding: [0xff,0x9b]
223
224
225 @------------------------------------------------------------------------------
226 @ LDR (literal)
227 @------------------------------------------------------------------------------
228         ldr r1, _foo
229         ldr     r3, #604
230         ldr     r3, #368
231
232 @ CHECK: ldr    r1, _foo                @ encoding: [A,0x49]
233              @   fixup A - offset: 0, value: _foo, kind: fixup_arm_thumb_cp
234 @ CHECK: ldr     r3, #604                @ encoding: [0x97,0x4b]
235 @ CHECK: ldr     r3, #368                @ encoding: [0x5c,0x4b]
236
237 @------------------------------------------------------------------------------
238 @ LDR (register)
239 @------------------------------------------------------------------------------
240         ldr r1, [r2, r3]
241
242 @ CHECK: ldr    r1, [r2, r3]            @ encoding: [0xd1,0x58]
243
244
245 @------------------------------------------------------------------------------
246 @ LDRB (immediate)
247 @------------------------------------------------------------------------------
248         ldrb r4, [r3]
249         ldrb r5, [r6, #0]
250         ldrb r6, [r7, #31]
251
252 @ CHECK: ldrb   r4, [r3]                @ encoding: [0x1c,0x78]
253 @ CHECK: ldrb   r5, [r6]                @ encoding: [0x35,0x78]
254 @ CHECK: ldrb   r6, [r7, #31]           @ encoding: [0xfe,0x7f]
255
256
257 @------------------------------------------------------------------------------
258 @ LDRB (register)
259 @------------------------------------------------------------------------------
260         ldrb r6, [r4, r5]
261
262 @ CHECK: ldrb   r6, [r4, r5]            @ encoding: [0x66,0x5d]
263
264
265 @------------------------------------------------------------------------------
266 @ LDRH (immediate)
267 @------------------------------------------------------------------------------
268         ldrh r3, [r3]
269         ldrh r4, [r6, #2]
270         ldrh r5, [r7, #62]
271
272 @ CHECK: ldrh   r3, [r3]                @ encoding: [0x1b,0x88]
273 @ CHECK: ldrh   r4, [r6, #2]            @ encoding: [0x74,0x88]
274 @ CHECK: ldrh   r5, [r7, #62]           @ encoding: [0xfd,0x8f]
275
276
277 @------------------------------------------------------------------------------
278 @ LDRH (register)
279 @------------------------------------------------------------------------------
280         ldrh r6, [r2, r6]
281
282 @ CHECK: ldrh   r6, [r2, r6]            @ encoding: [0x96,0x5b]
283
284
285 @------------------------------------------------------------------------------
286 @ LDRSB/LDRSH
287 @------------------------------------------------------------------------------
288         ldrsb r6, [r2, r6]
289         ldrsh r3, [r7, r1]
290
291 @ CHECK: ldrsb  r6, [r2, r6]            @ encoding: [0x96,0x57]
292 @ CHECK: ldrsh  r3, [r7, r1]            @ encoding: [0x7b,0x5e]
293
294
295 @------------------------------------------------------------------------------
296 @ LSL (immediate)
297 @------------------------------------------------------------------------------
298         lsls r4, r5, #0
299         lsls r4, r5, #4
300
301 @ CHECK: lsls   r4, r5, #0              @ encoding: [0x2c,0x00]
302 @ CHECK: lsls   r4, r5, #4              @ encoding: [0x2c,0x01]
303
304
305 @------------------------------------------------------------------------------
306 @ LSL (register)
307 @------------------------------------------------------------------------------
308         lsls r2, r6
309
310 @ CHECK: lsls   r2, r6                  @ encoding: [0xb2,0x40]
311
312
313 @------------------------------------------------------------------------------
314 @ LSR (immediate)
315 @------------------------------------------------------------------------------
316         lsrs r1, r3, #1
317         lsrs r1, r3, #32
318
319 @ CHECK: lsrs   r1, r3, #1              @ encoding: [0x59,0x08]
320 @ CHECK: lsrs   r1, r3, #32             @ encoding: [0x19,0x08]
321
322
323 @------------------------------------------------------------------------------
324 @ LSR (register)
325 @------------------------------------------------------------------------------
326         lsrs r2, r6
327
328 @ CHECK: lsrs   r2, r6                  @ encoding: [0xf2,0x40]
329
330
331 @------------------------------------------------------------------------------
332 @ MOV (immediate)
333 @------------------------------------------------------------------------------
334         movs r2, #0
335         movs r2, #255
336         movs r2, #23
337
338 @ CHECK: movs   r2, #0                  @ encoding: [0x00,0x22]
339 @ CHECK: movs   r2, #255                @ encoding: [0xff,0x22]
340 @ CHECK: movs   r2, #23                 @ encoding: [0x17,0x22]
341
342
343 @------------------------------------------------------------------------------
344 @ MOV (register)
345 @------------------------------------------------------------------------------
346         mov r3, r4
347         movs r1, r3
348
349 @ CHECK: mov    r3, r4                  @ encoding: [0x23,0x46]
350 @ CHECK: movs   r1, r3                  @ encoding: [0x19,0x00]
351
352
353 @------------------------------------------------------------------------------
354 @ MUL
355 @------------------------------------------------------------------------------
356         muls r1, r2, r1
357         muls r3, r4
358
359 @ CHECK: muls   r1, r2, r1              @ encoding: [0x51,0x43]
360 @ CHECK: muls   r3, r4, r3              @ encoding: [0x63,0x43]
361
362
363 @------------------------------------------------------------------------------
364 @ MVN
365 @------------------------------------------------------------------------------
366         mvns r6, r3
367
368 @ CHECK: mvns   r6, r3                  @ encoding: [0xde,0x43]
369
370
371 @------------------------------------------------------------------------------
372 @ NEG
373 @------------------------------------------------------------------------------
374         negs r3, r4
375
376 @ CHECK: rsbs   r3, r4, #0              @ encoding: [0x63,0x42]
377
378
379 @------------------------------------------------------------------------------
380 @ NOP
381 @------------------------------------------------------------------------------
382         nop
383
384 @ CHECK: nop                            @ encoding: [0xc0,0x46]
385
386
387 @------------------------------------------------------------------------------
388 @ ORR
389 @------------------------------------------------------------------------------
390         orrs  r3, r4
391
392 @ CHECK-ERRORS:         orrs    r3, r4                  @ encoding: [0x23,0x43]
393
394
395 @------------------------------------------------------------------------------
396 @ POP
397 @------------------------------------------------------------------------------
398         pop {r2, r3, r6}
399
400 @ CHECK: pop    {r2, r3, r6}            @ encoding: [0x4c,0xbc]
401
402
403 @------------------------------------------------------------------------------
404 @ PUSH
405 @------------------------------------------------------------------------------
406         push {r1, r2, r7}
407
408 @ CHECK: push   {r1, r2, r7}            @ encoding: [0x86,0xb4]
409
410
411 @------------------------------------------------------------------------------
412 @ REV/REV16/REVSH
413 @------------------------------------------------------------------------------
414         rev r6, r3
415         rev16 r7, r2
416         revsh r5, r1
417
418 @ CHECK: rev    r6, r3                  @ encoding: [0x1e,0xba]
419 @ CHECK: rev16  r7, r2                  @ encoding: [0x57,0xba]
420 @ CHECK: revsh  r5, r1                  @ encoding: [0xcd,0xba]
421
422
423 @------------------------------------------------------------------------------
424 @ ROR
425 @------------------------------------------------------------------------------
426         rors r2, r7
427
428 @ CHECK: rors   r2, r7                  @ encoding: [0xfa,0x41]
429
430
431 @------------------------------------------------------------------------------
432 @ RSB
433 @------------------------------------------------------------------------------
434         rsbs r1, r3, #0
435
436 @ CHECK: rsbs   r1, r3, #0              @ encoding: [0x59,0x42]
437
438
439 @------------------------------------------------------------------------------
440 @ SBC
441 @------------------------------------------------------------------------------
442         sbcs r4, r3
443
444 @ CHECK: sbcs   r4, r3                  @ encoding: [0x9c,0x41]
445
446
447 @------------------------------------------------------------------------------
448 @ SETEND
449 @------------------------------------------------------------------------------
450         setend be
451         setend le
452
453 @ CHECK: setend be                      @ encoding: [0x58,0xb6]
454 @ CHECK: setend le                      @ encoding: [0x50,0xb6]
455
456
457 @------------------------------------------------------------------------------
458 @ STM
459 @------------------------------------------------------------------------------
460         stm r1!, {r2, r6}
461         stm r1!, {r1, r2, r3, r7}
462
463 @ CHECK: stm    r1!, {r2, r6}           @ encoding: [0x44,0xc1]
464 @ CHECK: stm    r1!, {r1, r2, r3, r7}   @ encoding: [0x8e,0xc1]
465
466
467 @------------------------------------------------------------------------------
468 @ STR (immediate)
469 @------------------------------------------------------------------------------
470         str r2, [r7]
471         str r2, [r7, #0]
472         str r5, [r1, #4]
473         str r3, [r7, #124]
474         str r2, [sp]
475         str r3, [sp, #0]
476         str r4, [sp, #20]
477         str r5, [sp, #1020]
478
479 @ CHECK: str    r2, [r7]                @ encoding: [0x3a,0x60]
480 @ CHECK: str    r2, [r7]                @ encoding: [0x3a,0x60]
481 @ CHECK: str    r5, [r1, #4]            @ encoding: [0x4d,0x60]
482 @ CHECK: str    r3, [r7, #124]          @ encoding: [0xfb,0x67]
483 @ CHECK: str    r2, [sp]                @ encoding: [0x00,0x92]
484 @ CHECK: str    r3, [sp]                @ encoding: [0x00,0x93]
485 @ CHECK: str    r4, [sp, #20]           @ encoding: [0x05,0x94]
486 @ CHECK: str    r5, [sp, #1020]         @ encoding: [0xff,0x95]
487
488
489 @------------------------------------------------------------------------------
490 @ STR (register)
491 @------------------------------------------------------------------------------
492         str r2, [r7, r3]
493
494 @ CHECK: str    r2, [r7, r3]            @ encoding: [0xfa,0x50]
495
496
497 @------------------------------------------------------------------------------
498 @ STRB (immediate)
499 @------------------------------------------------------------------------------
500         strb r4, [r3]
501         strb r5, [r6, #0]
502         strb r6, [r7, #31]
503
504 @ CHECK: strb   r4, [r3]                @ encoding: [0x1c,0x70]
505 @ CHECK: strb   r5, [r6]                @ encoding: [0x35,0x70]
506 @ CHECK: strb   r6, [r7, #31]           @ encoding: [0xfe,0x77]
507
508
509 @------------------------------------------------------------------------------
510 @ STRB (register)
511 @------------------------------------------------------------------------------
512         strb r6, [r4, r5]
513
514 @ CHECK: strb   r6, [r4, r5]            @ encoding: [0x66,0x55]
515
516
517 @------------------------------------------------------------------------------
518 @ STRH (immediate)
519 @------------------------------------------------------------------------------
520         strh r3, [r3]
521         strh r4, [r6, #2]
522         strh r5, [r7, #62]
523
524 @ CHECK: strh   r3, [r3]                @ encoding: [0x1b,0x80]
525 @ CHECK: strh   r4, [r6, #2]            @ encoding: [0x74,0x80]
526 @ CHECK: strh   r5, [r7, #62]           @ encoding: [0xfd,0x87]
527
528
529 @------------------------------------------------------------------------------
530 @ STRH (register)
531 @------------------------------------------------------------------------------
532         strh r6, [r2, r6]
533
534 @ CHECK: strh   r6, [r2, r6]            @ encoding: [0x96,0x53]
535
536
537 @------------------------------------------------------------------------------
538 @ SUB (immediate)
539 @------------------------------------------------------------------------------
540         subs r1, r2, #3
541         subs r2, #3
542         subs r2, #8
543
544 @ CHECK: subs   r1, r2, #3              @ encoding: [0xd1,0x1e]
545 @ CHECK: subs   r2, #3                  @ encoding: [0x03,0x3a]
546 @ CHECK: subs   r2, #8                  @ encoding: [0x08,0x3a]
547
548
549 @------------------------------------------------------------------------------
550 @ SUB (SP minus immediate)
551 @------------------------------------------------------------------------------
552         sub sp, #12
553         sub sp, sp, #508
554
555 @ CHECK: sub    sp, #12                 @ encoding: [0x83,0xb0]
556 @ CHECK: sub    sp, #508                @ encoding: [0xff,0xb0]
557
558
559 @------------------------------------------------------------------------------
560 @ SUB (register)
561 @------------------------------------------------------------------------------
562         subs r1, r2, r3
563
564 @ CHECK: subs   r1, r2, r3              @ encoding: [0xd1,0x1a]
565
566
567 @------------------------------------------------------------------------------
568 @ SVC
569 @------------------------------------------------------------------------------
570         svc #0
571         svc #255
572
573 @ CHECK: svc    #0                      @ encoding: [0x00,0xdf]
574 @ CHECK: svc    #255                    @ encoding: [0xff,0xdf]
575
576
577 @------------------------------------------------------------------------------
578 @ SXTB/SXTH
579 @------------------------------------------------------------------------------
580         sxtb r3, r5
581         sxth r3, r5
582
583 @ CHECK: sxtb   r3, r5                  @ encoding: [0x6b,0xb2]
584 @ CHECK: sxth   r3, r5                  @ encoding: [0x2b,0xb2]
585
586
587 @------------------------------------------------------------------------------
588 @ TST
589 @------------------------------------------------------------------------------
590         tst r6, r1
591
592 @ CHECK: tst    r6, r1                  @ encoding: [0x0e,0x42]
593
594
595 @------------------------------------------------------------------------------
596 @ UXTB/UXTH
597 @------------------------------------------------------------------------------
598         uxtb  r7, r2
599         uxth  r1, r4
600
601 @ CHECK: uxtb   r7, r2                  @ encoding: [0xd7,0xb2]
602 @ CHECK: uxth   r1, r4                  @ encoding: [0xa1,0xb2]
603
604
605 @------------------------------------------------------------------------------
606 @ WFE/WFI/YIELD
607 @------------------------------------------------------------------------------
608         wfe
609         wfi
610         yield
611
612 @ CHECK: wfe                             @ encoding: [0x20,0xbf]
613 @ CHECK: wfi                             @ encoding: [0x30,0xbf]
614 @ CHECK: yield                           @ encoding: [0x10,0xbf]