1 @ RUN: not llvm-mc -triple=armv7-apple-darwin < %s 2> %t
2 @ RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
3 @ RUN: not llvm-mc -triple=armv8 < %s 2> %t
4 @ RUN: FileCheck --check-prefix=CHECK-ERRORS-V8 < %t %s
6 @ Check for various assembly diagnostic messages on invalid input.
8 @ 's' bit on an instruction that can't accept it.
10 @ CHECK-ERRORS: error: instruction 'mls' can not set flags,
11 @ CHECK-ERRORS: but 's' suffix specified
14 @ Out of range shift immediate values.
15 adc r1, r2, r3, lsl #invalid
16 adc r4, r5, r6, lsl #-1
17 adc r4, r5, r6, lsl #32
18 adc r4, r5, r6, lsr #-1
19 adc r4, r5, r6, lsr #33
20 adc r4, r5, r6, asr #-1
21 adc r4, r5, r6, asr #33
22 adc r4, r5, r6, ror #-1
23 adc r4, r5, r6, ror #32
25 @ CHECK-ERRORS: error: invalid immediate shift value
26 @ CHECK-ERRORS: adc r1, r2, r3, lsl #invalid
28 @ CHECK-ERRORS: error: immediate shift value out of range
29 @ CHECK-ERRORS: adc r4, r5, r6, lsl #-1
31 @ CHECK-ERRORS: error: immediate shift value out of range
32 @ CHECK-ERRORS: adc r4, r5, r6, lsl #32
34 @ CHECK-ERRORS: error: immediate shift value out of range
35 @ CHECK-ERRORS: adc r4, r5, r6, lsr #-1
37 @ CHECK-ERRORS: error: immediate shift value out of range
38 @ CHECK-ERRORS: adc r4, r5, r6, lsr #33
40 @ CHECK-ERRORS: error: immediate shift value out of range
41 @ CHECK-ERRORS: adc r4, r5, r6, asr #-1
43 @ CHECK-ERRORS: error: immediate shift value out of range
44 @ CHECK-ERRORS: adc r4, r5, r6, asr #33
46 @ CHECK-ERRORS: error: immediate shift value out of range
47 @ CHECK-ERRORS: adc r4, r5, r6, ror #-1
49 @ CHECK-ERRORS: error: immediate shift value out of range
50 @ CHECK-ERRORS: adc r4, r5, r6, ror #32
52 @ Out of range shift immediate values for load/store.
53 str r1, [r2, r3, lsl #invalid]
54 ldr r4, [r5], r6, lsl #-1
55 pld r4, [r5, r6, lsl #32]
56 str r4, [r5], r6, lsr #-1
57 ldr r4, [r5, r6, lsr #33]
58 pld r4, [r5, r6, asr #-1]
59 str r4, [r5, r6, asr #33]
60 ldr r4, [r5, r6, ror #-1]
61 pld r4, [r5, r6, ror #32]
62 pld r4, [r5, r6, rrx #0]
64 @ CHECK-ERRORS: error: shift amount must be an immediate
65 @ CHECK-ERRORS: str r1, [r2, r3, lsl #invalid]
67 @ CHECK-ERRORS: error: immediate shift value out of range
68 @ CHECK-ERRORS: ldr r4, [r5], r6, lsl #-1
70 @ CHECK-ERRORS: error: immediate shift value out of range
71 @ CHECK-ERRORS: pld r4, [r5, r6, lsl #32]
73 @ CHECK-ERRORS: error: immediate shift value out of range
74 @ CHECK-ERRORS: str r4, [r5], r6, lsr #-1
76 @ CHECK-ERRORS: error: immediate shift value out of range
77 @ CHECK-ERRORS: ldr r4, [r5, r6, lsr #33]
79 @ CHECK-ERRORS: error: immediate shift value out of range
80 @ CHECK-ERRORS: pld r4, [r5, r6, asr #-1]
82 @ CHECK-ERRORS: error: immediate shift value out of range
83 @ CHECK-ERRORS: str r4, [r5, r6, asr #33]
85 @ CHECK-ERRORS: error: immediate shift value out of range
86 @ CHECK-ERRORS: ldr r4, [r5, r6, ror #-1]
88 @ CHECK-ERRORS: error: immediate shift value out of range
89 @ CHECK-ERRORS: pld r4, [r5, r6, ror #32]
90 @ CHECK-ERRORS: error: ']' expected
91 @ CHECK-ERRORS: pld r4, [r5, r6, rrx #0]
93 @ Out of range 16-bit immediate on BKPT
96 @ CHECK-ERRORS: error: invalid operand for instruction
98 @ Out of range immediates for v8 HLT instruction.
101 @CHECK-ERRORS-V8: error: invalid operand for instruction
102 @CHECK-ERRORS-V8: hlt #65536
104 @CHECK-ERRORS-V8: error: invalid operand for instruction
105 @CHECK-ERRORS-V8: hlt #-1
108 @ Illegal condition code for v8 HLT instruction.
111 @CHECK-ERRORS-V8: error: instruction 'hlt' is not predicable, but condition code specified
112 @CHECK-ERRORS-V8: hlteq #2
114 @CHECK-ERRORS-V8: error: instruction 'hlt' is not predicable, but condition code specified
115 @CHECK-ERRORS-V8: hltlt #23
118 @ Out of range 4 and 3 bit immediates on CDP[2]
120 @ Out of range immediates for CDP/CDP2
121 cdp p7, #2, c1, c1, c1, #8
122 cdp p7, #1, c1, c1, c1, #8
123 cdp2 p7, #2, c1, c1, c1, #8
124 cdp2 p7, #1, c1, c1, c1, #8
126 @ CHECK-ERRORS: error: invalid operand for instruction
127 @ CHECK-ERRORS: error: invalid operand for instruction
128 @ CHECK-ERRORS: error: invalid operand for instruction
129 @ CHECK-ERRORS: error: invalid operand for instruction
131 @ Out of range immediates for DBG
135 @ CHECK-ERRORS: error: immediate operand must be in the range [0,15]
136 @ CHECK-ERRORS: error: immediate operand must be in the range [0,15]
137 @ Double-check that we're synced up with the right diagnostics.
138 @ CHECK-ERRORS: dbg #16
140 @ Out of range immediate for MCR/MCR2/MCRR/MCRR2
141 mcr p7, #8, r5, c1, c1, #4
142 mcr p7, #2, r5, c1, c1, #8
143 mcr2 p7, #8, r5, c1, c1, #4
144 mcr2 p7, #1, r5, c1, c1, #8
145 mcrr p7, #16, r5, r4, c1
146 mcrr2 p7, #16, r5, r4, c1
147 @ CHECK-ERRORS: error: invalid operand for instruction
148 @ CHECK-ERRORS: error: invalid operand for instruction
149 @ CHECK-ERRORS: error: invalid operand for instruction
150 @ CHECK-ERRORS: error: invalid operand for instruction
151 @ CHECK-ERRORS: error: immediate operand must be in the range [0,15]
152 @ CHECK-ERRORS: error: immediate operand must be in the range [0,15]
154 @ p10 and p11 are reserved for NEON
155 mcr p10, #2, r5, c1, c1, #4
156 mcrr p11, #8, r5, r4, c1
157 @ CHECK-ERRORS: error: invalid operand for instruction
158 @ CHECK-ERRORS: error: invalid operand for instruction
160 @ Out of range immediate for MOV
162 @ CHECK-ERRORS: error: invalid operand for instruction
164 @ Invalid 's' bit usage for MOVW
167 @ CHECK-ERRORS: error: invalid operand for instruction
168 @ CHECK-ERRORS: error: instruction 'movw' can not set flags, but 's' suffix specified
170 @ Out of range immediate for MOVT
172 @ CHECK-ERRORS: error: invalid operand for instruction
174 @ Out of range immediates for MRC/MRC2/MRRC/MRRC2
175 mrc p14, #8, r1, c1, c2, #4
176 mrc p14, #1, r1, c1, c2, #8
177 mrc2 p14, #8, r1, c1, c2, #4
178 mrc2 p14, #0, r1, c1, c2, #9
179 mrrc p7, #16, r5, r4, c1
180 mrrc2 p7, #17, r5, r4, c1
181 @ CHECK-ERRORS: error: invalid operand for instruction
182 @ CHECK-ERRORS: error: invalid operand for instruction
183 @ CHECK-ERRORS: error: invalid operand for instruction
184 @ CHECK-ERRORS: error: invalid operand for instruction
185 @ CHECK-ERRORS: error: immediate operand must be in the range [0,15]
186 @ CHECK-ERRORS: error: immediate operand must be in the range [0,15]
188 @ Shifter operand validation for PKH instructions.
189 pkhbt r2, r2, r3, lsl #-1
190 pkhbt r2, r2, r3, lsl #32
191 pkhtb r2, r2, r3, asr #0
192 pkhtb r2, r2, r3, asr #33
193 pkhbt r2, r2, r3, asr #3
194 pkhtb r2, r2, r3, lsl #3
196 @ CHECK-ERRORS: error: immediate value out of range
197 @ CHECK-ERRORS: pkhbt r2, r2, r3, lsl #-1
199 @ CHECK-ERRORS: error: immediate value out of range
200 @ CHECK-ERRORS: pkhbt r2, r2, r3, lsl #32
202 @ CHECK-ERRORS: error: immediate value out of range
203 @ CHECK-ERRORS: pkhtb r2, r2, r3, asr #0
205 @ CHECK-ERRORS: error: immediate value out of range
206 @ CHECK-ERRORS: pkhtb r2, r2, r3, asr #33
208 @ CHECK-ERRORS: error: lsl operand expected.
209 @ CHECK-ERRORS: pkhbt r2, r2, r3, asr #3
211 @ CHECK-ERRORS: error: asr operand expected.
212 @ CHECK-ERRORS: pkhtb r2, r2, r3, lsl #3
216 @ bad values for SETEND
221 @ CHECK-ERRORS: error: instruction 'setend' is not predicable, but condition code specified
222 @ CHECK-ERRORS: setendne be
224 @ CHECK-ERRORS: error: 'be' or 'le' operand expected
225 @ CHECK-ERRORS: setend me
227 @ CHECK-ERRORS: error: 'be' or 'le' operand expected
228 @ CHECK-ERRORS: setend 1
232 @ Out of range immediates and bad shift types for SSAT
233 ssat r8, #0, r10, lsl #8
234 ssat r8, #33, r10, lsl #8
235 ssat r8, #1, r10, lsl #-1
236 ssat r8, #1, r10, lsl #32
237 ssat r8, #1, r10, asr #0
238 ssat r8, #1, r10, asr #33
239 ssat r8, #1, r10, lsr #5
240 ssat r8, #1, r10, lsl fred
241 ssat r8, #1, r10, lsl #fred
243 @ CHECK-ERRORS: error: invalid operand for instruction
244 @ CHECK-ERRORS: ssat r8, #0, r10, lsl #8
246 @ CHECK-ERRORS: error: invalid operand for instruction
247 @ CHECK-ERRORS: ssat r8, #33, r10, lsl #8
249 @ CHECK-ERRORS: error: 'lsr' shift amount must be in range [0,31]
250 @ CHECK-ERRORS: ssat r8, #1, r10, lsl #-1
252 @ CHECK-ERRORS: error: 'lsr' shift amount must be in range [0,31]
253 @ CHECK-ERRORS: ssat r8, #1, r10, lsl #32
255 @ CHECK-ERRORS: error: 'asr' shift amount must be in range [1,32]
256 @ CHECK-ERRORS: ssat r8, #1, r10, asr #0
258 @ CHECK-ERRORS: error: 'asr' shift amount must be in range [1,32]
259 @ CHECK-ERRORS: ssat r8, #1, r10, asr #33
261 @ CHECK-ERRORS: error: shift operator 'asr' or 'lsl' expected
262 @ CHECK-ERRORS: ssat r8, #1, r10, lsr #5
264 @ CHECK-ERRORS: error: '#' expected
265 @ CHECK-ERRORS: ssat r8, #1, r10, lsl fred
267 @ CHECK-ERRORS: error: shift amount must be an immediate
268 @ CHECK-ERRORS: ssat r8, #1, r10, lsl #fred
271 @ Out of range immediates for SSAT16
275 @ CHECK-ERRORS: error: invalid operand for instruction
276 @ CHECK-ERRORS: ssat16 r2, #0, r7
278 @ CHECK-ERRORS: error: invalid operand for instruction
279 @ CHECK-ERRORS: ssat16 r3, #17, r5
283 @ Out of order STM registers
286 @ CHECK-ERRORS: warning: register list not in ascending order
287 @ CHECK-ERRORS: stmda sp!, {r5, r2}
291 @ Out of range immediate on SVC
293 @ CHECK-ERRORS: error: invalid operand for instruction
294 @ CHECK-ERRORS: svc #0x1000000
298 @ Out of order Rt/Rt2 operands for ldrexd/strexd
300 strexd r6, r5, r3, [r8]
302 @ CHECK-ERRORS: error: destination operands must be sequential
303 @ CHECK-ERRORS: ldrexd r4, r3, [r8]
305 @ CHECK-ERRORS: error: source operands must be sequential
306 @ CHECK-ERRORS: strexd r6, r5, r3, [r8]
309 @ Illegal rotate operators for extend instructions
312 sxtb r8, r3, ror #8 -
313 sxtab r3, r8, r3, ror #(fred - wilma)
314 sxtab r7, r8, r3, ror #25
315 sxtah r9, r3, r3, ror #-8
316 sxtb16ge r2, r3, lsr #24
318 @ CHECK-ERRORS: error: invalid operand for instruction
319 @ CHECK-ERRORS: sxtb r8, r3, #8
321 @ CHECK-ERRORS: error: '#' expected
322 @ CHECK-ERRORS: sxtb r8, r3, ror 24
324 @ CHECK-ERRORS: error: unknown token in expression
325 @ CHECK-ERRORS: sxtb r8, r3, ror #8 -
327 @ CHECK-ERRORS: error: malformed rotate expression
328 @ CHECK-ERRORS: sxtb r8, r3, ror #8 -
330 @ CHECK-ERRORS: error: rotate amount must be an immediate
331 @ CHECK-ERRORS: sxtab r3, r8, r3, ror #(fred - wilma)
333 @ CHECK-ERRORS: error: 'ror' rotate amount must be 8, 16, or 24
334 @ CHECK-ERRORS: sxtab r7, r8, r3, ror #25
336 @ CHECK-ERRORS: error: 'ror' rotate amount must be 8, 16, or 24
337 @ CHECK-ERRORS: sxtah r9, r3, r3, ror #-8
339 @ CHECK-ERRORS: error: invalid operand for instruction
340 @ CHECK-ERRORS: sxtb16ge r2, r3, lsr #24
343 @ Out of range width for SBFX/UBFX
345 ubfxgt r4, r5, #16, #17
347 @ CHECK-ERRORS: error: bitfield width must be in range [1,32-lsb]
348 @ CHECK-ERRORS: sbfx r4, r5, #31, #2
350 @ CHECK-ERRORS: error: bitfield width must be in range [1,32-lsb]
351 @ CHECK-ERRORS: ubfxgt r4, r5, #16, #17
354 @ Using pc for SBFX/UBFX
359 @ CHECK-ERRORS: error: invalid operand for instruction
360 @ CHECK-ERRORS: sbfx pc, r2, #1, #3
362 @ CHECK-ERRORS: error: invalid operand for instruction
363 @ CHECK-ERRORS: sbfx sp, pc, #4, #5
365 @ CHECK-ERRORS: error: invalid operand for instruction
366 @ CHECK-ERRORS: ubfx pc, r0, #0, #31
368 @ CHECK-ERRORS: error: invalid operand for instruction
369 @ CHECK-ERRORS: ubfx r14, pc, #1, #2
372 @ Out of order Rt/Rt2 operands for ldrd
374 ldrd r4, r3, [r8, #8]!
375 ldrd r4, r3, [r8], #8
376 @ CHECK-ERRORS: error: destination operands must be sequential
377 @ CHECK-ERRORS: ldrd r4, r3, [r8]
379 @ CHECK-ERRORS: error: destination operands must be sequential
380 @ CHECK-ERRORS: ldrd r4, r3, [r8, #8]!
382 @ CHECK-ERRORS: error: destination operands must be sequential
383 @ CHECK-ERRORS: ldrd r4, r3, [r8], #8
387 @ Bad register lists for VFP.
389 @ CHECK-ERRORS: error: non-contiguous register range
390 @ CHECK-ERRORS: vpush {s0, s3}
393 @ Out of range coprocessor option immediate.
394 ldc2 p2, c8, [r1], { 256 }
395 ldc2 p2, c8, [r1], { -1 }
397 @ CHECK-ERRORS: error: coprocessor option must be an immediate in range [0, 255]
398 @ CHECK-ERRORS: ldc2 p2, c8, [r1], { 256 }
400 @ CHECK-ERRORS: error: coprocessor option must be an immediate in range [0, 255]
401 @ CHECK-ERRORS: ldc2 p2, c8, [r1], { -1 }
404 @ Bad CPS instruction format.
406 @ CHECK-ERRORS: error: invalid operand for instruction
407 @ CHECK-ERRORS: cps f,#1
410 @ Bad operands for msr
413 @ CHECK-ERRORS: error: invalid operand for instruction
414 @ CHECK-ERRORS: msr #0, #0
416 @ CHECK-ERRORS: error: invalid operand for instruction
417 @ CHECK-ERRORS: msr foo, #0
422 @ CHECK-ERRORS: error: immediate value out of range
423 @ CHECK-ERRORS: error: immediate value out of range
426 @ CHECK-ERRORS: error: instruction with .n (narrow) qualifier not allowed in arm mode
431 @ CHECK-ERRORS: error: instruction 'dmb' is not predicable, but condition code specified
432 @ CHECK-ERRORS: error: instruction 'dsb' is not predicable, but condition code specified
433 @ CHECK-ERRORS: error: instruction 'isb' is not predicable, but condition code specified
438 @ CHECK-ERRORS: error: instruction 'dmb' is not predicable, but condition code specified
439 @ CHECK-ERRORS: error: instruction 'dsb' is not predicable, but condition code specified
440 @ CHECK-ERRORS: error: instruction 'isb' is not predicable, but condition code specified
442 mcr2le p7, #1, r5, c1, c1, #4
443 mcrr2ne p7, #15, r5, r4, c1
444 mrc2lo p14, #0, r1, c1, c2, #4
445 mrrc2lo p7, #1, r5, r4, c1
446 cdp2hi p10, #0, c6, c12, c0, #7
447 @ CHECK-ERRORS: error: instruction 'mcr2' is not predicable, but condition code specified
448 @ CHECK-ERRORS: error: instruction 'mcrr2' is not predicable, but condition code specified
449 @ CHECK-ERRORS: error: instruction 'mrc2' is not predicable, but condition code specified
450 @ CHECK-ERRORS: error: instruction 'mrrc2' is not predicable, but condition code specified
451 @ CHECK-ERRORS: error: instruction 'cdp2' is not predicable, but condition code specified
454 @ CHECK-ERRORS: error: instruction 'bkpt' is not predicable, but condition code specified
460 @ CHECK-ERRORS: error: writeback register not allowed in register list
461 @ CHECK-ERRORS: error: writeback register not allowed in register list
462 @ CHECK-ERRORS: error: writeback register not allowed in register list
463 @ CHECK-ERRORS: error: writeback register not allowed in register list
465 vrintz.f32.f32 s0, s1
467 vrintx.f64.f64 d2, d5
469 vrinta.f32.f32 s6, s7
471 vrintp.f64.f64 d10, d11
473 @ CHECK-ERRORS: error: instruction requires: FPARMv8
474 @ CHECK-ERRORS: error: instruction requires: FPARMv8
475 @ CHECK-ERRORS: error: instruction requires: FPARMv8
476 @ CHECK-ERRORS: error: instruction requires: FPARMv8
477 @ CHECK-ERRORS: error: instruction requires: FPARMv8
478 @ CHECK-ERRORS: error: instruction requires: FPARMv8
479 @ CHECK-ERRORS: error: instruction requires: FPARMv8
480 @ CHECK-ERRORS: error: instruction requires: FPARMv8
484 @ CHECK-ERRORS: error: system STM cannot have writeback register
485 @ CHECK-ERRORS: error: writeback register only allowed on system LDM if PC in register-list
490 @ CHECK-ERRORS: error: immediate expression for mov requires :lower16: or :upper16
492 @ CHECK-ERRORS: error: immediate expression for mov requires :lower16: or :upper16
507 @ CHECK-ERRORS: error: source register and base register can't be identical
508 @ CHECK-ERRORS: str r0, [r0, #4]!
510 @ CHECK-ERRORS: error: source register and base register can't be identical
511 @ CHECK-ERRORS: str r0, [r0, r1]!
513 @ CHECK-ERRORS: error: source register and base register can't be identical
514 @ CHECK-ERRORS: str r0, [r0], #4
516 @ CHECK-ERRORS: error: source register and base register can't be identical
517 @ CHECK-ERRORS: str r0, [r0], r1
519 @ CHECK-ERRORS: error: source register and base register can't be identical
520 @ CHECK-ERRORS: strh r0, [r0, #2]!
522 @ CHECK-ERRORS: error: source register and base register can't be identical
523 @ CHECK-ERRORS: strh r0, [r0, r1]!
525 @ CHECK-ERRORS: error: source register and base register can't be identical
526 @ CHECK-ERRORS: strh r0, [r0], #2
528 @ CHECK-ERRORS: error: source register and base register can't be identical
529 @ CHECK-ERRORS: strh r0, [r0], r1
531 @ CHECK-ERRORS: error: source register and base register can't be identical
532 @ CHECK-ERRORS: strb r0, [r0, #1]!
534 @ CHECK-ERRORS: error: source register and base register can't be identical
535 @ CHECK-ERRORS: strb r0, [r0, r1]!
537 @ CHECK-ERRORS: error: source register and base register can't be identical
538 @ CHECK-ERRORS: strb r0, [r0], #1
540 @ CHECK-ERRORS: error: source register and base register can't be identical
541 @ CHECK-ERRORS: strb r0, [r0], r1
564 @ CHECK-ERRORS: error: destination register and base register can't be identical
565 @ CHECK-ERRORS: ldr r0, [r0, #4]!
567 @ CHECK-ERRORS: error: destination register and base register can't be identical
568 @ CHECK-ERRORS: ldr r0, [r0, r1]!
570 @ CHECK-ERRORS: error: destination register and base register can't be identical
571 @ CHECK-ERRORS: ldr r0, [r0], #4
573 @ CHECK-ERRORS: error: destination register and base register can't be identical
574 @ CHECK-ERRORS: ldr r0, [r0], r1
576 @ CHECK-ERRORS: error: destination register and base register can't be identical
577 @ CHECK-ERRORS: ldrh r0, [r0, #2]!
579 @ CHECK-ERRORS: error: destination register and base register can't be identical
580 @ CHECK-ERRORS: ldrh r0, [r0, r1]!
582 @ CHECK-ERRORS: error: destination register and base register can't be identical
583 @ CHECK-ERRORS: ldrh r0, [r0], #2
585 @ CHECK-ERRORS: error: destination register and base register can't be identical
586 @ CHECK-ERRORS: ldrh r0, [r0], r1
588 @ CHECK-ERRORS: error: destination register and base register can't be identical
589 @ CHECK-ERRORS: ldrsh r0, [r0, #2]!
591 @ CHECK-ERRORS: error: destination register and base register can't be identical
592 @ CHECK-ERRORS: ldrsh r0, [r0, r1]!
594 @ CHECK-ERRORS: error: destination register and base register can't be identical
595 @ CHECK-ERRORS: ldrsh r0, [r0], #2
597 @ CHECK-ERRORS: error: destination register and base register can't be identical
598 @ CHECK-ERRORS: ldrsh r0, [r0], r1
600 @ CHECK-ERRORS: error: destination register and base register can't be identical
601 @ CHECK-ERRORS: ldrb r0, [r0, #1]!
603 @ CHECK-ERRORS: error: destination register and base register can't be identical
604 @ CHECK-ERRORS: ldrb r0, [r0, r1]!
606 @ CHECK-ERRORS: error: destination register and base register can't be identical
607 @ CHECK-ERRORS: ldrb r0, [r0], #1
609 @ CHECK-ERRORS: error: destination register and base register can't be identical
610 @ CHECK-ERRORS: ldrb r0, [r0], r1
612 @ CHECK-ERRORS: error: destination register and base register can't be identical
613 @ CHECK-ERRORS: ldrsb r0, [r0, #1]!
615 @ CHECK-ERRORS: error: destination register and base register can't be identical
616 @ CHECK-ERRORS: ldrsb r0, [r0, r1]!
618 @ CHECK-ERRORS: error: destination register and base register can't be identical
619 @ CHECK-ERRORS: ldrsb r0, [r0], #1
621 @ CHECK-ERRORS: error: destination register and base register can't be identical
622 @ CHECK-ERRORS: ldrsb r0, [r0], r1