Add support for ARM's specialized vector-compare-against-zero instructions.
[oota-llvm.git] / test / MC / ARM / neon-cmp-encoding.s
1 @ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
2 @ XFAIL: *
3
4 @ FIXME: We cannot currently test the following instructions, which are 
5 @ currently marked as for-disassembly only in the .td files:
6 @  - VCEQz
7 @  - VCGEz, VCLEz
8 @  - VCGTz, VCLTz
9
10 @ CHECK: vceq.i8        d16, d16, d17           @ encoding: [0xb1,0x08,0x40,0xf3]
11         vceq.i8 d16, d16, d17
12 @ CHECK: vceq.i16       d16, d16, d17   @ encoding: [0xb1,0x08,0x50,0xf3]
13         vceq.i16        d16, d16, d17
14 @ CHECK: vceq.i32       d16, d16, d17   @ encoding: [0xb1,0x08,0x60,0xf3]
15         vceq.i32        d16, d16, d17
16 @ CHECK: vceq.f32       d16, d16, d17   @ encoding: [0xa1,0x0e,0x40,0xf2]
17         vceq.f32        d16, d16, d17
18 @ CHECK: vceq.i8        q8, q8, q9              @ encoding: [0xf2,0x08,0x40,0xf3]
19         vceq.i8 q8, q8, q9
20 @ CHECK: vceq.i16       q8, q8, q9      @ encoding: [0xf2,0x08,0x50,0xf3]
21         vceq.i16        q8, q8, q9
22 @ CHECK: vceq.i32       q8, q8, q9      @ encoding: [0xf2,0x08,0x60,0xf3]
23         vceq.i32        q8, q8, q9
24 @ CHECK: vceq.f32       q8, q8, q9      @ encoding: [0xe2,0x0e,0x40,0xf2]
25         vceq.f32        q8, q8, q9
26
27 @ CHECK: vcge.s8        d16, d16, d17           @ encoding: [0xb1,0x03,0x40,0xf2]
28         vcge.s8 d16, d16, d17
29 @ CHECK: vcge.s16       d16, d16, d17   @ encoding: [0xb1,0x03,0x50,0xf2]
30         vcge.s16        d16, d16, d17
31 @ CHECK: vcge.s32       d16, d16, d17   @ encoding: [0xb1,0x03,0x60,0xf2]
32         vcge.s32        d16, d16, d17
33 @ CHECK: vcge.u8        d16, d16, d17           @ encoding: [0xb1,0x03,0x40,0xf3]
34         vcge.u8 d16, d16, d17
35 @ CHECK: vcge.u16       d16, d16, d17   @ encoding: [0xb1,0x03,0x50,0xf3]
36         vcge.u16        d16, d16, d17
37 @ CHECK: vcge.u32       d16, d16, d17   @ encoding: [0xb1,0x03,0x60,0xf3]
38         vcge.u32        d16, d16, d17
39 @ CHECK: vcge.f32       d16, d16, d17   @ encoding: [0xa1,0x0e,0x40,0xf3]
40         vcge.f32        d16, d16, d17
41 @ CHECK: vcge.s8        q8, q8, q9              @ encoding: [0xf2,0x03,0x40,0xf2]
42         vcge.s8 q8, q8, q9
43 @ CHECK: vcge.s16       q8, q8, q9      @ encoding: [0xf2,0x03,0x50,0xf2]
44         vcge.s16        q8, q8, q9
45 @ CHECK: vcge.s32       q8, q8, q9      @ encoding: [0xf2,0x03,0x60,0xf2]
46         vcge.s32        q8, q8, q9
47 @ CHECK: vcge.u8        q8, q8, q9              @ encoding: [0xf2,0x03,0x40,0xf3]
48         vcge.u8 q8, q8, q9
49 @ CHECK: vcge.u16       q8, q8, q9      @ encoding: [0xf2,0x03,0x50,0xf3]
50         vcge.u16        q8, q8, q9
51 @ CHECK: vcge.u32       q8, q8, q9      @ encoding: [0xf2,0x03,0x60,0xf3]
52         vcge.u32        q8, q8, q9
53 @ CHECK: vcge.f32       q8, q8, q9      @ encoding: [0xe2,0x0e,0x40,0xf3]
54         vcge.f32        q8, q8, q9
55 @ CHECK: vacge.f32      d16, d16, d17   @ encoding: [0xb1,0x0e,0x40,0xf3]
56         vacge.f32       d16, d16, d17
57 @ CHECK: vacge.f32      q8, q8, q9      @ encoding: [0xf2,0x0e,0x40,0xf3]
58         vacge.f32       q8, q8, q9
59
60 @ CHECK: vcgt.s8        d16, d16, d17           @ encoding: [0xa1,0x03,0x40,0xf2]
61         vcgt.s8 d16, d16, d17
62 @ CHECK: vcgt.s16       d16, d16, d17   @ encoding: [0xa1,0x03,0x50,0xf2]
63         vcgt.s16        d16, d16, d17
64 @ CHECK: vcgt.s32       d16, d16, d17   @ encoding: [0xa1,0x03,0x60,0xf2]
65         vcgt.s32        d16, d16, d17
66 @ CHECK: vcgt.u8        d16, d16, d17           @ encoding: [0xa1,0x03,0x40,0xf3]
67         vcgt.u8 d16, d16, d17
68 @ CHECK: vcgt.u16       d16, d16, d17   @ encoding: [0xa1,0x03,0x50,0xf3]
69         vcgt.u16        d16, d16, d17
70 @ CHECK: vcgt.u32       d16, d16, d17   @ encoding: [0xa1,0x03,0x60,0xf3]
71         vcgt.u32        d16, d16, d17
72 @ CHECK: vcgt.f32       d16, d16, d17   @ encoding: [0xa1,0x0e,0x60,0xf3]
73         vcgt.f32        d16, d16, d17
74 @ CHECK: vcgt.s8        q8, q8, q9              @ encoding: [0xe2,0x03,0x40,0xf2]
75         vcgt.s8 q8, q8, q9
76 @ CHECK: vcgt.s16       q8, q8, q9      @ encoding: [0xe2,0x03,0x50,0xf2]
77         vcgt.s16        q8, q8, q9
78 @ CHECK: vcgt.s32       q8, q8, q9      @ encoding: [0xe2,0x03,0x60,0xf2]
79         vcgt.s32        q8, q8, q9
80 @ CHECK: vcgt.u8        q8, q8, q9              @ encoding: [0xe2,0x03,0x40,0xf3]
81         vcgt.u8 q8, q8, q9
82 @ CHECK: vcgt.u16       q8, q8, q9      @ encoding: [0xe2,0x03,0x50,0xf3]
83         vcgt.u16        q8, q8, q9
84 @ CHECK: vcgt.u32       q8, q8, q9      @ encoding: [0xe2,0x03,0x60,0xf3]
85         vcgt.u32        q8, q8, q9
86 @ CHECK: vcgt.f32       q8, q8, q9      @ encoding: [0xe2,0x0e,0x60,0xf3]
87         vcgt.f32        q8, q8, q9
88 @ CHECK: vacgt.f32      d16, d16, d17   @ encoding: [0xb1,0x0e,0x60,0xf3]
89         vacgt.f32       d16, d16, d17
90 @ CHECK: vacgt.f32      q8, q8, q9      @ encoding: [0xf2,0x0e,0x60,0xf3]
91         vacgt.f32       q8, q8, q9
92
93 @ CHECK: vtst.8 d16, d16, d17           @ encoding: [0xb1,0x08,0x40,0xf2]
94         vtst.8  d16, d16, d17
95 @ CHECK: vtst.16        d16, d16, d17           @ encoding: [0xb1,0x08,0x50,0xf2]
96         vtst.16 d16, d16, d17
97 @ CHECK: vtst.32        d16, d16, d17           @ encoding: [0xb1,0x08,0x60,0xf2]
98         vtst.32 d16, d16, d17
99 @ CHECK: vtst.8 q8, q8, q9              @ encoding: [0xf2,0x08,0x40,0xf2]
100         vtst.8  q8, q8, q9
101 @ CHECK: vtst.16        q8, q8, q9              @ encoding: [0xf2,0x08,0x50,0xf2]
102         vtst.16 q8, q8, q9
103 @ CHECK: vtst.32        q8, q8, q9              @ encoding: [0xf2,0x08,0x60,0xf2]
104         vtst.32 q8, q8, q9
105
106 @ CHECK: vceq.i8        d16, d16, #0            @ encoding: [0x20,0x01,0xf1,0xf3]
107   vceq.i8       d16, d16, #0
108 @ CHECK: vcge.s8        d16, d16, #0            @ encoding: [0xa0,0x00,0xf1,0xf3]
109   vcge.s8       d16, d16, #0
110 @ CHECK: vcle.s8        d16, d16, #0            @ encoding: [0xa0,0x01,0xf1,0xf3]
111   vcle.s8       d16, d16, #0
112 @ CHECK: vcgt.s8        d16, d16, #0            @ encoding: [0x20,0x00,0xf1,0xf3]
113   vcgt.s8       d16, d16, #0
114 @ CHECK: vclt.s8        d16, d16, #0            @ encoding: [0x20,0x02,0xf1,0xf3]
115   vclt.s8       d16, d16, #0