Convert this test to .s form.
[oota-llvm.git] / test / MC / ARM / neon-minmax-encoding.s
1 // RUN: llvm-mc -triple arm-unknown-unkown -show-encoding < %s | FileCheck %s
2
3 // CHECK: vmin.s8       d16, d16, d17           @ encoding: [0xb1,0x06,0x40,0xf2]
4         vmin.s8 d16, d16, d17
5 // CHECK: vmin.s16      d16, d16, d17   @ encoding: [0xb1,0x06,0x50,0xf2]
6         vmin.s16        d16, d16, d17
7 // CHECK: vmin.s32      d16, d16, d17   @ encoding: [0xb1,0x06,0x60,0xf2]
8         vmin.s32        d16, d16, d17
9 // CHECK: vmin.u8       d16, d16, d17           @ encoding: [0xb1,0x06,0x40,0xf3]
10         vmin.u8 d16, d16, d17
11 // CHECK: vmin.u16      d16, d16, d17   @ encoding: [0xb1,0x06,0x50,0xf3]
12         vmin.u16        d16, d16, d17
13 // CHECK: vmin.u32      d16, d16, d17   @ encoding: [0xb1,0x06,0x60,0xf3]
14         vmin.u32        d16, d16, d17
15 // CHECK: vmin.f32      d16, d16, d17   @ encoding: [0xa1,0x0f,0x60,0xf2]
16         vmin.f32        d16, d16, d17
17 // CHECK: vmin.s8       q8, q8, q9              @ encoding: [0xf2,0x06,0x40,0xf2]
18         vmin.s8 q8, q8, q9
19 // CHECK: vmin.s16      q8, q8, q9      @ encoding: [0xf2,0x06,0x50,0xf2]
20         vmin.s16        q8, q8, q9
21 // CHECK: vmin.s32      q8, q8, q9      @ encoding: [0xf2,0x06,0x60,0xf2]
22         vmin.s32        q8, q8, q9
23 // CHECK: vmin.u8       q8, q8, q9              @ encoding: [0xf2,0x06,0x40,0xf3]
24         vmin.u8 q8, q8, q9
25 // CHECK: vmin.u16      q8, q8, q9      @ encoding: [0xf2,0x06,0x50,0xf3]
26         vmin.u16        q8, q8, q9
27 // CHECK: vmin.u32      q8, q8, q9      @ encoding: [0xf2,0x06,0x60,0xf3]
28         vmin.u32        q8, q8, q9
29 // CHECK: vmin.f32      q8, q8, q9      @ encoding: [0xe2,0x0f,0x60,0xf2]
30         vmin.f32        q8, q8, q9
31 // CHECK: vmax.s8       d16, d16, d17           @ encoding: [0xa1,0x06,0x40,0xf2]
32         vmax.s8 d16, d16, d17
33 // CHECK: vmax.s16      d16, d16, d17   @ encoding: [0xa1,0x06,0x50,0xf2]
34         vmax.s16        d16, d16, d17
35 // CHECK: vmax.s32      d16, d16, d17   @ encoding: [0xa1,0x06,0x60,0xf2]
36         vmax.s32        d16, d16, d17
37 // CHECK: vmax.u8       d16, d16, d17           @ encoding: [0xa1,0x06,0x40,0xf3]
38         vmax.u8 d16, d16, d17
39 // CHECK: vmax.u16      d16, d16, d17   @ encoding: [0xa1,0x06,0x50,0xf3]
40         vmax.u16        d16, d16, d17
41 // CHECK: vmax.u32      d16, d16, d17   @ encoding: [0xa1,0x06,0x60,0xf3]
42         vmax.u32        d16, d16, d17
43 // CHECK: vmax.f32      d16, d16, d17   @ encoding: [0xa1,0x0f,0x40,0xf2]
44         vmax.f32        d16, d16, d17
45 // CHECK: vmax.s8       q8, q8, q9              @ encoding: [0xe2,0x06,0x40,0xf2]
46         vmax.s8 q8, q8, q9
47 // CHECK: vmax.s16      q8, q8, q9      @ encoding: [0xe2,0x06,0x50,0xf2]
48         vmax.s16        q8, q8, q9
49 // CHECK: vmax.s32      q8, q8, q9      @ encoding: [0xe2,0x06,0x60,0xf2]
50         vmax.s32        q8, q8, q9
51 // CHECK: vmax.u8       q8, q8, q9              @ encoding: [0xe2,0x06,0x40,0xf3]
52         vmax.u8 q8, q8, q9
53 // CHECK: vmax.u16      q8, q8, q9      @ encoding: [0xe2,0x06,0x50,0xf3]
54         vmax.u16        q8, q8, q9
55 // CHECK: vmax.u32      q8, q8, q9      @ encoding: [0xe2,0x06,0x60,0xf3]
56         vmax.u32        q8, q8, q9
57 // CHECK: vmax.f32      q8, q8, q9      @ encoding: [0xe2,0x0f,0x40,0xf2]
58         vmax.f32        q8, q8, q9