test/MC/ARM/neon-mul-encoding.s

   1 @ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s
   2
   3 @ CHECK: vmul.i8        d16, d16, d17           @ encoding: [0xb1,0x09,0x40,0xf2]
   4         vmul.i8 d16, d16, d17
   5 @ CHECK: vmul.i16       d16, d16, d17   @ encoding: [0xb1,0x09,0x50,0xf2]
   6         vmul.i16        d16, d16, d17
   7 @ CHECK: vmul.i32       d16, d16, d17   @ encoding: [0xb1,0x09,0x60,0xf2]
   8         vmul.i32        d16, d16, d17
   9 @ CHECK: vmul.f32       d16, d16, d17   @ encoding: [0xb1,0x0d,0x40,0xf3]
  10         vmul.f32        d16, d16, d17
  11 @ CHECK: vmul.i8        q8, q8, q9              @ encoding: [0xf2,0x09,0x40,0xf2]
  12         vmul.i8 q8, q8, q9
  13 @ CHECK: vmul.i16       q8, q8, q9      @ encoding: [0xf2,0x09,0x50,0xf2]
  14         vmul.i16        q8, q8, q9
  15 @ CHECK: vmul.i32       q8, q8, q9      @ encoding: [0xf2,0x09,0x60,0xf2]
  16         vmul.i32        q8, q8, q9
  17 @ CHECK: vmul.f32       q8, q8, q9      @ encoding: [0xf2,0x0d,0x40,0xf3]
  18         vmul.f32        q8, q8, q9
  19 @ CHECK: vmul.p8        d16, d16, d17           @ encoding: [0xb1,0x09,0x40,0xf3]
  20         vmul.p8 d16, d16, d17
  21 @ CHECK: vmul.p8        q8, q8, q9              @ encoding: [0xf2,0x09,0x40,0xf3]
  22         vmul.p8 q8, q8, q9
  23 @ CHECK: vqdmulh.s16    d16, d16, d17   @ encoding: [0xa1,0x0b,0x50,0xf2]
  24         vqdmulh.s16     d16, d16, d17
  25 @ CHECK: vqdmulh.s32    d16, d16, d17   @ encoding: [0xa1,0x0b,0x60,0xf2]
  26         vqdmulh.s32     d16, d16, d17
  27 @ CHECK: vqdmulh.s16    q8, q8, q9      @ encoding: [0xe2,0x0b,0x50,0xf2]
  28         vqdmulh.s16     q8, q8, q9
  29 @ CHECK: vqdmulh.s32    q8, q8, q9      @ encoding: [0xe2,0x0b,0x60,0xf2]
  30         vqdmulh.s32     q8, q8, q9
  31 @ CHECK: vqrdmulh.s16   d16, d16, d17   @ encoding: [0xa1,0x0b,0x50,0xf3]
  32         vqrdmulh.s16    d16, d16, d17
  33 @ CHECK: vqrdmulh.s32   d16, d16, d17   @ encoding: [0xa1,0x0b,0x60,0xf3]
  34         vqrdmulh.s32    d16, d16, d17
  35 @ CHECK: vqrdmulh.s16   q8, q8, q9      @ encoding: [0xe2,0x0b,0x50,0xf3]
  36         vqrdmulh.s16    q8, q8, q9
  37 @ CHECK: vqrdmulh.s32   q8, q8, q9      @ encoding: [0xe2,0x0b,0x60,0xf3]
  38         vqrdmulh.s32    q8, q8, q9
  39 @ CHECK: vmull.s8       q8, d16, d17    @ encoding: [0xa1,0x0c,0xc0,0xf2]
  40         vmull.s8        q8, d16, d17
  41 @ CHECK: vmull.s16      q8, d16, d17    @ encoding: [0xa1,0x0c,0xd0,0xf2]
  42         vmull.s16       q8, d16, d17
  43 @ CHECK: vmull.s32      q8, d16, d17    @ encoding: [0xa1,0x0c,0xe0,0xf2]
  44         vmull.s32       q8, d16, d17
  45 @ CHECK: vmull.u8       q8, d16, d17    @ encoding: [0xa1,0x0c,0xc0,0xf3]
  46         vmull.u8        q8, d16, d17
  47 @ CHECK: vmull.u16      q8, d16, d17    @ encoding: [0xa1,0x0c,0xd0,0xf3]
  48         vmull.u16       q8, d16, d17
  49 @ CHECK: vmull.u32      q8, d16, d17    @ encoding: [0xa1,0x0c,0xe0,0xf3]
  50         vmull.u32       q8, d16, d17
  51 @ CHECK: vmull.p8       q8, d16, d17    @ encoding: [0xa1,0x0e,0xc0,0xf2]
  52         vmull.p8        q8, d16, d17
  53 @ CHECK: vqdmull.s16    q8, d16, d17    @ encoding: [0xa1,0x0d,0xd0,0xf2]
  54         vqdmull.s16     q8, d16, d17
  55 @ CHECK: vqdmull.s32    q8, d16, d17    @ encoding: [0xa1,0x0d,0xe0,0xf2]
  56         vqdmull.s32     q8, d16, d17