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[Thumb/Thumb2] Implement restrictions on SP in register list on LDM, STM variants...
[oota-llvm.git]
/
test
/
MC
/
ARM
/
neon-vswp.s
1
@ RUN: llvm-mc -mcpu=cortex-a8 -triple armv7-apple-darwin -show-encoding < %s | FileCheck %s
2
3
vswp d1, d2
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vswp q1, q2
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6
@ CHECK: vswp d1, d2 @ encoding: [0x02,0x10,0xb2,0xf3]
7
@ CHECK: vswp q1, q2 @ encoding: [0x44,0x20,0xb2,0xf3]