1 ; RUN: llc < %s -mtriple=armv7-apple-darwin -mattr=+v7a,+mp -show-mc-encoding | FileCheck %s -check-prefix=ARM
2 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+v7a -show-mc-encoding | FileCheck %s -check-prefix=T2
5 define void @t1(i8* %ptr) nounwind {
8 ; ARM: pldw [r0] @ encoding: [0x00,0xf0,0x90,0xf5]
9 ; ARM: pld [r0] @ encoding: [0x00,0xf0,0xd0,0xf5]
12 ; T2: pld [r0] @ encoding: [0x90,0xf8,0x00,0xf0]
13 tail call void @llvm.prefetch( i8* %ptr, i32 1, i32 3 )
14 tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3 )
18 define void @t2(i8* %ptr) nounwind {
21 ; ARM: pld [r0, #1023] @ encoding: [0xff,0xf3,0xd0,0xf5]
24 ; T2: pld [r0, #1023] @ encoding: [0x90,0xf8,0xff,0xf3]
25 %tmp = getelementptr i8* %ptr, i32 1023
26 tail call void @llvm.prefetch( i8* %tmp, i32 0, i32 3 )
30 define void @t3(i32 %base, i32 %offset) nounwind {
33 ; ARM: pld [r0, r1, lsr #2] @ encoding: [0x21,0xf1,0xd0,0xf7]
36 ; T2: pld [r0, r1] @ encoding: [0x10,0xf8,0x01,0xf0]
37 %tmp1 = lshr i32 %offset, 2
38 %tmp2 = add i32 %base, %tmp1
39 %tmp3 = inttoptr i32 %tmp2 to i8*
40 tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3 )
44 define void @t4(i32 %base, i32 %offset) nounwind {
47 ; ARM: pld [r0, r1, lsl #2] @ encoding: [0x01,0xf1,0xd0,0xf7]
50 ; T2: pld [r0, r1, lsl #2] @ encoding: [0x10,0xf8,0x21,0xf0]
51 %tmp1 = shl i32 %offset, 2
52 %tmp2 = add i32 %base, %tmp1
53 %tmp3 = inttoptr i32 %tmp2 to i8*
54 tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3 )
58 declare void @llvm.prefetch(i8*, i32, i32) nounwind