1 ;RUN: llc -mtriple=armv7-apple-darwin -mcpu=cortex-a8 -mattr=-neonfp -show-mc-encoding < %s | FileCheck %s
4 ; FIXME: Once the ARM integrated assembler is up and going, these sorts of tests
5 ; should run on .s source files rather than using llc to generate the
9 define double @f1(double %a, double %b) nounwind readnone {
12 ; CHECK: vadd.f64 d16, d17, d16 @ encoding: [0xa0,0x0b,0x71,0xee]
13 %add = fadd double %a, %b
17 define float @f2(float %a, float %b) nounwind readnone {
20 ; CHECK: vadd.f32 s0, s1, s0 @ encoding: [0x80,0x0a,0x30,0xee]
21 %add = fadd float %a, %b
25 define double @f3(double %a, double %b) nounwind readnone {
28 ; CHECK: vsub.f64 d16, d17, d16 @ encoding: [0xe0,0x0b,0x71,0xee]
29 %sub = fsub double %a, %b
33 define float @f4(float %a, float %b) nounwind readnone {
36 ; CHECK: vsub.f32 s0, s1, s0 @ encoding: [0xc0,0x0a,0x30,0xee]
37 %sub = fsub float %a, %b
41 define double @f5(double %a, double %b) nounwind readnone {
44 ; CHECK: vdiv.f64 d16, d17, d16 @ encoding: [0xa0,0x0b,0xc1,0xee]
45 %div = fdiv double %a, %b
49 define float @f6(float %a, float %b) nounwind readnone {
52 ; CHECK: vdiv.f32 s0, s1, s0 @ encoding: [0x80,0x0a,0x80,0xee]
53 %div = fdiv float %a, %b
57 define double @f7(double %a, double %b) nounwind readnone {
60 ; CHECK: vmul.f64 d16, d17, d16 @ encoding: [0xa0,0x0b,0x61,0xee]
61 %mul = fmul double %a, %b
65 define float @f8(float %a, float %b) nounwind readnone {
68 ; CHECK: vmul.f32 s0, s1, s0 @ encoding: [0x80,0x0a,0x20,0xee]
69 %mul = fmul float %a, %b
73 define i1 @f100(double %a, double %b) nounwind readnone {
76 ; CHECK: vcmpe.f64 d17, d16 @ encoding: [0xe0,0x1b,0xf4,0xee]
77 %cmp = fcmp oeq double %a, %b
81 define i1 @f101(float %a, float %b) nounwind readnone {
84 ; CHECK: vcmpe.f32 s1, s0 @ encoding: [0xc0,0x0a,0xf4,0xee]
85 %cmp = fcmp oeq float %a, %b