1 @ RUN: not llvm-mc -triple=thumbv6-apple-darwin < %s 2> %t
2 @ RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
3 @ RUN: not llvm-mc -triple=thumbv5-apple-darwin < %s 2> %t
4 @ RUN: FileCheck --check-prefix=CHECK-ERRORS-V5 < %t %s
5 @ RUN: not llvm-mc -triple=thumbv7m < %s 2> %t
6 @ RUN: FileCheck --check-prefix=CHECK-ERRORS-V7M < %t %s
7 @ RUN: not llvm-mc -triple=thumbv8 < %s 2> %t
8 @ RUN: FileCheck --check-prefix=CHECK-ERRORS-V8 < %t %s
10 @ Check for various assembly diagnostic messages on invalid input.
12 @ ADD instruction w/o 'S' suffix.
14 @ CHECK-ERRORS: error: invalid instruction
15 @ CHECK-ERRORS: add r1, r2, r3
18 @ Instructions which require v6+ for both registers to be low regs.
21 @ CHECK-ERRORS: error: instruction variant requires Thumb2
22 @ CHECK-ERRORS: add r2, r3
24 @ CHECK-ERRORS-V5: error: instruction variant requires ARMv6 or later
25 @ CHECK-ERRORS-V5: mov r2, r3
29 @ Out of range immediates for ASR instruction.
31 @ CHECK-ERRORS: error: invalid operand for instruction
32 @ CHECK-ERRORS: asrs r2, r3, #33
35 @ Out of range immediates for BKPT instruction.
38 error: invalid operand for instruction
41 error: invalid operand for instruction
45 @ Out of range immediates for v8 HLT instruction.
48 @CHECK-ERRORS: error: instruction requires: armv8 arm-mode
49 @CHECK-ERRORS: hlt #64
51 @CHECK-ERRORS-V8: error: instruction requires: arm-mode
52 @CHECK-ERRORS-V8: hlt #64
54 @CHECK-ERRORS: error: invalid operand for instruction
55 @CHECK-ERRORS: hlt #-1
58 @ Invalid writeback and register lists for LDM
62 ldm r2!, {r2, r3, r4, r10}
63 ldmdb r2!, {r2, r3, r4}
66 ldmia r0!, {r2-r3, sp}
67 ldmfd r2, {r1, r3-r6, sp}
68 ldmfd r2!, {r1, r3-r6, sp}
69 ldmdb r1, {r2, r3, sp}
70 ldmdb r1!, {r2, r3, sp}
71 @ CHECK-ERRORS: error: registers must be in range r0-r7
72 @ CHECK-ERRORS: ldm r2!, {r5, r8}
74 @ CHECK-ERRORS: error: writeback operator '!' expected
75 @ CHECK-ERRORS: ldm r2, {r5, r7}
77 @ CHECK-ERRORS: error: writeback operator '!' not allowed when base register in register list
78 @ CHECK-ERRORS: ldm r2!, {r2, r3, r4}
80 @ CHECK-ERRORS-V8: error: writeback operator '!' not allowed when base register in register list
81 @ CHECK-ERRORS-V8: ldm r2!, {r2, r3, r4, r10}
83 @ CHECK-ERRORS-V8: error: writeback register not allowed in register list
84 @ CHECK-ERRORS-V8: ldmdb r2!, {r2, r3, r4}
86 @ CHECK-ERRORS-V7M: error: SP not allowed in register list
87 @ CHECK-ERRORS-V7M: ldm r0, {r2, sp}
89 @ CHECK-ERRORS-V7M: error: SP not allowed in register list
90 @ CHECK-ERRORS-V7M: ldmia r0, {r2-r3, sp}
92 @ CHECK-ERRORS-V7M: error: SP not allowed in register list
93 @ CHECK-ERRORS-V7M: ldmia r0!, {r2-r3, sp}
95 @ CHECK-ERRORS-V7M: error: SP not allowed in register list
96 @ CHECK-ERRORS-V7M: ldmfd r2, {r1, r3-r6, sp}
98 @ CHECK-ERRORS-V7M: error: SP not allowed in register list
99 @ CHECK-ERRORS-V7M: ldmfd r2!, {r1, r3-r6, sp}
100 @ CHECK-ERRORS-V7M: ^
101 @ CHECK-ERRORS-V7M: error: SP not allowed in register list
102 @ CHECK-ERRORS-V7M: ldmdb r1, {r2, r3, sp}
103 @ CHECK-ERRORS-V7M: ^
104 @ CHECK-ERRORS-V7M: error: SP not allowed in register list
105 @ CHECK-ERRORS-V7M: ldmdb r1!, {r2, r3, sp}
106 @ CHECK-ERRORS-V7M: ^
108 @ Invalid writeback and register lists for PUSH/POP
111 @ CHECK-ERRORS: error: registers must be in range r0-r7 or pc
112 @ CHECK-ERRORS: pop {r1, r2, r10}
114 @ CHECK-ERRORS: error: registers must be in range r0-r7 or lr
115 @ CHECK-ERRORS: push {r8, r9}
119 @ Invalid writeback and register lists for STM
125 stmia r4!, {r0-r3, sp}
126 stmdb r1, {r2, r3, sp}
127 stmdb r1!, {r2, r3, sp}
128 @ CHECK-ERRORS: error: instruction requires: thumb2
129 @ CHECK-ERRORS: stm r1, {r2, r6}
131 @ CHECK-ERRORS: error: registers must be in range r0-r7
132 @ CHECK-ERRORS: stm r1!, {r2, r9}
134 @ CHECK-ERRORS-V8: error: writeback operator '!' not allowed when base register in register list
135 @ CHECK-ERRORS-V8: stm r2!, {r2, r9}
137 @ CHECK-ERRORS-V8: error: writeback register not allowed in register list
138 @ CHECK-ERRORS-V8: stmdb r2!, {r0, r2}
140 @ CHECK-ERRORS-V7M: error: SP not allowed in register list
141 @ CHECK-ERRORS-V7M: stm r1!, {r2, sp}
142 @ CHECK-ERRORS-V7M: ^
143 @ CHECK-ERRORS-V7M: error: SP not allowed in register list
144 @ CHECK-ERRORS-V7M: stmia r4!, {r0-r3, sp}
145 @ CHECK-ERRORS-V7M: ^
146 @ CHECK-ERRORS-V7M: error: SP not allowed in register list
147 @ CHECK-ERRORS-V7M: stmdb r1, {r2, r3, sp}
148 @ CHECK-ERRORS-V7M: ^
149 @ CHECK-ERRORS-V7M: error: SP not allowed in register list
150 @ CHECK-ERRORS-V7M: stmdb r1!, {r2, r3, sp}
151 @ CHECK-ERRORS-V7M: ^
153 @ Out of range immediates for LSL instruction.
156 @ CHECK-ERRORS: error: invalid operand for instruction
157 @ CHECK-ERRORS: lsls r4, r5, #-1
159 @ CHECK-ERRORS: error: invalid operand for instruction
160 @ CHECK-ERRORS: lsls r4, r5, #32
163 @ Mismatched source/destination operands for MUL instruction.
165 @ CHECK-ERRORS: error: destination register must match source register
166 @ CHECK-ERRORS: muls r1, r2, r3
170 @ Out of range immediates for STR instruction.
174 @ CHECK-ERRORS: error: instruction requires: thumb2
175 @ CHECK-ERRORS: str r2, [r7, #-1]
177 @ CHECK-ERRORS: error: instruction requires: thumb2
178 @ CHECK-ERRORS: str r5, [r1, #3]
180 @ CHECK-ERRORS: error: instruction requires: thumb2
181 @ CHECK-ERRORS: str r3, [r7, #128]
184 @ Out of range immediate for SVC instruction.
187 @ CHECK-ERRORS: error: invalid operand for instruction
188 @ CHECK-ERRORS: svc #-1
190 @ CHECK-ERRORS: error: instruction requires: arm-mode
191 @ CHECK-ERRORS: svc #256
195 @ Out of range immediate for ADD SP instructions
200 @ CHECK-ERRORS: error: instruction requires: thumb2
201 @ CHECK-ERRORS: add sp, #-1
203 @ CHECK-ERRORS: error: instruction requires: thumb2
204 @ CHECK-ERRORS: add sp, #3
206 @ CHECK-ERRORS: error: instruction requires: thumb2
207 @ CHECK-ERRORS: add sp, sp, #512
209 @ CHECK-ERRORS: error: instruction requires: arm-mode
210 @ CHECK-ERRORS: add r2, sp, #1024
214 @ CHECK-ERRORS: error: source register must be the same as destination
215 @ CHECK-ERRORS: add r2, sp, ip
219 @------------------------------------------------------------------------------
220 @ B/Bcc - out of range immediates for Thumb1 branches
221 @------------------------------------------------------------------------------
230 @ CHECK-ERRORS: error: branch target out of range
231 @ CHECK-ERRORS: error: branch target out of range
232 @ CHECK-ERRORS: error: branch target out of range
233 @ CHECK-ERRORS: error: branch target out of range
234 @ CHECK-ERRORS: error: branch target out of range
235 @ CHECK-ERRORS: error: branch target out of range
237 @------------------------------------------------------------------------------
238 @ WFE/WFI/YIELD - are not supported pre v6T2
239 @------------------------------------------------------------------------------
244 @ CHECK-ERRORS: error: instruction requires: armv6m or armv6t2
247 @ CHECK-ERRORS: error: instruction requires: armv6m or armv6t2
250 @ CHECK-ERRORS: error: instruction requires: armv6m or armv6t2
251 @ CHECK-ERRORS: yield
254 @------------------------------------------------------------------------------
255 @ PLDW required mp-extensions
256 @------------------------------------------------------------------------------
258 @ CHECK-ERRORS: error: instruction requires: mp-extensions
260 @------------------------------------------------------------------------------
261 @ LDR(lit) - invalid offsets
262 @------------------------------------------------------------------------------
265 @ CHECK-ERRORS: error: instruction requires: thumb2
267 @------------------------------------------------------------------------------
268 @ STC2{L}/LDC2{L} - requires thumb2
269 @------------------------------------------------------------------------------
270 stc2 p0, c8, [r1, #4]
271 stc2l p6, c2, [r7, #4]
272 ldc2 p0, c8, [r1, #4]
273 ldc2l p6, c2, [r7, #4]
274 @ CHECK-ERRORS: error: invalid operand for instruction
275 @ CHECK-ERRORS: error: invalid operand for instruction
276 @ CHECK-ERRORS: error: invalid operand for instruction
277 @ CHECK-ERRORS: error: invalid operand for instruction