1 @ RUN: not llvm-mc -triple=thumbv6-apple-darwin < %s 2> %t
2 @ RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
3 @ RUN: not llvm-mc -triple=thumbv5-apple-darwin < %s 2> %t
4 @ RUN: FileCheck --check-prefix=CHECK-ERRORS-V5 < %t %s
6 @ Check for various assembly diagnostic messages on invalid input.
8 @ ADD instruction w/o 'S' suffix.
10 @ CHECK-ERRORS: error: invalid instruction
11 @ CHECK-ERRORS: add r1, r2, r3
14 @ Instructions which require v6+ for both registers to be low regs.
17 @ CHECK-ERRORS: error: instruction variant requires Thumb2
18 @ CHECK-ERRORS: add r2, r3
20 @ CHECK-ERRORS-V5: error: instruction variant requires ARMv6 or later
21 @ CHECK-ERRORS-V5: mov r2, r3
25 @ Out of range immediates for ASR instruction.
28 @ CHECK-ERRORS: error: invalid operand for instruction
29 @ CHECK-ERRORS: asrs r2, r3, #33
31 @ CHECK-ERRORS: error: invalid operand for instruction
32 @ CHECK-ERRORS: asrs r2, r3, #0
35 @ Out of range immediates for BKPT instruction.
38 error: invalid operand for instruction
41 error: invalid operand for instruction
45 @ Invalid writeback and register lists for LDM
49 @ CHECK-ERRORS: error: registers must be in range r0-r7
50 @ CHECK-ERRORS: ldm r2!, {r5, r8}
52 @ CHECK-ERRORS: error: writeback operator '!' expected
53 @ CHECK-ERRORS: ldm r2, {r5, r7}
55 @ CHECK-ERRORS: error: writeback operator '!' not allowed when base register in register list
56 @ CHECK-ERRORS: ldm r2!, {r2, r3, r4}
60 @ Invalid writeback and register lists for PUSH/POP
63 @ CHECK-ERRORS: error: registers must be in range r0-r7 or pc
64 @ CHECK-ERRORS: pop {r1, r2, r10}
66 @ CHECK-ERRORS: error: registers must be in range r0-r7 or lr
67 @ CHECK-ERRORS: push {r8, r9}
71 @ Invalid writeback and register lists for STM
74 @ CHECK-ERRORS: error: instruction requires a CPU feature not currently enabled
75 @ CHECK-ERRORS: stm r1, {r2, r6}
77 @ CHECK-ERRORS: error: registers must be in range r0-r7
78 @ CHECK-ERRORS: stm r1!, {r2, r9}
81 @ Out of range immediates for LSL instruction.
84 @ CHECK-ERRORS: error: invalid operand for instruction
85 @ CHECK-ERRORS: lsls r4, r5, #-1
87 @ CHECK-ERRORS: error: invalid operand for instruction
88 @ CHECK-ERRORS: lsls r4, r5, #32
91 @ Mismatched source/destination operands for MUL instruction.
93 @ CHECK-ERRORS: error: destination register must match source register
94 @ CHECK-ERRORS: muls r1, r2, r3
98 @ Out of range immediates for STR instruction.
102 @ CHECK-ERRORS: error: instruction requires a CPU feature not currently enabled
103 @ CHECK-ERRORS: str r2, [r7, #-1]
105 @ CHECK-ERRORS: error: instruction requires a CPU feature not currently enabled
106 @ CHECK-ERRORS: str r5, [r1, #3]
108 @ CHECK-ERRORS: error: instruction requires a CPU feature not currently enabled
109 @ CHECK-ERRORS: str r3, [r7, #128]
112 @ Out of range immediate for SVC instruction.
115 @ CHECK-ERRORS: error: invalid operand for instruction
116 @ CHECK-ERRORS: svc #-1
118 @ CHECK-ERRORS: error: instruction requires a CPU feature not currently enabled
119 @ CHECK-ERRORS: svc #256