1 ; RUN: not llvm-mc -triple arm64-apple-darwin -show-encoding < %s 2> %t | FileCheck %s
2 ; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
6 ; The first should encode as an expression. The second should error expecting
10 ; CHECK: ldr x3, foo+4 ; encoding: [0bAAA00011,A,A,0x58]
11 ; CHECK: ; fixup A - offset: 0, value: foo+4, kind: fixup_arm64_ldr_pcrel_imm19
12 ; CHECK-ERRORS: error: register expected
14 ; The last argument should be flagged as an error. rdar://9576009
15 ld4.8b {v0, v1, v2, v3}, [x0], #33
16 ; CHECK-ERRORS: error: invalid operand for instruction
17 ; CHECK-ERRORS: ld4.8b {v0, v1, v2, v3}, [x0], #33
27 ldp w3, w4, [x5, #11]!
28 ldp x3, x4, [x5, #12]!
29 ldp q3, q4, [x5, #12]!
36 ; CHECK-ERRORS: error: index must be a multiple of 8 in range [0, 32760].
37 ; CHECK-ERRORS: ldr x0, [x0, #804]
39 ; CHECK-ERRORS: error: index must be a multiple of 4 in range [0, 16380].
40 ; CHECK-ERRORS: ldr w0, [x0, #802]
42 ; CHECK-ERRORS: error: index must be an integer in range [-256, 255].
43 ; CHECK-ERRORS: ldr x0, [x0, #804]!
45 ; CHECK-ERRORS: error: index must be an integer in range [-256, 255].
46 ; CHECK-ERRORS: ldr w0, [w0, #301]!
48 ; CHECK-ERRORS: error: index must be an integer in range [-256, 255].
49 ; CHECK-ERRORS: ldr x0, [x0], #804
51 ; CHECK-ERRORS: error: index must be an integer in range [-256, 255].
52 ; CHECK-ERRORS: ldr w0, [w0], #301
54 ; CHECK-ERRORS: error: index must be a multiple of 4 in range [-256, 252].
55 ; CHECK-ERRORS: ldp w3, w4, [x5, #11]!
57 ; CHECK-ERRORS: error: index must be a multiple of 8 in range [-512, 504].
58 ; CHECK-ERRORS: ldp x3, x4, [x5, #12]!
60 ; CHECK-ERRORS: error: index must be a multiple of 16 in range [-1024, 1008].
61 ; CHECK-ERRORS: ldp q3, q4, [x5, #12]!
63 ; CHECK-ERRORS: error: index must be a multiple of 4 in range [-256, 252].
64 ; CHECK-ERRORS: ldp w3, w4, [x5], #11
66 ; CHECK-ERRORS: error: index must be a multiple of 8 in range [-512, 504].
67 ; CHECK-ERRORS: ldp x3, x4, [x5], #12
69 ; CHECK-ERRORS: error: index must be a multiple of 8 in range [-512, 504].
70 ; CHECK-ERRORS: ldp q3, q4, [x5], #12
72 ; CHECK-ERRORS: error: index must be an integer in range [-256, 255].
73 ; CHECK-ERRORS: ldur x0, [x1, #-257]
77 ; Check that register offset addressing modes only accept 32-bit offset
78 ; registers when using uxtw/sxtw extends. Everything else requires a 64-bit
80 str d1, [x3, w3, sxtx #3]
81 ldr s1, [x3, d3, sxtx #2]
83 ; CHECK-ERRORS: 32-bit general purpose offset register requires sxtw or uxtw extend
84 ; CHECK-ERRORS: str d1, [x3, w3, sxtx #3]
86 ; CHECK-ERRORS: error: 64-bit general purpose offset register expected
87 ; CHECK-ERRORS: ldr s1, [x3, d3, sxtx #2]
90 ; Shift immediates range checking.
92 rshrn v9.8b, v11.8h, #17
93 sqrshrn v7.4h, v8.4s, #39
94 uqshrn2 v4.4s, v5.2d, #67
96 ; CHECK-ERRORS: error: immediate must be an integer in range [1, 8].
97 ; CHECK-ERRORS: sqrshrn b4, h9, #10
99 ; CHECK-ERRORS: error: immediate must be an integer in range [1, 8].
100 ; CHECK-ERRORS: rshrn v9.8b, v11.8h, #17
102 ; CHECK-ERRORS: error: immediate must be an integer in range [1, 16].
103 ; CHECK-ERRORS: sqrshrn v7.4h, v8.4s, #39
105 ; CHECK-ERRORS: error: immediate must be an integer in range [1, 32].
106 ; CHECK-ERRORS: uqshrn2 v4.4s, v5.2d, #67
110 st1.s4 {v14, v15}, [x2], #32
111 ; CHECK-ERRORS: error: invalid type suffix for instruction
112 ; CHECK-ERRORS: st1.s4 {v14, v15}, [x2], #32
117 ; Load pair instructions where Rt==Rt2 and writeback load/store instructions
118 ; where Rt==Rn or Rt2==Rn are unpredicatable.
119 ldp x1, x2, [x2], #16
120 ldp x2, x2, [x2], #16
121 ldp w1, w2, [x2], #16
122 ldp w2, w2, [x2], #16
135 ; CHECK-ERRORS: error: unpredictable LDP instruction, writeback base is also a destination
136 ; CHECK-ERRORS: ldp x1, x2, [x2], #16
138 ; CHECK-ERRORS: error: unpredictable LDP instruction, writeback base is also a destination
139 ; CHECK-ERRORS: ldp x2, x2, [x2], #16
141 ; CHECK-ERRORS: error: unpredictable LDP instruction, writeback base is also a destination
142 ; CHECK-ERRORS: ldp w1, w2, [x2], #16
144 ; CHECK-ERRORS: error: unpredictable LDP instruction, writeback base is also a destination
145 ; CHECK-ERRORS: ldp w2, w2, [x2], #16
147 ; CHECK-ERRORS: error: unpredictable LDP instruction, Rt2==Rt
148 ; CHECK-ERRORS: ldp x1, x1, [x2]
150 ; CHECK-ERRORS: error: unpredictable LDR instruction, writeback base is also a source
151 ; CHECK-ERRORS: ldr x2, [x2], #8
153 ; CHECK-ERRORS: error: unpredictable LDR instruction, writeback base is also a source
154 ; CHECK-ERRORS: ldr x2, [x2, #8]!
156 ; CHECK-ERRORS: error: unpredictable LDR instruction, writeback base is also a source
157 ; CHECK-ERRORS: ldr w2, [x2], #8
159 ; CHECK-ERRORS: error: unpredictable LDR instruction, writeback base is also a source
160 ; CHECK-ERRORS: ldr w2, [x2, #8]!
162 ; CHECK-ERRORS: error: unpredictable STR instruction, writeback base is also a source
163 ; CHECK-ERRORS: str x2, [x2], #8
165 ; CHECK-ERRORS: error: unpredictable STR instruction, writeback base is also a source
166 ; CHECK-ERRORS: str x2, [x2, #8]!
168 ; CHECK-ERRORS: error: unpredictable STR instruction, writeback base is also a source
169 ; CHECK-ERRORS: str w2, [x2], #8
171 ; CHECK-ERRORS: error: unpredictable STR instruction, writeback base is also a source
172 ; CHECK-ERRORS: str w2, [x2, #8]!
175 ; The validity checking for shifted-immediate operands. rdar://13174476
176 ; Where the immediate is out of range.
177 add w1, w2, w3, lsr #75
179 ; CHECK-ERRORS: error: expected 'sxtx' 'uxtx' or 'lsl' with optional integer in range [0, 4]
180 ; CHECK-ERRORS: add w1, w2, w3, lsr #75
183 ; logical instructions on 32-bit regs with shift > 31 is not legal
184 orr w0, w0, w0, lsl #32
185 ; CHECK-ERRORS: error: shift value out of range
186 ; CHECK-ERRORS: orr w0, w0, w0, lsl #32
188 eor w0, w0, w0, lsl #32
189 ; CHECK-ERRORS: error: shift value out of range
190 ; CHECK-ERRORS: eor w0, w0, w0, lsl #32
192 and w0, w0, w0, lsl #32
193 ; CHECK-ERRORS: error: shift value out of range
194 ; CHECK-ERRORS: and w0, w0, w0, lsl #32
196 ands w0, w0, w0, lsl #32
197 ; CHECK-ERRORS: error: shift value out of range
198 ; CHECK-ERRORS: ands w0, w0, w0, lsl #32
201 ; Relocated expressions should not be accepted for 32-bit adds or sub (imm)
202 add w3, w5, sym@PAGEOFF
203 ; CHECK-ERRORS: error: invalid immediate expression
204 ; CHECK-ERRORS: add w3, w5, sym@PAGEOFF
207 adds w3, w5, sym@PAGEOFF
208 adds x9, x12, sym@PAGEOFF
209 ; CHECK-ERRORS: error: invalid immediate expression
210 ; CHECK-ERRORS: adds w3, w5, sym@PAGEOFF
212 ; CHECK-ERRORS: error: invalid immediate expression
213 ; CHECK-ERRORS: adds x9, x12, sym@PAGEOFF
216 sub x3, x5, sym@PAGEOFF
217 sub w20, w30, sym@PAGEOFF
218 ; CHECK-ERRORS: error: invalid immediate expression
219 ; CHECK-ERRORS: sub x3, x5, sym@PAGEOFF
221 ; CHECK-ERRORS: error: invalid immediate expression
222 ; CHECK-ERRORS: sub w20, w30, sym@PAGEOFF
225 subs w9, w10, sym@PAGEOFF
226 subs x20, x30, sym@PAGEOFF
227 ; CHECK-ERRORS: error: invalid immediate expression
228 ; CHECK-ERRORS: subs w9, w10, sym@PAGEOFF
230 ; CHECK-ERRORS: error: invalid immediate expression
231 ; CHECK-ERRORS: subs x20, x30, sym@PAGEOFF
234 tbl v0.8b, { v1 }, v0.8b
235 tbl v0.16b, { v1.8b, v2.8b, v3.8b }, v0.16b
236 tbx v3.16b, { v12.8b, v13.8b, v14.8b }, v6.8b
237 tbx v2.8b, { v0 }, v6.8b
238 ; CHECK-ERRORS: error: invalid operand for instruction
239 ; CHECK-ERRORS: tbl v0.8b, { v1 }, v0.8b
241 ; CHECK-ERRORS: error: invalid operand for instruction
242 ; CHECK-ERRORS: tbl v0.16b, { v1.8b, v2.8b, v3.8b }, v0.16b
244 ; CHECK-ERRORS: error: invalid operand for instruction
245 ; CHECK-ERRORS: tbx v3.16b, { v12.8b, v13.8b, v14.8b }, v6.8b
247 ; CHECK-ERRORS: error: invalid operand for instruction
248 ; CHECK-ERRORS: tbx v2.8b, { v0 }, v6.8b
252 ; CHECK-ERRORS: error: invalid condition code
253 ; CHECK-ERRORS: b.c #0x4
257 ; CHECK-ERRORS: error: specified ic op does not use a register
259 ; CHECK-ERRORS: error: specified ic op does not use a register
261 ; CHECK-ERRORS: error: specified ic op requires a register
264 ; CHECK-ERRORS: error: specified dc op requires a register
266 ; CHECK-ERRORS: error: specified dc op requires a register
268 ; CHECK-ERRORS: error: specified dc op requires a register
270 ; CHECK-ERRORS: error: specified dc op requires a register
272 ; CHECK-ERRORS: error: specified dc op requires a register
274 ; CHECK-ERRORS: error: specified dc op requires a register
276 ; CHECK-ERRORS: error: specified dc op requires a register
278 ; CHECK-ERRORS: error: specified dc op requires a register
281 ; CHECK-ERRORS: error: specified at op requires a register
283 ; CHECK-ERRORS: error: specified at op requires a register
285 ; CHECK-ERRORS: error: specified at op requires a register
287 ; CHECK-ERRORS: error: specified at op requires a register
289 ; CHECK-ERRORS: error: specified at op requires a register
291 ; CHECK-ERRORS: error: specified at op requires a register
293 ; CHECK-ERRORS: error: specified at op requires a register
295 ; CHECK-ERRORS: error: specified at op requires a register
297 ; CHECK-ERRORS: error: specified at op requires a register
299 ; CHECK-ERRORS: error: specified at op requires a register
301 ; CHECK-ERRORS: error: specified at op requires a register
303 ; CHECK-ERRORS: error: specified at op requires a register
306 ; CHECK-ERRORS: error: specified tlbi op does not use a register
308 ; CHECK-ERRORS: error: specified tlbi op does not use a register
310 ; CHECK-ERRORS: error: specified tlbi op does not use a register
312 ; CHECK-ERRORS: error: specified tlbi op does not use a register
314 ; CHECK-ERRORS: error: specified tlbi op does not use a register
316 ; CHECK-ERRORS: error: specified tlbi op does not use a register
318 ; CHECK-ERRORS: error: specified tlbi op does not use a register
320 ; CHECK-ERRORS: error: specified tlbi op does not use a register
322 ; CHECK-ERRORS: error: specified tlbi op requires a register
324 ; CHECK-ERRORS: error: specified tlbi op requires a register
326 ; CHECK-ERRORS: error: specified tlbi op requires a register
328 ; CHECK-ERRORS: error: specified tlbi op requires a register
330 ; CHECK-ERRORS: error: specified tlbi op requires a register
332 ; CHECK-ERRORS: error: specified tlbi op requires a register
334 ; CHECK-ERRORS: error: specified tlbi op requires a register
336 ; CHECK-ERRORS: error: specified tlbi op requires a register
338 ; CHECK-ERRORS: error: specified tlbi op requires a register
340 ; CHECK-ERRORS: error: specified tlbi op requires a register
342 ; CHECK-ERRORS: error: specified tlbi op requires a register
344 ; CHECK-ERRORS: error: specified tlbi op requires a register
346 ; CHECK-ERRORS: error: specified tlbi op requires a register
348 ; CHECK-ERRORS: error: specified tlbi op requires a register
350 ; CHECK-ERRORS: error: specified tlbi op requires a register
352 ; CHECK-ERRORS: error: specified tlbi op requires a register
354 ; CHECK-ERRORS: error: specified tlbi op requires a register