1 ; RUN: not llvm-mc -triple arm64-apple-darwin -show-encoding < %s 2> %t | FileCheck %s
2 ; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
6 ; The first should encode as an expression. The second should error expecting
10 ; CHECK: ldr x3, foo+4 ; encoding: [0bAAA00011,A,A,0x58]
11 ; CHECK: ; fixup A - offset: 0, value: foo+4, kind: fixup_arm64_ldr_pcrel_imm19
12 ; CHECK-ERRORS: error: register expected
14 ; The last argument should be flagged as an error. rdar://9576009
15 ld4.8b {v0, v1, v2, v3}, [x0], #33
16 ; CHECK-ERRORS: error: invalid operand for instruction
17 ; CHECK-ERRORS: ld4.8b {v0, v1, v2, v3}, [x0], #33
27 ldp w3, w4, [x5, #11]!
28 ldp x3, x4, [x5, #12]!
29 ldp q3, q4, [x5, #12]!
36 ; CHECK-ERRORS: error: invalid offset in memory address.
37 ; CHECK-ERRORS: ldr x0, [x0, #804]
39 ; CHECK-ERRORS: error: invalid offset in memory address.
40 ; CHECK-ERRORS: ldr w0, [x0, #802]
42 ; CHECK-ERRORS: error: index must be an integer in range [-256, 255].
43 ; CHECK-ERRORS: ldr x0, [x0, #804]!
45 ; CHECK-ERRORS: error: invalid operand for instruction
46 ; CHECK-ERRORS: ldr w0, [w0, #301]!
48 ; CHECK-ERRORS: error: index must be an integer in range [-256, 255].
49 ; CHECK-ERRORS: ldr x0, [x0], #804
51 ; CHECK-ERRORS: error: invalid operand for instruction
52 ; CHECK-ERRORS: ldr w0, [w0], #301
54 ; CHECK-ERRORS: error: index must be a multiple of 4 in range [-256, 252].
55 ; CHECK-ERRORS: ldp w3, w4, [x5, #11]!
57 ; CHECK-ERRORS: error: index must be a multiple of 8 in range [-512, 504].
58 ; CHECK-ERRORS: ldp x3, x4, [x5, #12]!
60 ; CHECK-ERRORS: error: index must be a multiple of 16 in range [-1024, 1008].
61 ; CHECK-ERRORS: ldp q3, q4, [x5, #12]!
63 ; CHECK-ERRORS: error: index must be a multiple of 4 in range [-256, 252].
64 ; CHECK-ERRORS: ldp w3, w4, [x5], #11
66 ; CHECK-ERRORS: error: index must be a multiple of 8 in range [-512, 504].
67 ; CHECK-ERRORS: ldp x3, x4, [x5], #12
69 ; CHECK-ERRORS: error: index must be a multiple of 8 in range [-512, 504].
70 ; CHECK-ERRORS: ldp q3, q4, [x5], #12
72 ; CHECK-ERRORS: error: index must be an integer in range [-256, 255].
73 ; CHECK-ERRORS: ldur x0, [x1, #-257]
77 ldrb w1, [x3, w3, sxtw #4]
78 ldrh w1, [x3, w3, sxtw #4]
79 ldr w1, [x3, w3, sxtw #4]
80 ldr x1, [x3, w3, sxtw #4]
81 ldr b1, [x3, w3, sxtw #4]
82 ldr h1, [x3, w3, sxtw #4]
83 ldr s1, [x3, w3, sxtw #4]
84 ldr d1, [x3, w3, sxtw #4]
85 ldr q1, [x3, w3, sxtw #1]
87 ; CHECK-ERRORS: error: invalid offset in memory address.
88 ; CHECK-ERRORS:ldrb w1, [x3, w3, sxtw #4]
90 ; CHECK-ERRORS: error: invalid offset in memory address.
91 ; CHECK-ERRORS:ldrh w1, [x3, w3, sxtw #4]
93 ; CHECK-ERRORS: error: invalid offset in memory address.
94 ; CHECK-ERRORS:ldr w1, [x3, w3, sxtw #4]
96 ; CHECK-ERRORS: error: invalid offset in memory address.
97 ; CHECK-ERRORS:ldr x1, [x3, w3, sxtw #4]
99 ; CHECK-ERRORS: error: invalid offset in memory address.
100 ; CHECK-ERRORS:ldr b1, [x3, w3, sxtw #4]
102 ; CHECK-ERRORS: invalid offset in memory address.
103 ; CHECK-ERRORS:ldr h1, [x3, w3, sxtw #4]
105 ; CHECK-ERRORS: invalid offset in memory address.
106 ; CHECK-ERRORS:ldr s1, [x3, w3, sxtw #4]
108 ; CHECK-ERRORS: invalid offset in memory address.
109 ; CHECK-ERRORS:ldr d1, [x3, w3, sxtw #4]
111 ; CHECK-ERRORS: invalid offset in memory address.
112 ; CHECK-ERRORS:ldr q1, [x3, w3, sxtw #1]
115 ; Check that register offset addressing modes only accept 32-bit offset
116 ; registers when using uxtw/sxtw extends. Everything else requires a 64-bit
118 str d1, [x3, w3, sxtx #3]
119 ldr s1, [x3, d3, sxtx #2]
121 ; CHECK-ERRORS: 32-bit general purpose offset register requires sxtw or uxtw extend
122 ; CHECK-ERRORS: str d1, [x3, w3, sxtx #3]
124 ; CHECK-ERRORS: error: 64-bit general purpose offset register expected
125 ; CHECK-ERRORS: ldr s1, [x3, d3, sxtx #2]
128 ; Shift immediates range checking.
130 rshrn v9.8b, v11.8h, #17
131 sqrshrn v7.4h, v8.4s, #39
132 uqshrn2 v4.4s, v5.2d, #67
134 ; CHECK-ERRORS: error: immediate must be an integer in range [1, 8].
135 ; CHECK-ERRORS: sqrshrn b4, h9, #10
137 ; CHECK-ERRORS: error: immediate must be an integer in range [1, 8].
138 ; CHECK-ERRORS: rshrn v9.8b, v11.8h, #17
140 ; CHECK-ERRORS: error: immediate must be an integer in range [1, 16].
141 ; CHECK-ERRORS: sqrshrn v7.4h, v8.4s, #39
143 ; CHECK-ERRORS: error: immediate must be an integer in range [1, 32].
144 ; CHECK-ERRORS: uqshrn2 v4.4s, v5.2d, #67
148 st1.s4 {v14, v15}, [x2], #32
149 ; CHECK-ERRORS: error: invalid type suffix for instruction
150 ; CHECK-ERRORS: st1.s4 {v14, v15}, [x2], #32
155 ; Load pair instructions where Rt==Rt2 and writeback load/store instructions
156 ; where Rt==Rn or Rt2==Rn are unpredicatable.
157 ldp x1, x2, [x2], #16
158 ldp x2, x2, [x2], #16
159 ldp w1, w2, [x2], #16
160 ldp w2, w2, [x2], #16
173 ; CHECK-ERRORS: error: unpredictable LDP instruction, writeback base is also a destination
174 ; CHECK-ERRORS: ldp x1, x2, [x2], #16
176 ; CHECK-ERRORS: error: unpredictable LDP instruction, writeback base is also a destination
177 ; CHECK-ERRORS: ldp x2, x2, [x2], #16
179 ; CHECK-ERRORS: error: unpredictable LDP instruction, writeback base is also a destination
180 ; CHECK-ERRORS: ldp w1, w2, [x2], #16
182 ; CHECK-ERRORS: error: unpredictable LDP instruction, writeback base is also a destination
183 ; CHECK-ERRORS: ldp w2, w2, [x2], #16
185 ; CHECK-ERRORS: error: unpredictable LDP instruction, Rt2==Rt
186 ; CHECK-ERRORS: ldp x1, x1, [x2]
188 ; CHECK-ERRORS: error: unpredictable LDR instruction, writeback base is also a source
189 ; CHECK-ERRORS: ldr x2, [x2], #8
191 ; CHECK-ERRORS: error: unpredictable LDR instruction, writeback base is also a source
192 ; CHECK-ERRORS: ldr x2, [x2, #8]!
194 ; CHECK-ERRORS: error: unpredictable LDR instruction, writeback base is also a source
195 ; CHECK-ERRORS: ldr w2, [x2], #8
197 ; CHECK-ERRORS: error: unpredictable LDR instruction, writeback base is also a source
198 ; CHECK-ERRORS: ldr w2, [x2, #8]!
200 ; CHECK-ERRORS: error: unpredictable STR instruction, writeback base is also a source
201 ; CHECK-ERRORS: str x2, [x2], #8
203 ; CHECK-ERRORS: error: unpredictable STR instruction, writeback base is also a source
204 ; CHECK-ERRORS: str x2, [x2, #8]!
206 ; CHECK-ERRORS: error: unpredictable STR instruction, writeback base is also a source
207 ; CHECK-ERRORS: str w2, [x2], #8
209 ; CHECK-ERRORS: error: unpredictable STR instruction, writeback base is also a source
210 ; CHECK-ERRORS: str w2, [x2, #8]!
213 ; The validity checking for shifted-immediate operands. rdar://13174476
214 ; Where the immediate is out of range.
215 add w1, w2, w3, lsr #75
217 ; CHECK-ERRORS: error: expected 'sxtx' 'uxtx' or 'lsl' with optional integer in range [0, 4]
218 ; CHECK-ERRORS: add w1, w2, w3, lsr #75
221 ; logical instructions on 32-bit regs with shift > 31 is not legal
222 orr w0, w0, w0, lsl #32
223 ; CHECK-ERRORS: error: expected 'lsl', 'lsr' or 'asr' with optional integer in range [0, 31]
224 ; CHECK-ERRORS: orr w0, w0, w0, lsl #32
226 eor w0, w0, w0, lsl #32
227 ; CHECK-ERRORS: error: expected 'lsl', 'lsr' or 'asr' with optional integer in range [0, 31]
228 ; CHECK-ERRORS: eor w0, w0, w0, lsl #32
230 and w0, w0, w0, lsl #32
231 ; CHECK-ERRORS: error: expected 'lsl', 'lsr' or 'asr' with optional integer in range [0, 31]
232 ; CHECK-ERRORS: and w0, w0, w0, lsl #32
234 ands w0, w0, w0, lsl #32
235 ; CHECK-ERRORS: error: expected 'lsl', 'lsr' or 'asr' with optional integer in range [0, 31]
236 ; CHECK-ERRORS: ands w0, w0, w0, lsl #32
239 ; Relocated expressions should not be accepted for 32-bit adds or sub (imm)
240 add w3, w5, sym@PAGEOFF
241 ; CHECK-ERRORS: error: invalid immediate expression
242 ; CHECK-ERRORS: add w3, w5, sym@PAGEOFF
245 adds w3, w5, sym@PAGEOFF
246 adds x9, x12, sym@PAGEOFF
247 ; CHECK-ERRORS: error: invalid immediate expression
248 ; CHECK-ERRORS: adds w3, w5, sym@PAGEOFF
250 ; CHECK-ERRORS: error: invalid immediate expression
251 ; CHECK-ERRORS: adds x9, x12, sym@PAGEOFF
254 sub x3, x5, sym@PAGEOFF
255 sub w20, w30, sym@PAGEOFF
256 ; CHECK-ERRORS: error: invalid immediate expression
257 ; CHECK-ERRORS: sub x3, x5, sym@PAGEOFF
259 ; CHECK-ERRORS: error: invalid immediate expression
260 ; CHECK-ERRORS: sub w20, w30, sym@PAGEOFF
263 subs w9, w10, sym@PAGEOFF
264 subs x20, x30, sym@PAGEOFF
265 ; CHECK-ERRORS: error: invalid immediate expression
266 ; CHECK-ERRORS: subs w9, w10, sym@PAGEOFF
268 ; CHECK-ERRORS: error: invalid immediate expression
269 ; CHECK-ERRORS: subs x20, x30, sym@PAGEOFF
272 tbl v0.8b, { v1 }, v0.8b
273 tbl v0.16b, { v1.8b, v2.8b, v3.8b }, v0.16b
274 tbx v3.16b, { v12.8b, v13.8b, v14.8b }, v6.8b
275 tbx v2.8b, { v0 }, v6.8b
276 ; CHECK-ERRORS: error: invalid operand for instruction
277 ; CHECK-ERRORS: tbl v0.8b, { v1 }, v0.8b
279 ; CHECK-ERRORS: error: invalid operand for instruction
280 ; CHECK-ERRORS: tbl v0.16b, { v1.8b, v2.8b, v3.8b }, v0.16b
282 ; CHECK-ERRORS: error: invalid operand for instruction
283 ; CHECK-ERRORS: tbx v3.16b, { v12.8b, v13.8b, v14.8b }, v6.8b
285 ; CHECK-ERRORS: error: invalid operand for instruction
286 ; CHECK-ERRORS: tbx v2.8b, { v0 }, v6.8b
290 ; CHECK-ERRORS: error: invalid condition code
291 ; CHECK-ERRORS: b.c #0x4
295 ; CHECK-ERRORS: error: specified ic op does not use a register
297 ; CHECK-ERRORS: error: specified ic op does not use a register
299 ; CHECK-ERRORS: error: specified ic op requires a register
302 ; CHECK-ERRORS: error: specified dc op requires a register
304 ; CHECK-ERRORS: error: specified dc op requires a register
306 ; CHECK-ERRORS: error: specified dc op requires a register
308 ; CHECK-ERRORS: error: specified dc op requires a register
310 ; CHECK-ERRORS: error: specified dc op requires a register
312 ; CHECK-ERRORS: error: specified dc op requires a register
314 ; CHECK-ERRORS: error: specified dc op requires a register
316 ; CHECK-ERRORS: error: specified dc op requires a register
319 ; CHECK-ERRORS: error: specified at op requires a register
321 ; CHECK-ERRORS: error: specified at op requires a register
323 ; CHECK-ERRORS: error: specified at op requires a register
325 ; CHECK-ERRORS: error: specified at op requires a register
327 ; CHECK-ERRORS: error: specified at op requires a register
329 ; CHECK-ERRORS: error: specified at op requires a register
331 ; CHECK-ERRORS: error: specified at op requires a register
333 ; CHECK-ERRORS: error: specified at op requires a register
335 ; CHECK-ERRORS: error: specified at op requires a register
337 ; CHECK-ERRORS: error: specified at op requires a register
339 ; CHECK-ERRORS: error: specified at op requires a register
341 ; CHECK-ERRORS: error: specified at op requires a register
344 ; CHECK-ERRORS: error: specified tlbi op does not use a register
346 ; CHECK-ERRORS: error: specified tlbi op does not use a register
348 ; CHECK-ERRORS: error: specified tlbi op does not use a register
350 ; CHECK-ERRORS: error: specified tlbi op does not use a register
352 ; CHECK-ERRORS: error: specified tlbi op does not use a register
354 ; CHECK-ERRORS: error: specified tlbi op does not use a register
356 ; CHECK-ERRORS: error: specified tlbi op does not use a register
358 ; CHECK-ERRORS: error: specified tlbi op does not use a register
360 ; CHECK-ERRORS: error: specified tlbi op requires a register
362 ; CHECK-ERRORS: error: specified tlbi op requires a register
364 ; CHECK-ERRORS: error: specified tlbi op requires a register
366 ; CHECK-ERRORS: error: specified tlbi op requires a register
368 ; CHECK-ERRORS: error: specified tlbi op requires a register
370 ; CHECK-ERRORS: error: specified tlbi op requires a register
372 ; CHECK-ERRORS: error: specified tlbi op requires a register
374 ; CHECK-ERRORS: error: specified tlbi op requires a register
376 ; CHECK-ERRORS: error: specified tlbi op requires a register
378 ; CHECK-ERRORS: error: specified tlbi op requires a register
380 ; CHECK-ERRORS: error: specified tlbi op requires a register
382 ; CHECK-ERRORS: error: specified tlbi op requires a register
384 ; CHECK-ERRORS: error: specified tlbi op requires a register
386 ; CHECK-ERRORS: error: specified tlbi op requires a register
388 ; CHECK-ERRORS: error: specified tlbi op requires a register
390 ; CHECK-ERRORS: error: specified tlbi op requires a register
392 ; CHECK-ERRORS: error: specified tlbi op requires a register