1 ; RUN: not llvm-mc -triple arm64-apple-darwin -show-encoding < %s 2> %t | FileCheck %s
2 ; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
6 ; The first should encode as an expression. The second should error expecting
10 ; CHECK: ldr x3, foo+4 ; encoding: [0bAAA00011,A,A,0x58]
11 ; CHECK: ; fixup A - offset: 0, value: foo+4, kind: fixup_arm64_pcrel_imm19
12 ; CHECK-ERRORS: error: register expected
14 ; The last argument should be flagged as an error. rdar://9576009
15 ld4.8b {v0, v1, v2, v3}, [x0], #33
16 ; CHECK-ERRORS: error: invalid operand for instruction
17 ; CHECK-ERRORS: ld4.8b {v0, v1, v2, v3}, [x0], #33
27 ldp w3, w4, [x5, #11]!
28 ldp x3, x4, [x5, #12]!
29 ldp q3, q4, [x5, #12]!
36 ; CHECK-ERRORS: error: index must be a multiple of 8 in range [0,32760].
37 ; CHECK-ERRORS: ldr x0, [x0, #804]
39 ; CHECK-ERRORS: error: index must be a multiple of 4 in range [0,16380].
40 ; CHECK-ERRORS: ldr w0, [x0, #802]
42 ; CHECK-ERRORS: error: index must be an integer in range [-256,255].
43 ; CHECK-ERRORS: ldr x0, [x0, #804]!
45 ; CHECK-ERRORS: error: index must be an integer in range [-256,255].
46 ; CHECK-ERRORS: ldr w0, [w0, #301]!
48 ; CHECK-ERRORS: error: index must be an integer in range [-256,255].
49 ; CHECK-ERRORS: ldr x0, [x0], #804
51 ; CHECK-ERRORS: error: index must be an integer in range [-256,255].
52 ; CHECK-ERRORS: ldr w0, [w0], #301
54 ; CHECK-ERRORS: error: index must be a multiple of 4 in range [-256,252].
55 ; CHECK-ERRORS: ldp w3, w4, [x5, #11]!
57 ; CHECK-ERRORS: error: index must be a multiple of 8 in range [-512,504].
58 ; CHECK-ERRORS: ldp x3, x4, [x5, #12]!
60 ; CHECK-ERRORS: error: index must be a multiple of 16 in range [-1024,1008].
61 ; CHECK-ERRORS: ldp q3, q4, [x5, #12]!
63 ; CHECK-ERRORS: error: index must be a multiple of 4 in range [-256,252].
64 ; CHECK-ERRORS: ldp w3, w4, [x5], #11
66 ; CHECK-ERRORS: error: index must be a multiple of 8 in range [-512,504].
67 ; CHECK-ERRORS: ldp x3, x4, [x5], #12
69 ; CHECK-ERRORS: error: index must be a multiple of 8 in range [-512,504].
70 ; CHECK-ERRORS: ldp q3, q4, [x5], #12
72 ; CHECK-ERRORS: error: index must be an integer in range [-256,255].
73 ; CHECK-ERRORS: ldur x0, [x1, #-257]
78 ; Shift immediates range checking.
80 rshrn v9.8b, v11.8h, #17
81 sqrshrn v7.4h, v8.4s, #39
82 uqshrn2 v4.4s, v5.2d, #67
84 ; CHECK-ERRORS: error: immediate must be an integer in range [1,8].
85 ; CHECK-ERRORS: sqrshrn b4, h9, #10
87 ; CHECK-ERRORS: error: immediate must be an integer in range [1,8].
88 ; CHECK-ERRORS: rshrn v9.8b, v11.8h, #17
90 ; CHECK-ERRORS: error: immediate must be an integer in range [1,16].
91 ; CHECK-ERRORS: sqrshrn v7.4h, v8.4s, #39
93 ; CHECK-ERRORS: error: immediate must be an integer in range [1,32].
94 ; CHECK-ERRORS: uqshrn2 v4.4s, v5.2d, #67
98 st1.s4 {v14, v15}, [x2], #32
99 ; CHECK-ERRORS: error: invalid type suffix for instruction
100 ; CHECK-ERRORS: st1.s4 {v14, v15}, [x2], #32
105 ; Load pair instructions where Rt==Rt2 and writeback load/store instructions
106 ; where Rt==Rn or Rt2==Rn are unpredicatable.
107 ldp x1, x2, [x2], #16
108 ldp x2, x2, [x2], #16
109 ldp w1, w2, [x2], #16
110 ldp w2, w2, [x2], #16
123 ; CHECK-ERRORS: error: unpredictable LDP instruction, writeback base is also a destination
124 ; CHECK-ERRORS: ldp x1, x2, [x2], #16
126 ; CHECK-ERRORS: error: unpredictable LDP instruction, writeback base is also a destination
127 ; CHECK-ERRORS: ldp x2, x2, [x2], #16
129 ; CHECK-ERRORS: error: unpredictable LDP instruction, writeback base is also a destination
130 ; CHECK-ERRORS: ldp w1, w2, [x2], #16
132 ; CHECK-ERRORS: error: unpredictable LDP instruction, writeback base is also a destination
133 ; CHECK-ERRORS: ldp w2, w2, [x2], #16
135 ; CHECK-ERRORS: error: unpredictable LDP instruction, Rt2==Rt
136 ; CHECK-ERRORS: ldp x1, x1, [x2]
138 ; CHECK-ERRORS: error: unpredictable LDR instruction, writeback base is also a source
139 ; CHECK-ERRORS: ldr x2, [x2], #8
141 ; CHECK-ERRORS: error: unpredictable LDR instruction, writeback base is also a source
142 ; CHECK-ERRORS: ldr x2, [x2, #8]!
144 ; CHECK-ERRORS: error: unpredictable LDR instruction, writeback base is also a source
145 ; CHECK-ERRORS: ldr w2, [x2], #8
147 ; CHECK-ERRORS: error: unpredictable LDR instruction, writeback base is also a source
148 ; CHECK-ERRORS: ldr w2, [x2, #8]!
150 ; CHECK-ERRORS: error: unpredictable STR instruction, writeback base is also a source
151 ; CHECK-ERRORS: str x2, [x2], #8
153 ; CHECK-ERRORS: error: unpredictable STR instruction, writeback base is also a source
154 ; CHECK-ERRORS: str x2, [x2, #8]!
156 ; CHECK-ERRORS: error: unpredictable STR instruction, writeback base is also a source
157 ; CHECK-ERRORS: str w2, [x2], #8
159 ; CHECK-ERRORS: error: unpredictable STR instruction, writeback base is also a source
160 ; CHECK-ERRORS: str w2, [x2, #8]!
163 ; The validity checking for shifted-immediate operands. rdar://13174476
164 ; Where the immediate is out of range.
165 add w1, w2, w3, lsr #75
167 ; CHECK-ERRORS: error: immediate value too large for shifter operand
168 ; CHECK-ERRORS: add w1, w2, w3, lsr #75
171 ; logical instructions on 32-bit regs with shift > 31 is not legal
172 orr w0, w0, w0, lsl #32
173 ; CHECK-ERRORS: error: shift value out of range
174 ; CHECK-ERRORS: orr w0, w0, w0, lsl #32
176 eor w0, w0, w0, lsl #32
177 ; CHECK-ERRORS: error: shift value out of range
178 ; CHECK-ERRORS: eor w0, w0, w0, lsl #32
180 and w0, w0, w0, lsl #32
181 ; CHECK-ERRORS: error: shift value out of range
182 ; CHECK-ERRORS: and w0, w0, w0, lsl #32
184 ands w0, w0, w0, lsl #32
185 ; CHECK-ERRORS: error: shift value out of range
186 ; CHECK-ERRORS: ands w0, w0, w0, lsl #32
189 ; Relocated expressions should not be accepted for 32-bit adds or sub (imm)
190 add w3, w5, sym@PAGEOFF
191 ; CHECK-ERRORS: error: invalid immediate expression
192 ; CHECK-ERRORS: add w3, w5, sym@PAGEOFF
195 adds w3, w5, sym@PAGEOFF
196 adds x9, x12, sym@PAGEOFF
197 ; CHECK-ERRORS: error: invalid immediate expression
198 ; CHECK-ERRORS: adds w3, w5, sym@PAGEOFF
200 ; CHECK-ERRORS: error: invalid immediate expression
201 ; CHECK-ERRORS: adds x9, x12, sym@PAGEOFF
204 sub x3, x5, sym@PAGEOFF
205 sub w20, w30, sym@PAGEOFF
206 ; CHECK-ERRORS: error: invalid immediate expression
207 ; CHECK-ERRORS: sub x3, x5, sym@PAGEOFF
209 ; CHECK-ERRORS: error: invalid immediate expression
210 ; CHECK-ERRORS: sub w20, w30, sym@PAGEOFF
213 subs w9, w10, sym@PAGEOFF
214 subs x20, x30, sym@PAGEOFF
215 ; CHECK-ERRORS: error: invalid immediate expression
216 ; CHECK-ERRORS: subs w9, w10, sym@PAGEOFF
218 ; CHECK-ERRORS: error: invalid immediate expression
219 ; CHECK-ERRORS: subs x20, x30, sym@PAGEOFF
222 tbl v0.8b, { v1 }, v0.8b
223 tbl v0.16b, { v1.8b, v2.8b, v3.8b }, v0.16b
224 tbx v3.16b, { v12.8b, v13.8b, v14.8b }, v6.8b
225 tbx v2.8b, { v0 }, v6.8b
226 ; CHECK-ERRORS: error: invalid operand for instruction
227 ; CHECK-ERRORS: tbl v0.8b, { v1 }, v0.8b
229 ; CHECK-ERRORS: error: invalid operand for instruction
230 ; CHECK-ERRORS: tbl v0.16b, { v1.8b, v2.8b, v3.8b }, v0.16b
232 ; CHECK-ERRORS: error: invalid operand for instruction
233 ; CHECK-ERRORS: tbx v3.16b, { v12.8b, v13.8b, v14.8b }, v6.8b
235 ; CHECK-ERRORS: error: invalid operand for instruction
236 ; CHECK-ERRORS: tbx v2.8b, { v0 }, v6.8b
240 ; CHECK-ERRORS: error: invalid condition code
241 ; CHECK-ERRORS: b.c #0x4
245 ; CHECK-ERRORS: error: specified ic op does not use a register
247 ; CHECK-ERRORS: error: specified ic op does not use a register
249 ; CHECK-ERRORS: error: specified ic op requires a register
252 ; CHECK-ERRORS: error: specified dc op requires a register
254 ; CHECK-ERRORS: error: specified dc op requires a register
256 ; CHECK-ERRORS: error: specified dc op requires a register
258 ; CHECK-ERRORS: error: specified dc op requires a register
260 ; CHECK-ERRORS: error: specified dc op requires a register
262 ; CHECK-ERRORS: error: specified dc op requires a register
264 ; CHECK-ERRORS: error: specified dc op requires a register
266 ; CHECK-ERRORS: error: specified dc op requires a register
269 ; CHECK-ERRORS: error: specified at op requires a register
271 ; CHECK-ERRORS: error: specified at op requires a register
273 ; CHECK-ERRORS: error: specified at op requires a register
275 ; CHECK-ERRORS: error: specified at op requires a register
277 ; CHECK-ERRORS: error: specified at op requires a register
279 ; CHECK-ERRORS: error: specified at op requires a register
281 ; CHECK-ERRORS: error: specified at op requires a register
283 ; CHECK-ERRORS: error: specified at op requires a register
285 ; CHECK-ERRORS: error: specified at op requires a register
287 ; CHECK-ERRORS: error: specified at op requires a register
289 ; CHECK-ERRORS: error: specified at op requires a register
291 ; CHECK-ERRORS: error: specified at op requires a register
294 ; CHECK-ERRORS: error: specified tlbi op does not use a register
296 ; CHECK-ERRORS: error: specified tlbi op does not use a register
298 ; CHECK-ERRORS: error: specified tlbi op does not use a register
300 ; CHECK-ERRORS: error: specified tlbi op does not use a register
302 ; CHECK-ERRORS: error: specified tlbi op does not use a register
304 ; CHECK-ERRORS: error: specified tlbi op does not use a register
306 ; CHECK-ERRORS: error: specified tlbi op does not use a register
308 ; CHECK-ERRORS: error: specified tlbi op does not use a register
310 ; CHECK-ERRORS: error: specified tlbi op requires a register
312 ; CHECK-ERRORS: error: specified tlbi op requires a register
314 ; CHECK-ERRORS: error: specified tlbi op requires a register
316 ; CHECK-ERRORS: error: specified tlbi op requires a register
318 ; CHECK-ERRORS: error: specified tlbi op requires a register
320 ; CHECK-ERRORS: error: specified tlbi op requires a register
322 ; CHECK-ERRORS: error: specified tlbi op requires a register
324 ; CHECK-ERRORS: error: specified tlbi op requires a register
326 ; CHECK-ERRORS: error: specified tlbi op requires a register
328 ; CHECK-ERRORS: error: specified tlbi op requires a register
330 ; CHECK-ERRORS: error: specified tlbi op requires a register
332 ; CHECK-ERRORS: error: specified tlbi op requires a register
334 ; CHECK-ERRORS: error: specified tlbi op requires a register
336 ; CHECK-ERRORS: error: specified tlbi op requires a register
338 ; CHECK-ERRORS: error: specified tlbi op requires a register
340 ; CHECK-ERRORS: error: specified tlbi op requires a register
342 ; CHECK-ERRORS: error: specified tlbi op requires a register