Fix an instance where we would drop fast math flags when performing an fdiv to recipr...
[oota-llvm.git] / test / MC / Disassembler / ARM / neont-VLD-reencoding.txt
1 # RUN: llvm-mc -triple thumbv7 -show-encoding -disassemble < %s | FileCheck %s
2
3 0xa0 0xf9 0x00 0x00
4 0xa0 0xf9 0x20 0x00
5 0xa0 0xf9 0x40 0x00
6 0xa0 0xf9 0x60 0x00
7 0xa0 0xf9 0x80 0x00
8 0xa0 0xf9 0xa0 0x00
9 0xa0 0xf9 0xc0 0x00
10 0xa0 0xf9 0xe0 0x00
11
12 # CHECK: vld1.8  {d0[0]}, [r0], r0 @ encoding: [0xa0,0xf9,0x00,0x00]
13 # CHECK: vld1.8  {d0[1]}, [r0], r0 @ encoding: [0xa0,0xf9,0x20,0x00]
14 # CHECK: vld1.8  {d0[2]}, [r0], r0 @ encoding: [0xa0,0xf9,0x40,0x00]
15 # CHECK: vld1.8  {d0[3]}, [r0], r0 @ encoding: [0xa0,0xf9,0x60,0x00]
16 # CHECK: vld1.8  {d0[4]}, [r0], r0 @ encoding: [0xa0,0xf9,0x80,0x00]
17 # CHECK: vld1.8  {d0[5]}, [r0], r0 @ encoding: [0xa0,0xf9,0xa0,0x00]
18 # CHECK: vld1.8  {d0[6]}, [r0], r0 @ encoding: [0xa0,0xf9,0xc0,0x00]
19 # CHECK: vld1.8  {d0[7]}, [r0], r0 @ encoding: [0xa0,0xf9,0xe0,0x00]
20
21 0xa0 0xf9 0x00 0x04
22 0xa0 0xf9 0x10 0x04
23 0xa0 0xf9 0x40 0x04
24 0xa0 0xf9 0x50 0x04
25 0xa0 0xf9 0x80 0x04
26 0xa0 0xf9 0x90 0x04
27 0xa0 0xf9 0xc0 0x04
28 0xa0 0xf9 0xd0 0x04
29
30 # CHECK: vld1.16 {d0[0]}, [r0], r0      @ encoding: [0xa0,0xf9,0x00,0x04]
31 # CHECK: vld1.16 {d0[0]}, [r0:16], r0 @ encoding: [0xa0,0xf9,0x10,0x04]
32 # CHECK: vld1.16 {d0[1]}, [r0], r0      @ encoding: [0xa0,0xf9,0x40,0x04]
33 # CHECK: vld1.16 {d0[1]}, [r0:16], r0 @ encoding: [0xa0,0xf9,0x50,0x04]
34 # CHECK: vld1.16 {d0[2]}, [r0], r0      @ encoding: [0xa0,0xf9,0x80,0x04]
35 # CHECK: vld1.16 {d0[2]}, [r0:16], r0 @ encoding: [0xa0,0xf9,0x90,0x04]
36 # CHECK: vld1.16 {d0[3]}, [r0], r0      @ encoding: [0xa0,0xf9,0xc0,0x04]
37 # CHECK: vld1.16 {d0[3]}, [r0:16], r0 @ encoding: [0xa0,0xf9,0xd0,0x04]
38
39 0xa0 0xf9 0x00 0x08
40 0xa0 0xf9 0x30 0x08
41 0xa0 0xf9 0x80 0x08
42 0xa0 0xf9 0xb0 0x08
43
44 # CHECK: vld1.32 {d0[0]}, [r0], r0      @ encoding: [0xa0,0xf9,0x00,0x08]
45 # CHECK: vld1.32 {d0[0]}, [r0:32], r0 @ encoding: [0xa0,0xf9,0x30,0x08]
46 # CHECK: vld1.32 {d0[1]}, [r0], r0      @ encoding: [0xa0,0xf9,0x80,0x08]
47 # CHECK: vld1.32 {d0[1]}, [r0:32], r0 @ encoding: [0xa0,0xf9,0xb0,0x08]
48
49 0xa0 0xf9 0x1f 0x04
50 0xa0 0xf9 0x8f 0x00
51
52 # CHECK: vld1.16 {d0[0]}, [r0:16] @ encoding: [0xa0,0xf9,0x1f,0x04]
53 # CHECK: vld1.8  {d0[4]}, [r0]      @ encoding: [0xa0,0xf9,0x8f,0x00]
54
55 0xa0 0xf9 0x1d 0x04
56 0xa0 0xf9 0x8d 0x00
57
58 # CHECK: vld1.16 {d0[0]}, [r0:16]! @ encoding: [0xa0,0xf9,0x1d,0x04]
59 # CHECK: vld1.8  {d0[4]}, [r0]!      @ encoding: [0xa0,0xf9,0x8d,0x00]
60
61 0xa5 0xf9 0x10 0x04
62 0xa5 0xf9 0x1a 0x04
63 0xae 0xf9 0x1a 0x04
64 0xa5 0xf9 0x1a 0x94
65
66 # CHECK: vld1.16 {d0[0]}, [r5:16], r0  @ encoding: [0xa5,0xf9,0x10,0x04]
67 # CHECK: vld1.16 {d0[0]}, [r5:16], r10 @ encoding: [0xa5,0xf9,0x1a,0x04]
68 # CHECK: vld1.16 {d0[0]}, [lr:16], r10 @ encoding: [0xae,0xf9,0x1a,0x04]
69 # CHECK: vld1.16 {d9[0]}, [r5:16], r10 @ encoding: [0xa5,0xf9,0x1a,0x94]
70
71 0xa0 0xf9 0x20 0x0b
72 0xa0 0xf9 0x20 0x07
73 0xa0 0xf9 0x20 0x03
74
75 # CHECK: vld4.32 {d0[0], d1[0], d2[0], d3[0]}, [r0:128], r0 @ encoding: [0xa0,0xf9,0x20,0x0b]
76 # CHECK: vld4.16 {d0[0], d2[0], d4[0], d6[0]}, [r0], r0       @ encoding: [0xa0,0xf9,0x20,0x07]
77 # CHECK: vld4.8  {d0[1], d1[1], d2[1], d3[1]}, [r0], r0       @ encoding: [0xa0,0xf9,0x20,0x03]