[Hexagon] Marking several instructions as isCodeGenOnly=0 and adding direct disassemb...
[oota-llvm.git] / test / MC / Disassembler / Hexagon / alu32_alu.txt
1 # RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
2
3 0x11 0xdf 0x15 0xf3
4 # CHECK: r17 = add(r21, r31)
5 0x11 0xdf 0x15 0xf1
6 # CHECK: r17 = and(r21, r31)
7 0x11 0xdf 0x35 0xf1
8 # CHECK: r17 = or(r21, r31)
9 0x11 0xdf 0x75 0xf1
10 # CHECK: r17 = xor(r21, r31)
11 0x00 0xc0 0x00 0x7f
12 # CHECK: nop
13 0x11 0xdf 0x35 0xf3
14 # CHECK: r17 = sub(r31, r21)
15 0x11 0xc0 0xbf 0x70
16 # CHECK: r17 = sxtb(r31)
17 0x11 0xc0 0xd5 0x70
18 # CHECK: r17 = zxth(r21)