[Hexagon] Adding doubleword load.
[oota-llvm.git] / test / MC / Disassembler / Hexagon / alu32_perm.txt
1 # RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
2
3 0x11 0xdf 0x95 0xf3
4 # CHECK: r17 = combine(r31.h, r21.h)
5 0x11 0xdf 0xb5 0xf3
6 # CHECK: r17 = combine(r31.h, r21.l)
7 0x11 0xdf 0xd5 0xf3
8 # CHECK: r17 = combine(r31.l, r21.h)
9 0x11 0xdf 0xf5 0xf3
10 # CHECK: r17 = combine(r31.l, r21.l)
11 0xb0 0xe2 0x0f 0x7c
12 # CHECK: r17:16 = combine(#21, #31)
13 0xb0 0xe2 0x3f 0x73
14 # CHECK: r17:16 = combine(#21, r31)
15 0xf0 0xe3 0x15 0x73
16 # CHECK: r17:16 = combine(r21, #31)
17 0x10 0xdf 0x15 0xf5
18 # CHECK: r17:16 = combine(r21, r31)
19 0xf1 0xc3 0x75 0x73
20 # CHECK: r17 = mux(p3, r21, #31)
21 0xb1 0xc2 0xff 0x73
22 # CHECK: r17 = mux(p3, #21, r31)
23 0xb1 0xe2 0x8f 0x7b
24 # CHECK: r17 = mux(p3, #21, #31)
25 0x71 0xdf 0x15 0xf4
26 # CHECK: r17 = mux(p3, r21, r31)
27 0x11 0xc0 0x15 0x70
28 # CHECK: r17 = aslh(r21)
29 0x11 0xc0 0x35 0x70
30 # CHECK: r17 = asrh(r21)
31 0x10 0xdf 0x95 0xf5
32 # CHECK: r17:16 = packhl(r21, r31)