Treat VEX.vvvv as a 3-bit field outside of 64-bit mode. Prevents access to registers...
[oota-llvm.git] / test / MC / Disassembler / X86 / invalid-VEX-vvvv.txt
1 # RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 |& grep {invalid instruction encoding}
2
3 # This instruction would decode as movmskps if the vvvv field in the VEX prefix was all 1s.
4 0xc5 0xf0 0x50 0xc0