2 # RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck %s
4 # RUN: llvm-mc -triple powerpc64-unknown-unknown -filetype=obj %s | \
5 # RUN: llvm-readobj -r | FileCheck %s -check-prefix=REL
7 # CHECK: b target # encoding: [0b010010AA,A,A,0bAAAAAA00]
8 # CHECK-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_br24
9 # CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_REL24 target 0x0
12 # CHECK: ba target # encoding: [0b010010AA,A,A,0bAAAAAA10]
13 # CHECK-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_br24abs
14 # CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR24 target 0x0
17 # CHECK: beq 0, target # encoding: [0x41,0x82,A,0bAAAAAA00]
18 # CHECK-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
19 # CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_REL14 target 0x0
22 # CHECK: beqa 0, target # encoding: [0x41,0x82,A,0bAAAAAA10]
23 # CHECK-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
24 # CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR14 target 0x0
28 # FIXME: .TOC.@tocbase
30 # CHECK: li 3, target@l # encoding: [0x38,0x60,A,A]
31 # CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16
32 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0
35 # CHECK: addis 3, 3, target@ha # encoding: [0x3c,0x63,A,A]
36 # CHECK-NEXT: # fixup A - offset: 2, value: target@ha, kind: fixup_ppc_half16
37 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HA target 0x0
40 # CHECK: lis 3, target@ha # encoding: [0x3c,0x60,A,A]
41 # CHECK-NEXT: # fixup A - offset: 2, value: target@ha, kind: fixup_ppc_half16
42 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HA target 0x0
45 # CHECK: addi 4, 3, target@l # encoding: [0x38,0x83,A,A]
46 # CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16
47 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0
50 # CHECK: li 3, target@ha # encoding: [0x38,0x60,A,A]
51 # CHECK-NEXT: # fixup A - offset: 2, value: target@ha, kind: fixup_ppc_half16
52 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HA target 0x0
55 # CHECK: lis 3, target@l # encoding: [0x3c,0x60,A,A]
56 # CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16
57 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0
60 # CHECK: li 3, target # encoding: [0x38,0x60,A,A]
61 # CHECK-NEXT: # fixup A - offset: 2, value: target, kind: fixup_ppc_half16
62 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16 target 0x0
65 # CHECK: lis 3, target # encoding: [0x3c,0x60,A,A]
66 # CHECK-NEXT: # fixup A - offset: 2, value: target, kind: fixup_ppc_half16
67 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16 target 0x0
70 # CHECK: li 3, target@h # encoding: [0x38,0x60,A,A]
71 # CHECK-NEXT: # fixup A - offset: 2, value: target@h, kind: fixup_ppc_half16
72 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HI target 0x0
75 # CHECK: lis 3, target@h # encoding: [0x3c,0x60,A,A]
76 # CHECK-NEXT: # fixup A - offset: 2, value: target@h, kind: fixup_ppc_half16
77 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HI target 0x0
80 # CHECK: li 3, target@higher # encoding: [0x38,0x60,A,A]
81 # CHECK-NEXT: # fixup A - offset: 2, value: target@higher, kind: fixup_ppc_half16
82 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HIGHER target 0x0
85 # CHECK: lis 3, target@highest # encoding: [0x3c,0x60,A,A]
86 # CHECK-NEXT: # fixup A - offset: 2, value: target@highest, kind: fixup_ppc_half16
87 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HIGHEST target 0x0
90 # CHECK: li 3, target@highera # encoding: [0x38,0x60,A,A]
91 # CHECK-NEXT: # fixup A - offset: 2, value: target@highera, kind: fixup_ppc_half16
92 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HIGHERA target 0x0
95 # CHECK: lis 3, target@highesta # encoding: [0x3c,0x60,A,A]
96 # CHECK-NEXT: # fixup A - offset: 2, value: target@highesta, kind: fixup_ppc_half16
97 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HIGHESTA target 0x0
98 lis 3, target@highesta
100 # CHECK: lwz 1, target@l(3) # encoding: [0x80,0x23,A,A]
101 # CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16
102 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0
105 # CHECK: ld 1, target@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
106 # CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16ds
107 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO_DS target 0x0
110 # CHECK: ld 1, target(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
111 # CHECK-NEXT: # fixup A - offset: 2, value: target, kind: fixup_ppc_half16ds
112 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_DS target 0x0
116 # CHECK: li 3, target-base # encoding: [0x38,0x60,A,A]
117 # CHECK-NEXT: # fixup A - offset: 2, value: target-base, kind: fixup_ppc_half16
118 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_REL16 target 0x2
121 # CHECK: li 3, target-base@h # encoding: [0x38,0x60,A,A]
122 # CHECK-NEXT: # fixup A - offset: 2, value: target-base@h, kind: fixup_ppc_half16
123 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_REL16_HI target 0x6
126 # CHECK: li 3, target-base@l # encoding: [0x38,0x60,A,A]
127 # CHECK-NEXT: # fixup A - offset: 2, value: target-base@l, kind: fixup_ppc_half16
128 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_REL16_LO target 0xA
131 # CHECK: li 3, target-base@ha # encoding: [0x38,0x60,A,A]
132 # CHECK-NEXT: # fixup A - offset: 2, value: target-base@ha, kind: fixup_ppc_half16
133 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_REL16_HA target 0xE
136 # CHECK: ori 3, 3, target@l # encoding: [0x60,0x63,A,A]
137 # CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16
138 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0
141 # CHECK: oris 3, 3, target@h # encoding: [0x64,0x63,A,A]
142 # CHECK-NEXT: # fixup A - offset: 2, value: target@h, kind: fixup_ppc_half16
143 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HI target 0x0
146 # CHECK: ld 1, target@toc(2) # encoding: [0xe8,0x22,A,0bAAAAAA00]
147 # CHECK-NEXT: # fixup A - offset: 2, value: target@toc, kind: fixup_ppc_half16ds
148 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_DS target 0x0
151 # CHECK: addis 3, 2, target@toc@ha # encoding: [0x3c,0x62,A,A]
152 # CHECK-NEXT: # fixup A - offset: 2, value: target@toc@ha, kind: fixup_ppc_half16
153 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_HA target 0x0
154 addis 3, 2, target@toc@ha
156 # CHECK: addi 4, 3, target@toc@l # encoding: [0x38,0x83,A,A]
157 # CHECK-NEXT: # fixup A - offset: 2, value: target@toc@l, kind: fixup_ppc_half16
158 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_LO target 0x0
159 addi 4, 3, target@toc@l
161 # CHECK: addis 3, 2, target@toc@h # encoding: [0x3c,0x62,A,A]
162 # CHECK-NEXT: # fixup A - offset: 2, value: target@toc@h, kind: fixup_ppc_half16
163 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_HI target 0x0
164 addis 3, 2, target@toc@h
166 # CHECK: lwz 1, target@toc@l(3) # encoding: [0x80,0x23,A,A]
167 # CHECK-NEXT: # fixup A - offset: 2, value: target@toc@l, kind: fixup_ppc_half16
168 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_LO target 0x0
169 lwz 1, target@toc@l(3)
171 # CHECK: ld 1, target@toc@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
172 # CHECK-NEXT: # fixup A - offset: 2, value: target@toc@l, kind: fixup_ppc_half16ds
173 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_LO_DS target 0x0
174 ld 1, target@toc@l(3)
176 # CHECK: addi 4, 3, target@GOT # encoding: [0x38,0x83,A,A]
177 # CHECK-NEXT: # fixup A - offset: 2, value: target@GOT, kind: fixup_ppc_half16
178 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16 target 0x0
179 addi 4, 3, target@got
181 # CHECK: ld 1, target@GOT(2) # encoding: [0xe8,0x22,A,0bAAAAAA00]
182 # CHECK-NEXT: # fixup A - offset: 2, value: target@GOT, kind: fixup_ppc_half16ds
183 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_DS target 0x0
186 # CHECK: addis 3, 2, target@got@ha # encoding: [0x3c,0x62,A,A]
187 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@ha, kind: fixup_ppc_half16
188 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_HA target 0x0
189 addis 3, 2, target@got@ha
191 # CHECK: addi 4, 3, target@got@l # encoding: [0x38,0x83,A,A]
192 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@l, kind: fixup_ppc_half16
193 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_LO target 0x0
194 addi 4, 3, target@got@l
196 # CHECK: addis 3, 2, target@got@h # encoding: [0x3c,0x62,A,A]
197 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@h, kind: fixup_ppc_half16
198 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_HI target 0x0
199 addis 3, 2, target@got@h
201 # CHECK: lwz 1, target@got@l(3) # encoding: [0x80,0x23,A,A]
202 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@l, kind: fixup_ppc_half16
203 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_LO target 0x0
204 lwz 1, target@got@l(3)
206 # CHECK: ld 1, target@got@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
207 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@l, kind: fixup_ppc_half16ds
208 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_LO_DS target 0x0
209 ld 1, target@got@l(3)
214 # CHECK: addis 3, 2, target@tprel@ha # encoding: [0x3c,0x62,A,A]
215 # CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@ha, kind: fixup_ppc_half16
216 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HA target 0x0
217 addis 3, 2, target@tprel@ha
219 # CHECK: addi 3, 3, target@tprel@l # encoding: [0x38,0x63,A,A]
220 # CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@l, kind: fixup_ppc_half16
221 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_LO target 0x0
222 addi 3, 3, target@tprel@l
224 # CHECK: addi 3, 3, target@tprel # encoding: [0x38,0x63,A,A]
225 # CHECK-NEXT: # fixup A - offset: 2, value: target@tprel, kind: fixup_ppc_half16
226 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16 target 0x0
227 addi 3, 3, target@tprel
229 # CHECK: addi 3, 3, target@tprel@h # encoding: [0x38,0x63,A,A]
230 # CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@h, kind: fixup_ppc_half16
231 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HI target 0x0
232 addi 3, 3, target@tprel@h
234 # CHECK: addi 3, 3, target@tprel@higher # encoding: [0x38,0x63,A,A]
235 # CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@higher, kind: fixup_ppc_half16
236 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HIGHER target 0x0
237 addi 3, 3, target@tprel@higher
239 # CHECK: addis 3, 2, target@tprel@highest # encoding: [0x3c,0x62,A,A]
240 # CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@highest, kind: fixup_ppc_half16
241 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HIGHEST target 0x0
242 addis 3, 2, target@tprel@highest
244 # CHECK: addi 3, 3, target@tprel@highera # encoding: [0x38,0x63,A,A]
245 # CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@highera, kind: fixup_ppc_half16
246 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HIGHERA target 0x0
247 addi 3, 3, target@tprel@highera
249 # CHECK: addis 3, 2, target@tprel@highesta # encoding: [0x3c,0x62,A,A]
250 # CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@highesta, kind: fixup_ppc_half16
251 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HIGHESTA target 0x0
252 addis 3, 2, target@tprel@highesta
254 # CHECK: ld 1, target@tprel@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
255 # CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@l, kind: fixup_ppc_half16ds
256 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_LO_DS target 0x0
257 ld 1, target@tprel@l(3)
259 # CHECK: ld 1, target@tprel(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
260 # CHECK-NEXT: # fixup A - offset: 2, value: target@tprel, kind: fixup_ppc_half16ds
261 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_DS target 0x0
262 ld 1, target@tprel(3)
264 # CHECK: addis 3, 2, target@dtprel@ha # encoding: [0x3c,0x62,A,A]
265 # CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@ha, kind: fixup_ppc_half16
266 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HA target 0x0
267 addis 3, 2, target@dtprel@ha
269 # CHECK: addi 3, 3, target@dtprel@l # encoding: [0x38,0x63,A,A]
270 # CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@l, kind: fixup_ppc_half16
271 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_LO target 0x0
272 addi 3, 3, target@dtprel@l
274 # CHECK: addi 3, 3, target@dtprel # encoding: [0x38,0x63,A,A]
275 # CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel, kind: fixup_ppc_half16
276 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16 target 0x0
277 addi 3, 3, target@dtprel
279 # CHECK: addi 3, 3, target@dtprel@h # encoding: [0x38,0x63,A,A]
280 # CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@h, kind: fixup_ppc_half16
281 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HI target 0x0
282 addi 3, 3, target@dtprel@h
284 # CHECK: addi 3, 3, target@dtprel@higher # encoding: [0x38,0x63,A,A]
285 # CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@higher, kind: fixup_ppc_half16
286 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HIGHER target 0x0
287 addi 3, 3, target@dtprel@higher
289 # CHECK: addis 3, 2, target@dtprel@highest # encoding: [0x3c,0x62,A,A]
290 # CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@highest, kind: fixup_ppc_half16
291 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HIGHEST target 0x0
292 addis 3, 2, target@dtprel@highest
294 # CHECK: addi 3, 3, target@dtprel@highera # encoding: [0x38,0x63,A,A]
295 # CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@highera, kind: fixup_ppc_half16
296 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HIGHERA target 0x0
297 addi 3, 3, target@dtprel@highera
299 # CHECK: addis 3, 2, target@dtprel@highesta # encoding: [0x3c,0x62,A,A]
300 # CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@highesta, kind: fixup_ppc_half16
301 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HIGHESTA target 0x0
302 addis 3, 2, target@dtprel@highesta
304 # CHECK: ld 1, target@dtprel@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
305 # CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@l, kind: fixup_ppc_half16ds
306 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_LO_DS target 0x0
307 ld 1, target@dtprel@l(3)
309 # CHECK: ld 1, target@dtprel(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
310 # CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel, kind: fixup_ppc_half16ds
311 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_DS target 0x0
312 ld 1, target@dtprel(3)
315 # CHECK: addis 3, 2, target@got@tprel@ha # encoding: [0x3c,0x62,A,A]
316 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@tprel@ha, kind: fixup_ppc_half16
317 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_HA target 0x0
318 addis 3, 2, target@got@tprel@ha
320 # CHECK: ld 1, target@got@tprel@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
321 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@tprel@l, kind: fixup_ppc_half16ds
322 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_LO_DS target 0x0
323 ld 1, target@got@tprel@l(3)
325 # CHECK: addis 3, 2, target@got@tprel@h # encoding: [0x3c,0x62,A,A]
326 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@tprel@h, kind: fixup_ppc_half16
327 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_HI target 0x0
328 addis 3, 2, target@got@tprel@h
330 # CHECK: ld 1, target@got@tprel(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
331 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@tprel, kind: fixup_ppc_half16ds
332 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_DS target 0x0
333 ld 1, target@got@tprel(3)
335 # CHECK: addis 3, 2, target@got@dtprel@ha # encoding: [0x3c,0x62,A,A]
336 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@dtprel@ha, kind: fixup_ppc_half16
337 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_HA target 0x0
338 addis 3, 2, target@got@dtprel@ha
340 # CHECK: ld 1, target@got@dtprel@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
341 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@dtprel@l, kind: fixup_ppc_half16ds
342 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_LO_DS target 0x0
343 ld 1, target@got@dtprel@l(3)
345 # CHECK: addis 3, 2, target@got@dtprel@h # encoding: [0x3c,0x62,A,A]
346 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@dtprel@h, kind: fixup_ppc_half16
347 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_HI target 0x0
348 addis 3, 2, target@got@dtprel@h
350 # CHECK: ld 1, target@got@dtprel(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
351 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@dtprel, kind: fixup_ppc_half16ds
352 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_DS target 0x0
353 ld 1, target@got@dtprel(3)
355 # CHECK: addis 3, 2, target@got@tlsgd@ha # encoding: [0x3c,0x62,A,A]
356 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsgd@ha, kind: fixup_ppc_half16
357 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSGD16_HA target 0x0
358 addis 3, 2, target@got@tlsgd@ha
360 # CHECK: addi 3, 3, target@got@tlsgd@l # encoding: [0x38,0x63,A,A]
361 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsgd@l, kind: fixup_ppc_half16
362 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSGD16_LO target 0x0
363 addi 3, 3, target@got@tlsgd@l
365 # CHECK: addi 3, 3, target@got@tlsgd@h # encoding: [0x38,0x63,A,A]
366 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsgd@h, kind: fixup_ppc_half16
367 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSGD16_HI target 0x0
368 addi 3, 3, target@got@tlsgd@h
370 # CHECK: addi 3, 3, target@got@tlsgd # encoding: [0x38,0x63,A,A]
371 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsgd, kind: fixup_ppc_half16
372 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSGD16 target 0x0
373 addi 3, 3, target@got@tlsgd
376 # CHECK: addis 3, 2, target@got@tlsld@ha # encoding: [0x3c,0x62,A,A]
377 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsld@ha, kind: fixup_ppc_half16
378 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16_HA target 0x0
379 addis 3, 2, target@got@tlsld@ha
381 # CHECK: addi 3, 3, target@got@tlsld@l # encoding: [0x38,0x63,A,A]
382 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsld@l, kind: fixup_ppc_half16
383 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16_LO target 0x0
384 addi 3, 3, target@got@tlsld@l
386 # CHECK: addi 3, 3, target@got@tlsld@h # encoding: [0x38,0x63,A,A]
387 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsld@h, kind: fixup_ppc_half16
388 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16_HI target 0x0
389 addi 3, 3, target@got@tlsld@h
391 # CHECK: addi 3, 3, target@got@tlsld # encoding: [0x38,0x63,A,A]
392 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsld, kind: fixup_ppc_half16
393 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16 target 0x0
394 addi 3, 3, target@got@tlsld