2 # RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck %s
4 # RUN: llvm-mc -triple powerpc64-unknown-unknown -filetype=obj %s | \
5 # RUN: llvm-readobj -r | FileCheck %s -check-prefix=REL
7 # CHECK: b target # encoding: [0b010010AA,A,A,0bAAAAAA00]
8 # CHECK-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_br24
9 # CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_REL24 target 0x0
12 # CHECK: ba target # encoding: [0b010010AA,A,A,0bAAAAAA10]
13 # CHECK-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_br24abs
14 # CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR24 target 0x0
17 # CHECK: beq 0, target # encoding: [0x41,0x82,A,0bAAAAAA00]
18 # CHECK-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14
19 # CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_REL14 target 0x0
22 # CHECK: beqa 0, target # encoding: [0x41,0x82,A,0bAAAAAA10]
23 # CHECK-NEXT: # fixup A - offset: 0, value: target, kind: fixup_ppc_brcond14abs
24 # CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_ADDR14 target 0x0
28 # CHECK: li 3, target@l # encoding: [0x38,0x60,A,A]
29 # CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16
30 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0
33 # CHECK: addis 3, 3, target@ha # encoding: [0x3c,0x63,A,A]
34 # CHECK-NEXT: # fixup A - offset: 2, value: target@ha, kind: fixup_ppc_half16
35 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HA target 0x0
38 # CHECK: lis 3, target@ha # encoding: [0x3c,0x60,A,A]
39 # CHECK-NEXT: # fixup A - offset: 2, value: target@ha, kind: fixup_ppc_half16
40 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HA target 0x0
43 # CHECK: addi 4, 3, target@l # encoding: [0x38,0x83,A,A]
44 # CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16
45 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0
48 # CHECK: li 3, target@ha # encoding: [0x38,0x60,A,A]
49 # CHECK-NEXT: # fixup A - offset: 2, value: target@ha, kind: fixup_ppc_half16
50 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HA target 0x0
53 # CHECK: lis 3, target@l # encoding: [0x3c,0x60,A,A]
54 # CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16
55 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0
58 # CHECK: li 3, target # encoding: [0x38,0x60,A,A]
59 # CHECK-NEXT: # fixup A - offset: 2, value: target, kind: fixup_ppc_half16
60 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16 target 0x0
63 # CHECK: lis 3, target # encoding: [0x3c,0x60,A,A]
64 # CHECK-NEXT: # fixup A - offset: 2, value: target, kind: fixup_ppc_half16
65 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16 target 0x0
68 # CHECK: li 3, target@h # encoding: [0x38,0x60,A,A]
69 # CHECK-NEXT: # fixup A - offset: 2, value: target@h, kind: fixup_ppc_half16
70 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HI target 0x0
73 # CHECK: lis 3, target@h # encoding: [0x3c,0x60,A,A]
74 # CHECK-NEXT: # fixup A - offset: 2, value: target@h, kind: fixup_ppc_half16
75 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HI target 0x0
78 # CHECK: li 3, target@higher # encoding: [0x38,0x60,A,A]
79 # CHECK-NEXT: # fixup A - offset: 2, value: target@higher, kind: fixup_ppc_half16
80 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HIGHER target 0x0
83 # CHECK: lis 3, target@highest # encoding: [0x3c,0x60,A,A]
84 # CHECK-NEXT: # fixup A - offset: 2, value: target@highest, kind: fixup_ppc_half16
85 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HIGHEST target 0x0
88 # CHECK: li 3, target@highera # encoding: [0x38,0x60,A,A]
89 # CHECK-NEXT: # fixup A - offset: 2, value: target@highera, kind: fixup_ppc_half16
90 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HIGHERA target 0x0
93 # CHECK: lis 3, target@highesta # encoding: [0x3c,0x60,A,A]
94 # CHECK-NEXT: # fixup A - offset: 2, value: target@highesta, kind: fixup_ppc_half16
95 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HIGHESTA target 0x0
96 lis 3, target@highesta
98 # CHECK: lwz 1, target@l(3) # encoding: [0x80,0x23,A,A]
99 # CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16
100 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0
103 # CHECK: ld 1, target@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
104 # CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16ds
105 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO_DS target 0x0
108 # CHECK: ld 1, target(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
109 # CHECK-NEXT: # fixup A - offset: 2, value: target, kind: fixup_ppc_half16ds
110 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_DS target 0x0
114 # CHECK: li 3, target-base # encoding: [0x38,0x60,A,A]
115 # CHECK-NEXT: # fixup A - offset: 2, value: target-base, kind: fixup_ppc_half16
116 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_REL16 target 0x2
119 # CHECK: li 3, target-base@h # encoding: [0x38,0x60,A,A]
120 # CHECK-NEXT: # fixup A - offset: 2, value: target-base@h, kind: fixup_ppc_half16
121 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_REL16_HI target 0x6
124 # CHECK: li 3, target-base@l # encoding: [0x38,0x60,A,A]
125 # CHECK-NEXT: # fixup A - offset: 2, value: target-base@l, kind: fixup_ppc_half16
126 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_REL16_LO target 0xA
129 # CHECK: li 3, target-base@ha # encoding: [0x38,0x60,A,A]
130 # CHECK-NEXT: # fixup A - offset: 2, value: target-base@ha, kind: fixup_ppc_half16
131 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_REL16_HA target 0xE
134 # CHECK: ori 3, 3, target@l # encoding: [0x60,0x63,A,A]
135 # CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16
136 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0
139 # CHECK: oris 3, 3, target@h # encoding: [0x64,0x63,A,A]
140 # CHECK-NEXT: # fixup A - offset: 2, value: target@h, kind: fixup_ppc_half16
141 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HI target 0x0
144 # CHECK: ld 1, target@toc(2) # encoding: [0xe8,0x22,A,0bAAAAAA00]
145 # CHECK-NEXT: # fixup A - offset: 2, value: target@toc, kind: fixup_ppc_half16ds
146 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_DS target 0x0
149 # CHECK: addis 3, 2, target@toc@ha # encoding: [0x3c,0x62,A,A]
150 # CHECK-NEXT: # fixup A - offset: 2, value: target@toc@ha, kind: fixup_ppc_half16
151 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_HA target 0x0
152 addis 3, 2, target@toc@ha
154 # CHECK: addi 4, 3, target@toc@l # encoding: [0x38,0x83,A,A]
155 # CHECK-NEXT: # fixup A - offset: 2, value: target@toc@l, kind: fixup_ppc_half16
156 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_LO target 0x0
157 addi 4, 3, target@toc@l
159 # CHECK: addis 3, 2, target@toc@h # encoding: [0x3c,0x62,A,A]
160 # CHECK-NEXT: # fixup A - offset: 2, value: target@toc@h, kind: fixup_ppc_half16
161 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_HI target 0x0
162 addis 3, 2, target@toc@h
164 # CHECK: lwz 1, target@toc@l(3) # encoding: [0x80,0x23,A,A]
165 # CHECK-NEXT: # fixup A - offset: 2, value: target@toc@l, kind: fixup_ppc_half16
166 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_LO target 0x0
167 lwz 1, target@toc@l(3)
169 # CHECK: ld 1, target@toc@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
170 # CHECK-NEXT: # fixup A - offset: 2, value: target@toc@l, kind: fixup_ppc_half16ds
171 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TOC16_LO_DS target 0x0
172 ld 1, target@toc@l(3)
174 # CHECK: addi 4, 3, target@GOT # encoding: [0x38,0x83,A,A]
175 # CHECK-NEXT: # fixup A - offset: 2, value: target@GOT, kind: fixup_ppc_half16
176 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16 target 0x0
177 addi 4, 3, target@got
179 # CHECK: ld 1, target@GOT(2) # encoding: [0xe8,0x22,A,0bAAAAAA00]
180 # CHECK-NEXT: # fixup A - offset: 2, value: target@GOT, kind: fixup_ppc_half16ds
181 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_DS target 0x0
184 # CHECK: addis 3, 2, target@got@ha # encoding: [0x3c,0x62,A,A]
185 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@ha, kind: fixup_ppc_half16
186 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_HA target 0x0
187 addis 3, 2, target@got@ha
189 # CHECK: addi 4, 3, target@got@l # encoding: [0x38,0x83,A,A]
190 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@l, kind: fixup_ppc_half16
191 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_LO target 0x0
192 addi 4, 3, target@got@l
194 # CHECK: addis 3, 2, target@got@h # encoding: [0x3c,0x62,A,A]
195 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@h, kind: fixup_ppc_half16
196 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_HI target 0x0
197 addis 3, 2, target@got@h
199 # CHECK: lwz 1, target@got@l(3) # encoding: [0x80,0x23,A,A]
200 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@l, kind: fixup_ppc_half16
201 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_LO target 0x0
202 lwz 1, target@got@l(3)
204 # CHECK: ld 1, target@got@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
205 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@l, kind: fixup_ppc_half16ds
206 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT16_LO_DS target 0x0
207 ld 1, target@got@l(3)
212 # CHECK: addis 3, 2, target@tprel@ha # encoding: [0x3c,0x62,A,A]
213 # CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@ha, kind: fixup_ppc_half16
214 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HA target 0x0
215 addis 3, 2, target@tprel@ha
217 # CHECK: addi 3, 3, target@tprel@l # encoding: [0x38,0x63,A,A]
218 # CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@l, kind: fixup_ppc_half16
219 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_LO target 0x0
220 addi 3, 3, target@tprel@l
222 # CHECK: addi 3, 3, target@tprel # encoding: [0x38,0x63,A,A]
223 # CHECK-NEXT: # fixup A - offset: 2, value: target@tprel, kind: fixup_ppc_half16
224 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16 target 0x0
225 addi 3, 3, target@tprel
227 # CHECK: addi 3, 3, target@tprel@h # encoding: [0x38,0x63,A,A]
228 # CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@h, kind: fixup_ppc_half16
229 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HI target 0x0
230 addi 3, 3, target@tprel@h
232 # CHECK: addi 3, 3, target@tprel@higher # encoding: [0x38,0x63,A,A]
233 # CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@higher, kind: fixup_ppc_half16
234 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HIGHER target 0x0
235 addi 3, 3, target@tprel@higher
237 # CHECK: addis 3, 2, target@tprel@highest # encoding: [0x3c,0x62,A,A]
238 # CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@highest, kind: fixup_ppc_half16
239 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HIGHEST target 0x0
240 addis 3, 2, target@tprel@highest
242 # CHECK: addi 3, 3, target@tprel@highera # encoding: [0x38,0x63,A,A]
243 # CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@highera, kind: fixup_ppc_half16
244 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HIGHERA target 0x0
245 addi 3, 3, target@tprel@highera
247 # CHECK: addis 3, 2, target@tprel@highesta # encoding: [0x3c,0x62,A,A]
248 # CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@highesta, kind: fixup_ppc_half16
249 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_HIGHESTA target 0x0
250 addis 3, 2, target@tprel@highesta
252 # CHECK: ld 1, target@tprel@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
253 # CHECK-NEXT: # fixup A - offset: 2, value: target@tprel@l, kind: fixup_ppc_half16ds
254 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_LO_DS target 0x0
255 ld 1, target@tprel@l(3)
257 # CHECK: ld 1, target@tprel(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
258 # CHECK-NEXT: # fixup A - offset: 2, value: target@tprel, kind: fixup_ppc_half16ds
259 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_TPREL16_DS target 0x0
260 ld 1, target@tprel(3)
262 # CHECK: addis 3, 2, target@dtprel@ha # encoding: [0x3c,0x62,A,A]
263 # CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@ha, kind: fixup_ppc_half16
264 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HA target 0x0
265 addis 3, 2, target@dtprel@ha
267 # CHECK: addi 3, 3, target@dtprel@l # encoding: [0x38,0x63,A,A]
268 # CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@l, kind: fixup_ppc_half16
269 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_LO target 0x0
270 addi 3, 3, target@dtprel@l
272 # CHECK: addi 3, 3, target@dtprel # encoding: [0x38,0x63,A,A]
273 # CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel, kind: fixup_ppc_half16
274 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16 target 0x0
275 addi 3, 3, target@dtprel
277 # CHECK: addi 3, 3, target@dtprel@h # encoding: [0x38,0x63,A,A]
278 # CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@h, kind: fixup_ppc_half16
279 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HI target 0x0
280 addi 3, 3, target@dtprel@h
282 # CHECK: addi 3, 3, target@dtprel@higher # encoding: [0x38,0x63,A,A]
283 # CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@higher, kind: fixup_ppc_half16
284 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HIGHER target 0x0
285 addi 3, 3, target@dtprel@higher
287 # CHECK: addis 3, 2, target@dtprel@highest # encoding: [0x3c,0x62,A,A]
288 # CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@highest, kind: fixup_ppc_half16
289 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HIGHEST target 0x0
290 addis 3, 2, target@dtprel@highest
292 # CHECK: addi 3, 3, target@dtprel@highera # encoding: [0x38,0x63,A,A]
293 # CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@highera, kind: fixup_ppc_half16
294 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HIGHERA target 0x0
295 addi 3, 3, target@dtprel@highera
297 # CHECK: addis 3, 2, target@dtprel@highesta # encoding: [0x3c,0x62,A,A]
298 # CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@highesta, kind: fixup_ppc_half16
299 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_HIGHESTA target 0x0
300 addis 3, 2, target@dtprel@highesta
302 # CHECK: ld 1, target@dtprel@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
303 # CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel@l, kind: fixup_ppc_half16ds
304 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_LO_DS target 0x0
305 ld 1, target@dtprel@l(3)
307 # CHECK: ld 1, target@dtprel(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
308 # CHECK-NEXT: # fixup A - offset: 2, value: target@dtprel, kind: fixup_ppc_half16ds
309 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_DTPREL16_DS target 0x0
310 ld 1, target@dtprel(3)
313 # CHECK: addis 3, 2, target@got@tprel@ha # encoding: [0x3c,0x62,A,A]
314 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@tprel@ha, kind: fixup_ppc_half16
315 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_HA target 0x0
316 addis 3, 2, target@got@tprel@ha
318 # CHECK: ld 1, target@got@tprel@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
319 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@tprel@l, kind: fixup_ppc_half16ds
320 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_LO_DS target 0x0
321 ld 1, target@got@tprel@l(3)
323 # CHECK: addis 3, 2, target@got@tprel@h # encoding: [0x3c,0x62,A,A]
324 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@tprel@h, kind: fixup_ppc_half16
325 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_HI target 0x0
326 addis 3, 2, target@got@tprel@h
328 # CHECK: ld 1, target@got@tprel(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
329 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@tprel, kind: fixup_ppc_half16ds
330 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TPREL16_DS target 0x0
331 ld 1, target@got@tprel(3)
333 # CHECK: addis 3, 2, target@got@dtprel@ha # encoding: [0x3c,0x62,A,A]
334 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@dtprel@ha, kind: fixup_ppc_half16
335 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_HA target 0x0
336 addis 3, 2, target@got@dtprel@ha
338 # CHECK: ld 1, target@got@dtprel@l(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
339 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@dtprel@l, kind: fixup_ppc_half16ds
340 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_LO_DS target 0x0
341 ld 1, target@got@dtprel@l(3)
343 # CHECK: addis 3, 2, target@got@dtprel@h # encoding: [0x3c,0x62,A,A]
344 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@dtprel@h, kind: fixup_ppc_half16
345 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_HI target 0x0
346 addis 3, 2, target@got@dtprel@h
348 # CHECK: ld 1, target@got@dtprel(3) # encoding: [0xe8,0x23,A,0bAAAAAA00]
349 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@dtprel, kind: fixup_ppc_half16ds
350 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_DTPREL16_DS target 0x0
351 ld 1, target@got@dtprel(3)
353 # CHECK: addis 3, 2, target@got@tlsgd@ha # encoding: [0x3c,0x62,A,A]
354 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsgd@ha, kind: fixup_ppc_half16
355 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSGD16_HA target 0x0
356 addis 3, 2, target@got@tlsgd@ha
358 # CHECK: addi 3, 3, target@got@tlsgd@l # encoding: [0x38,0x63,A,A]
359 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsgd@l, kind: fixup_ppc_half16
360 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSGD16_LO target 0x0
361 addi 3, 3, target@got@tlsgd@l
363 # CHECK: addi 3, 3, target@got@tlsgd@h # encoding: [0x38,0x63,A,A]
364 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsgd@h, kind: fixup_ppc_half16
365 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSGD16_HI target 0x0
366 addi 3, 3, target@got@tlsgd@h
368 # CHECK: addi 3, 3, target@got@tlsgd # encoding: [0x38,0x63,A,A]
369 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsgd, kind: fixup_ppc_half16
370 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSGD16 target 0x0
371 addi 3, 3, target@got@tlsgd
374 # CHECK: addis 3, 2, target@got@tlsld@ha # encoding: [0x3c,0x62,A,A]
375 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsld@ha, kind: fixup_ppc_half16
376 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16_HA target 0x0
377 addis 3, 2, target@got@tlsld@ha
379 # CHECK: addi 3, 3, target@got@tlsld@l # encoding: [0x38,0x63,A,A]
380 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsld@l, kind: fixup_ppc_half16
381 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16_LO target 0x0
382 addi 3, 3, target@got@tlsld@l
384 # CHECK: addi 3, 3, target@got@tlsld@h # encoding: [0x38,0x63,A,A]
385 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsld@h, kind: fixup_ppc_half16
386 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16_HI target 0x0
387 addi 3, 3, target@got@tlsld@h
389 # CHECK: addi 3, 3, target@got@tlsld # encoding: [0x38,0x63,A,A]
390 # CHECK-NEXT: # fixup A - offset: 2, value: target@got@tlsld, kind: fixup_ppc_half16
391 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16 target 0x0
392 addi 3, 3, target@got@tlsld
396 # llvm-mc does not show any "encoding" string for data, so we just check the relocs
398 # CHECK-REL: .rela.data
401 # CHECK-REL: 0x{{[0-9A-F]*[08]}} R_PPC64_TOC - 0x0
404 # CHECK-REL: 0x{{[0-9A-F]*[08]}} R_PPC64_DTPMOD64 target 0x0
407 # CHECK-REL: 0x{{[0-9A-F]*[08]}} R_PPC64_TPREL64 target 0x0
410 # CHECK-REL: 0x{{[0-9A-F]*[08]}} R_PPC64_DTPREL64 target 0x0