1 // RUN: llvm-tblgen %s | FileCheck %s
4 class ValueType<int size, int value> {
9 def v2i64 : ValueType<128, 22>; // 2 x i64 vector value
10 def v2f64 : ValueType<128, 28>; // 2 x f64 vector value
12 class Intrinsic<string name> {
16 class Pattern<dag patternToMatch, list<dag> resultInstrs> {
17 dag PatternToMatch = patternToMatch;
18 list<dag> ResultInstrs = resultInstrs;
21 // Pat - A simple (but common) form of a pattern, which produces a simple result
22 // not needing a full list.
23 class Pat<dag pattern, dag result> : Pattern<pattern, [result]>;
25 class Inst<bits<8> opcode, dag oopnds, dag iopnds, string asmstr,
27 bits<8> Opcode = opcode;
28 dag OutOperands = oopnds;
29 dag InOperands = iopnds;
30 string AssemblyString = asmstr;
31 list<dag> Pattern = pattern;
41 class Register<string n> {
45 class RegisterClass<list<ValueType> regTypes, list<Register> regList> {
46 list<ValueType> RegTypes = regTypes;
47 list<Register> MemberList = regList;
50 def XMM0: Register<"xmm0">;
51 def XMM1: Register<"xmm1">;
52 def XMM2: Register<"xmm2">;
53 def XMM3: Register<"xmm3">;
54 def XMM4: Register<"xmm4">;
55 def XMM5: Register<"xmm5">;
56 def XMM6: Register<"xmm6">;
57 def XMM7: Register<"xmm7">;
58 def XMM8: Register<"xmm8">;
59 def XMM9: Register<"xmm9">;
60 def XMM10: Register<"xmm10">;
61 def XMM11: Register<"xmm11">;
62 def XMM12: Register<"xmm12">;
63 def XMM13: Register<"xmm13">;
64 def XMM14: Register<"xmm14">;
65 def XMM15: Register<"xmm15">;
67 def VR128 : RegisterClass<[v2i64, v2f64],
68 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
69 XMM8, XMM9, XMM10, XMM11,
70 XMM12, XMM13, XMM14, XMM15]>;
73 def REGCLASS : RegisterClass<[], []>;
85 def int_x86_sse2_add_ps : Intrinsic<"addps">;
86 def int_x86_sse2_add_pd : Intrinsic<"addpd">;
87 def INTRINSIC : Intrinsic<"Dummy">;
90 class MakePat<list<dag> patterns> : Pat<patterns[0], patterns[1]>;
92 class Base<bits<8> opcode, dag opnds, dag iopnds, string asmstr, Intrinsic intr,
93 list<list<dag>> patterns>
94 : Inst<opcode, opnds, iopnds, asmstr,
95 !foreach(Decls.pattern, patterns[0],
96 !foreach(Decls.operand, Decls.pattern,
97 !subst(INTRINSIC, intr,
98 !subst(REGCLASS, VR128,
99 !subst(MNEMONIC, set, Decls.operand)))))>,
100 MakePat<!foreach(Decls.pattern, patterns[1],
101 !foreach(Decls.operand, Decls.pattern,
102 !subst(INTRINSIC, intr,
103 !subst(REGCLASS, VR128,
104 !subst(MNEMONIC, set, Decls.operand)))))>;
106 multiclass arith<bits<8> opcode, string asmstr, string intr, list<list<dag>> patterns> {
107 def PS : Base<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
108 !strconcat(asmstr, "\t$dst, $src1, $src2"), !cast<Intrinsic>(!subst("SUFFIX", "_ps", intr)), patterns>;
110 def PD : Base<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
111 !strconcat(asmstr, "\t$dst, $src1, $src2"), !cast<Intrinsic>(!subst("SUFFIX", "_pd", intr)), patterns>;
114 defm ADD : arith<0x58, "add", "int_x86_sse2_addSUFFIX",
116 [[(set REGCLASS:$dst, (INTRINSIC REGCLASS:$src1, REGCLASS:$src2))],
117 [(set REGCLASS:$dst, (bitconvert (INTRINSIC REGCLASS:$src1, REGCLASS:$src2))),
118 (MNEMONIC REGCLASS:$dst, REGCLASS:$src)]]>;
120 // CHECK: [(set VR128:$dst, (int_x86_sse2_add_pd VR128:$src1, VR128:$src2))]
121 // CHECK: [(set VR128:$dst, (int_x86_sse2_add_ps VR128:$src1, VR128:$src2))]