1 ; RUN: opt %s -instcombine -S | FileCheck %s
3 %overflow.result = type {i8, i1}
5 declare %overflow.result @llvm.uadd.with.overflow.i8(i8, i8)
6 declare %overflow.result @llvm.umul.with.overflow.i8(i8, i8)
7 declare double @llvm.powi.f64(double, i32) nounwind readonly
8 declare i32 @llvm.cttz.i32(i32) nounwind readnone
9 declare i32 @llvm.ctlz.i32(i32) nounwind readnone
10 declare i32 @llvm.ctpop.i32(i32) nounwind readnone
11 declare i8 @llvm.ctlz.i8(i8) nounwind readnone
13 define i8 @test1(i8 %A, i8 %B) {
14 %x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %A, i8 %B)
15 %y = extractvalue %overflow.result %x, 0
18 ; CHECK-NEXT: %y = add i8 %A, %B
19 ; CHECK-NEXT: ret i8 %y
22 define i8 @test2(i8 %A, i8 %B, i1* %overflowPtr) {
23 %and.A = and i8 %A, 127
24 %and.B = and i8 %B, 127
25 %x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %and.A, i8 %and.B)
26 %y = extractvalue %overflow.result %x, 0
27 %z = extractvalue %overflow.result %x, 1
28 store i1 %z, i1* %overflowPtr
31 ; CHECK-NEXT: %and.A = and i8 %A, 127
32 ; CHECK-NEXT: %and.B = and i8 %B, 127
33 ; CHECK-NEXT: %1 = add nuw i8 %and.A, %and.B
34 ; CHECK-NEXT: store i1 false, i1* %overflowPtr
35 ; CHECK-NEXT: ret i8 %1
38 define i8 @test3(i8 %A, i8 %B, i1* %overflowPtr) {
39 %or.A = or i8 %A, -128
40 %or.B = or i8 %B, -128
41 %x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 %or.A, i8 %or.B)
42 %y = extractvalue %overflow.result %x, 0
43 %z = extractvalue %overflow.result %x, 1
44 store i1 %z, i1* %overflowPtr
47 ; CHECK-NEXT: %or.A = or i8 %A, -128
48 ; CHECK-NEXT: %or.B = or i8 %B, -128
49 ; CHECK-NEXT: %1 = add i8 %or.A, %or.B
50 ; CHECK-NEXT: store i1 true, i1* %overflowPtr
51 ; CHECK-NEXT: ret i8 %1
54 define i8 @test4(i8 %A, i1* %overflowPtr) {
55 %x = call %overflow.result @llvm.uadd.with.overflow.i8(i8 undef, i8 %A)
56 %y = extractvalue %overflow.result %x, 0
57 %z = extractvalue %overflow.result %x, 1
58 store i1 %z, i1* %overflowPtr
61 ; CHECK-NEXT: ret i8 undef
64 define i8 @test5(i8 %A, i1* %overflowPtr) {
65 %x = call %overflow.result @llvm.umul.with.overflow.i8(i8 0, i8 %A)
66 %y = extractvalue %overflow.result %x, 0
67 %z = extractvalue %overflow.result %x, 1
68 store i1 %z, i1* %overflowPtr
71 ; CHECK-NEXT: store i1 false, i1* %overflowPtr
72 ; CHECK-NEXT: ret i8 0
75 define i8 @test6(i8 %A, i1* %overflowPtr) {
76 %x = call %overflow.result @llvm.umul.with.overflow.i8(i8 1, i8 %A)
77 %y = extractvalue %overflow.result %x, 0
78 %z = extractvalue %overflow.result %x, 1
79 store i1 %z, i1* %overflowPtr
82 ; CHECK-NEXT: store i1 false, i1* %overflowPtr
83 ; CHECK-NEXT: ret i8 %A
86 define void @powi(double %V, double *%P) {
88 %A = tail call double @llvm.powi.f64(double %V, i32 -1) nounwind
89 volatile store double %A, double* %P
91 %B = tail call double @llvm.powi.f64(double %V, i32 0) nounwind
92 volatile store double %B, double* %P
94 %C = tail call double @llvm.powi.f64(double %V, i32 1) nounwind
95 volatile store double %C, double* %P
98 ; CHECK: %A = fdiv double 1.0{{.*}}, %V
99 ; CHECK: volatile store double %A,
100 ; CHECK: volatile store double 1.0
101 ; CHECK: volatile store double %V
104 define i32 @cttz(i32 %a) {
107 %and = and i32 %or, -8
108 %count = tail call i32 @llvm.cttz.i32(i32 %and) nounwind readnone
112 ; CHECK-NEXT: ret i32 3
115 define i8 @ctlz(i8 %a) {
118 %and = and i8 %or, 63
119 %count = tail call i8 @llvm.ctlz.i8(i8 %and) nounwind readnone
123 ; CHECK-NEXT: ret i8 2
126 define void @cmp.simplify(i32 %a, i32 %b, i1* %c) {
128 %lz = tail call i32 @llvm.ctlz.i32(i32 %a) nounwind readnone
129 %lz.cmp = icmp eq i32 %lz, 32
130 volatile store i1 %lz.cmp, i1* %c
131 %tz = tail call i32 @llvm.cttz.i32(i32 %a) nounwind readnone
132 %tz.cmp = icmp ne i32 %tz, 32
133 volatile store i1 %tz.cmp, i1* %c
134 %pop = tail call i32 @llvm.ctpop.i32(i32 %b) nounwind readnone
135 %pop.cmp = icmp eq i32 %pop, 0
136 volatile store i1 %pop.cmp, i1* %c
138 ; CHECK: @cmp.simplify
140 ; CHECK-NEXT: %lz.cmp = icmp eq i32 %a, 0
141 ; CHECK-NEXT: volatile store i1 %lz.cmp, i1* %c
142 ; CHECK-NEXT: %tz.cmp = icmp ne i32 %a, 0
143 ; CHECK-NEXT: volatile store i1 %tz.cmp, i1* %c
144 ; CHECK-NEXT: %pop.cmp = icmp eq i32 %b, 0
145 ; CHECK-NEXT: volatile store i1 %pop.cmp, i1* %c
149 define i32 @cttz_simplify1(i32 %x) nounwind readnone ssp {
150 %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %x) ; <i32> [#uses=1]
151 %shr3 = lshr i32 %tmp1, 5 ; <i32> [#uses=1]
154 ; CHECK: @cttz_simplify1
155 ; CHECK: icmp eq i32 %x, 0
156 ; CHECK-NEXT: zext i1
157 ; CHECK-NEXT: ret i32
160 declare i32 @llvm.ctlz.i32(i32) nounwind readnone