1 ; This test makes sure that mul instructions are properly eliminated.
2 ; RUN: opt < %s -instcombine -S | FileCheck %s
4 define i32 @test1(i32 %A) {
6 %B = mul i32 %A, 1 ; <i32> [#uses=1]
11 define i32 @test2(i32 %A) {
13 ; Should convert to an add instruction
14 %B = mul i32 %A, 2 ; <i32> [#uses=1]
16 ; CHECK: shl i32 %A, 1
19 define i32 @test3(i32 %A) {
21 ; This should disappear entirely
22 %B = mul i32 %A, 0 ; <i32> [#uses=1]
27 define double @test4(double %A) {
30 %B = fmul double 1.000000e+00, %A ; <double> [#uses=1]
32 ; CHECK: ret double %A
35 define i32 @test5(i32 %A) {
37 %B = mul i32 %A, 8 ; <i32> [#uses=1]
39 ; CHECK: shl i32 %A, 3
42 define i8 @test6(i8 %A) {
44 %B = mul i8 %A, 8 ; <i8> [#uses=1]
45 %C = mul i8 %B, 8 ; <i8> [#uses=1]
50 define i32 @test7(i32 %i) {
52 %tmp = mul i32 %i, -1 ; <i32> [#uses=1]
54 ; CHECK: sub i32 0, %i
57 define i64 @test8(i64 %i) {
59 %j = mul i64 %i, -1 ; <i64> [#uses=1]
61 ; CHECK: sub i64 0, %i
64 define i32 @test9(i32 %i) {
66 %j = mul i32 %i, -1 ; <i32> [#uses=1]
68 ; CHECK: sub i32 0, %i
71 define i32 @test10(i32 %a, i32 %b) {
73 %c = icmp slt i32 %a, 0 ; <i1> [#uses=1]
74 %d = zext i1 %c to i32 ; <i32> [#uses=1]
76 %e = mul i32 %d, %b ; <i32> [#uses=1]
78 ; CHECK: [[TEST10:%.*]] = ashr i32 %a, 31
79 ; CHECK-NEXT: %e = and i32 [[TEST10]], %b
80 ; CHECK-NEXT: ret i32 %e
83 define i32 @test11(i32 %a, i32 %b) {
85 %c = icmp sle i32 %a, -1 ; <i1> [#uses=1]
86 %d = zext i1 %c to i32 ; <i32> [#uses=1]
88 %e = mul i32 %d, %b ; <i32> [#uses=1]
90 ; CHECK: [[TEST11:%.*]] = ashr i32 %a, 31
91 ; CHECK-NEXT: %e = and i32 [[TEST11]], %b
92 ; CHECK-NEXT: ret i32 %e
95 define i32 @test12(i32 %a, i32 %b) {
97 %c = icmp ugt i32 %a, 2147483647 ; <i1> [#uses=1]
98 %d = zext i1 %c to i32 ; <i32> [#uses=1]
99 %e = mul i32 %d, %b ; <i32> [#uses=1]
101 ; CHECK: [[TEST12:%.*]] = ashr i32 %a, 31
102 ; CHECK-NEXT: %e = and i32 [[TEST12]], %b
103 ; CHECK-NEXT: ret i32 %e
108 define internal void @test13(<4 x float>*) {
110 load <4 x float>* %0, align 1
111 fmul <4 x float> %2, < float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 >
112 store <4 x float> %3, <4 x float>* %0, align 1
114 ; CHECK-NEXT: ret void
117 define <16 x i8> @test14(<16 x i8> %a) {
119 %b = mul <16 x i8> %a, zeroinitializer
121 ; CHECK-NEXT: ret <16 x i8> zeroinitializer
125 define i32 @test15(i32 %A, i32 %B) {
129 %m = mul i32 %shl, %A
131 ; CHECK: shl i32 %A, %B
134 ; X * Y (when Y is 0 or 1) --> x & (0-Y)
135 define i32 @test16(i32 %b, i1 %c) {
137 %d = zext i1 %c to i32 ; <i32> [#uses=1]
139 %e = mul i32 %d, %b ; <i32> [#uses=1]
141 ; CHECK: [[TEST16:%.*]] = zext i1 %c to i32
142 ; CHECK-NEXT: %1 = sub i32 0, [[TEST16]]
143 ; CHECK-NEXT: %e = and i32 %1, %b
144 ; CHECK-NEXT: ret i32 %e
147 ; X * Y (when Y is 0 or 1) --> x & (0-Y)
148 define i32 @test17(i32 %a, i32 %b) {
150 %a.lobit = lshr i32 %a, 31
151 %e = mul i32 %a.lobit, %b
153 ; CHECK: [[TEST17:%.*]] = ashr i32 %a, 31
154 ; CHECK-NEXT: %e = and i32 [[TEST17]], %b
155 ; CHECK-NEXT: ret i32 %e
158 define i32 @test18(i32 %A, i32 %B) {
166 ; CHECK-NEXT: ret i32 0
169 declare {i32, i1} @llvm.smul.with.overflow.i32(i32, i32)
170 declare void @use(i1)
172 define i32 @test19(i32 %A, i32 %B) {
177 ; It would be nice if we also started proving that this doesn't overflow.
178 %E = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %C, i32 %D)
179 %F = extractvalue {i32, i1} %E, 0
180 %G = extractvalue {i32, i1} %E, 1
181 call void @use(i1 %G)