1 ; This test makes sure that these instructions are properly eliminated.
3 ; RUN: opt < %s -instcombine -S | FileCheck %s
5 define i32 @test1(i32 %A) {
8 %B = shl i32 %A, 0 ; <i32> [#uses=1]
12 define i32 @test2(i8 %A) {
13 ; CHECK-LABEL: @test2(
15 %shift.upgrd.1 = zext i8 %A to i32 ; <i32> [#uses=1]
16 %B = shl i32 0, %shift.upgrd.1 ; <i32> [#uses=1]
20 define i32 @test3(i32 %A) {
21 ; CHECK-LABEL: @test3(
23 %B = ashr i32 %A, 0 ; <i32> [#uses=1]
27 define i32 @test4(i8 %A) {
28 ; CHECK-LABEL: @test4(
30 %shift.upgrd.2 = zext i8 %A to i32 ; <i32> [#uses=1]
31 %B = ashr i32 0, %shift.upgrd.2 ; <i32> [#uses=1]
36 define i32 @test5(i32 %A) {
37 ; CHECK-LABEL: @test5(
38 ; CHECK: ret i32 undef
39 %B = lshr i32 %A, 32 ;; shift all bits out
43 define <4 x i32> @test5_splat_vector(<4 x i32> %A) {
44 ; CHECK-LABEL: @test5_splat_vector(
45 ; CHECK: ret <4 x i32> undef
46 %B = lshr <4 x i32> %A, <i32 32, i32 32, i32 32, i32 32> ;; shift all bits out
50 define <4 x i32> @test5_zero_vector(<4 x i32> %A) {
51 ; CHECK-LABEL: @test5_zero_vector(
52 ; CHECK-NEXT: ret <4 x i32> %A
53 %B = lshr <4 x i32> %A, zeroinitializer
57 define <4 x i32> @test5_non_splat_vector(<4 x i32> %A) {
58 ; CHECK-LABEL: @test5_non_splat_vector(
59 ; CHECK-NOT: ret <4 x i32> undef
60 %B = shl <4 x i32> %A, <i32 32, i32 1, i32 2, i32 3>
64 define i32 @test5a(i32 %A) {
65 ; CHECK-LABEL: @test5a(
66 ; CHECK: ret i32 undef
67 %B = shl i32 %A, 32 ;; shift all bits out
71 define <4 x i32> @test5a_splat_vector(<4 x i32> %A) {
72 ; CHECK-LABEL: @test5a_splat_vector(
73 ; CHECK: ret <4 x i32> undef
74 %B = shl <4 x i32> %A, <i32 32, i32 32, i32 32, i32 32> ;; shift all bits out
78 define <4 x i32> @test5a_non_splat_vector(<4 x i32> %A) {
79 ; CHECK-LABEL: @test5a_non_splat_vector(
80 ; CHECK-NOT: ret <4 x i32> undef
81 %B = shl <4 x i32> %A, <i32 32, i32 1, i32 2, i32 3>
85 define i32 @test5b() {
86 ; CHECK-LABEL: @test5b(
88 %B = ashr i32 undef, 2 ;; top two bits must be equal, so not undef
92 define i32 @test5b2(i32 %A) {
93 ; CHECK-LABEL: @test5b2(
95 %B = ashr i32 undef, %A ;; top %A bits must be equal, so not undef
99 define i32 @test6(i32 %A) {
100 ; CHECK-LABEL: @test6(
101 ; CHECK-NEXT: mul i32 %A, 6
102 ; CHECK-NEXT: ret i32
103 %B = shl i32 %A, 1 ;; convert to an mul instruction
108 define i32 @test6a(i32 %A) {
109 ; CHECK-LABEL: @test6a(
110 ; CHECK-NEXT: mul i32 %A, 6
111 ; CHECK-NEXT: ret i32
113 %C = shl i32 %B, 1 ;; convert to an mul instruction
117 define i32 @test7(i8 %A) {
118 ; CHECK-LABEL: @test7(
119 ; CHECK-NEXT: ret i32 -1
120 %shift.upgrd.3 = zext i8 %A to i32
121 %B = ashr i32 -1, %shift.upgrd.3 ;; Always equal to -1
125 ;; (A << 5) << 3 === A << 8 == 0
126 define i8 @test8(i8 %A) {
127 ; CHECK-LABEL: @test8(
129 %B = shl i8 %A, 5 ; <i8> [#uses=1]
130 %C = shl i8 %B, 3 ; <i8> [#uses=1]
134 ;; (A << 7) >> 7 === A & 1
135 define i8 @test9(i8 %A) {
136 ; CHECK-LABEL: @test9(
137 ; CHECK-NEXT: and i8 %A, 1
139 %B = shl i8 %A, 7 ; <i8> [#uses=1]
140 %C = lshr i8 %B, 7 ; <i8> [#uses=1]
144 ;; This transformation is deferred to DAGCombine:
145 ;; (A >> 7) << 7 === A & 128
146 ;; The shl may be valuable to scalar evolution.
147 define i8 @test10(i8 %A) {
148 ; CHECK-LABEL: @test10(
149 ; CHECK-NEXT: and i8 %A, -128
151 %B = lshr i8 %A, 7 ; <i8> [#uses=1]
152 %C = shl i8 %B, 7 ; <i8> [#uses=1]
156 ;; Allow the simplification when the lshr shift is exact.
157 define i8 @test10a(i8 %A) {
158 ; CHECK-LABEL: @test10a(
159 ; CHECK-NEXT: ret i8 %A
160 %B = lshr exact i8 %A, 7
165 ;; This transformation is deferred to DAGCombine:
166 ;; (A >> 3) << 4 === (A & 0x1F) << 1
167 ;; The shl may be valuable to scalar evolution.
168 define i8 @test11(i8 %A) {
169 ; CHECK-LABEL: @test11(
172 %a = mul i8 %A, 3 ; <i8> [#uses=1]
173 %B = lshr i8 %a, 3 ; <i8> [#uses=1]
174 %C = shl i8 %B, 4 ; <i8> [#uses=1]
178 ;; Allow the simplification in InstCombine when the lshr shift is exact.
179 define i8 @test11a(i8 %A) {
180 ; CHECK-LABEL: @test11a(
181 ; CHECK-NEXT: mul i8 %A, 6
184 %B = lshr exact i8 %a, 3
189 ;; This is deferred to DAGCombine unless %B is single-use.
190 ;; (A >> 8) << 8 === A & -256
191 define i32 @test12(i32 %A) {
192 ; CHECK-LABEL: @test12(
193 ; CHECK-NEXT: and i32 %A, -256
194 ; CHECK-NEXT: ret i32
195 %B = ashr i32 %A, 8 ; <i32> [#uses=1]
196 %C = shl i32 %B, 8 ; <i32> [#uses=1]
200 ;; This transformation is deferred to DAGCombine:
201 ;; (A >> 3) << 4 === (A & -8) * 2
202 ;; The shl may be valuable to scalar evolution.
203 define i8 @test13(i8 %A) {
204 ; CHECK-LABEL: @test13(
207 %a = mul i8 %A, 3 ; <i8> [#uses=1]
208 %B = ashr i8 %a, 3 ; <i8> [#uses=1]
209 %C = shl i8 %B, 4 ; <i8> [#uses=1]
213 define i8 @test13a(i8 %A) {
214 ; CHECK-LABEL: @test13a(
215 ; CHECK-NEXT: mul i8 %A, 6
218 %B = ashr exact i8 %a, 3
223 ;; D = ((B | 1234) << 4) === ((B << 4)|(1234 << 4)
224 define i32 @test14(i32 %A) {
225 ; CHECK-LABEL: @test14(
226 ; CHECK-NEXT: %B = and i32 %A, -19760
227 ; CHECK-NEXT: or i32 %B, 19744
228 ; CHECK-NEXT: ret i32
229 %B = lshr i32 %A, 4 ; <i32> [#uses=1]
230 %C = or i32 %B, 1234 ; <i32> [#uses=1]
231 %D = shl i32 %C, 4 ; <i32> [#uses=1]
235 ;; D = ((B | 1234) << 4) === ((B << 4)|(1234 << 4)
236 define i32 @test14a(i32 %A) {
237 ; CHECK-LABEL: @test14a(
238 ; CHECK-NEXT: and i32 %A, 77
239 ; CHECK-NEXT: ret i32
240 %B = shl i32 %A, 4 ; <i32> [#uses=1]
241 %C = and i32 %B, 1234 ; <i32> [#uses=1]
242 %D = lshr i32 %C, 4 ; <i32> [#uses=1]
246 define i32 @test15(i1 %C) {
247 ; CHECK-LABEL: @test15(
248 ; CHECK-NEXT: select i1 %C, i32 12, i32 4
249 ; CHECK-NEXT: ret i32
250 %A = select i1 %C, i32 3, i32 1 ; <i32> [#uses=1]
251 %V = shl i32 %A, 2 ; <i32> [#uses=1]
255 define i32 @test15a(i1 %C) {
256 ; CHECK-LABEL: @test15a(
257 ; CHECK-NEXT: select i1 %C, i32 512, i32 128
258 ; CHECK-NEXT: ret i32
259 %A = select i1 %C, i8 3, i8 1 ; <i8> [#uses=1]
260 %shift.upgrd.4 = zext i8 %A to i32 ; <i32> [#uses=1]
261 %V = shl i32 64, %shift.upgrd.4 ; <i32> [#uses=1]
265 define i1 @test16(i32 %X) {
266 ; CHECK-LABEL: @test16(
267 ; CHECK-NEXT: and i32 %X, 16
268 ; CHECK-NEXT: icmp ne i32
270 %tmp.3 = ashr i32 %X, 4
271 %tmp.6 = and i32 %tmp.3, 1
272 %tmp.7 = icmp ne i32 %tmp.6, 0
276 define i1 @test17(i32 %A) {
277 ; CHECK-LABEL: @test17(
278 ; CHECK-NEXT: and i32 %A, -8
279 ; CHECK-NEXT: icmp eq i32
281 %B = lshr i32 %A, 3 ; <i32> [#uses=1]
282 %C = icmp eq i32 %B, 1234 ; <i1> [#uses=1]
287 define i1 @test18(i8 %A) {
288 ; CHECK-LABEL: @test18(
289 ; CHECK: ret i1 false
291 %B = lshr i8 %A, 7 ; <i8> [#uses=1]
293 %C = icmp eq i8 %B, 123 ; <i1> [#uses=1]
297 define i1 @test19(i32 %A) {
298 ; CHECK-LABEL: @test19(
299 ; CHECK-NEXT: icmp ult i32 %A, 4
301 %B = ashr i32 %A, 2 ; <i32> [#uses=1]
303 %C = icmp eq i32 %B, 0 ; <i1> [#uses=1]
308 define i1 @test19a(i32 %A) {
309 ; CHECK-LABEL: @test19a(
310 ; CHECK-NEXT: icmp ugt i32 %A, -5
312 %B = ashr i32 %A, 2 ; <i32> [#uses=1]
314 %C = icmp eq i32 %B, -1 ; <i1> [#uses=1]
318 define i1 @test20(i8 %A) {
319 ; CHECK-LABEL: @test20(
320 ; CHECK: ret i1 false
321 %B = ashr i8 %A, 7 ; <i8> [#uses=1]
323 %C = icmp eq i8 %B, 123 ; <i1> [#uses=1]
327 define i1 @test21(i8 %A) {
328 ; CHECK-LABEL: @test21(
329 ; CHECK-NEXT: and i8 %A, 15
330 ; CHECK-NEXT: icmp eq i8
332 %B = shl i8 %A, 4 ; <i8> [#uses=1]
333 %C = icmp eq i8 %B, -128 ; <i1> [#uses=1]
337 define i1 @test22(i8 %A) {
338 ; CHECK-LABEL: @test22(
339 ; CHECK-NEXT: and i8 %A, 15
340 ; CHECK-NEXT: icmp eq i8
342 %B = shl i8 %A, 4 ; <i8> [#uses=1]
343 %C = icmp eq i8 %B, 0 ; <i1> [#uses=1]
347 define i8 @test23(i32 %A) {
348 ; CHECK-LABEL: @test23(
349 ; CHECK-NEXT: trunc i32 %A to i8
353 %B = shl i32 %A, 24 ; <i32> [#uses=1]
354 %C = ashr i32 %B, 24 ; <i32> [#uses=1]
355 %D = trunc i32 %C to i8 ; <i8> [#uses=1]
359 define i8 @test24(i8 %X) {
360 ; CHECK-LABEL: @test24(
361 ; CHECK-NEXT: and i8 %X, 3
363 %Y = and i8 %X, -5 ; <i8> [#uses=1]
364 %Z = shl i8 %Y, 5 ; <i8> [#uses=1]
365 %Q = ashr i8 %Z, 5 ; <i8> [#uses=1]
369 define i32 @test25(i32 %tmp.2, i32 %AA) {
370 ; CHECK-LABEL: @test25(
371 ; CHECK-NEXT: and i32 %tmp.2, -131072
372 ; CHECK-NEXT: add i32 %{{[^,]*}}, %AA
373 ; CHECK-NEXT: and i32 %{{[^,]*}}, -131072
374 ; CHECK-NEXT: ret i32
375 %x = lshr i32 %AA, 17 ; <i32> [#uses=1]
376 %tmp.3 = lshr i32 %tmp.2, 17 ; <i32> [#uses=1]
377 %tmp.5 = add i32 %tmp.3, %x ; <i32> [#uses=1]
378 %tmp.6 = shl i32 %tmp.5, 17 ; <i32> [#uses=1]
382 define <2 x i32> @test25_vector(<2 x i32> %tmp.2, <2 x i32> %AA) {
383 ; CHECK-LABEL: @test25_vector(
384 ; CHECK: %tmp.3 = lshr <2 x i32> %tmp.2, <i32 17, i32 17>
385 ; CHECK-NEXT: shl <2 x i32> %tmp.3, <i32 17, i32 17>
386 ; CHECK-NEXT: add <2 x i32> %tmp.51, %AA
387 ; CHECK-NEXT: and <2 x i32> %x2, <i32 -131072, i32 -131072>
388 ; CHECK-NEXT: ret <2 x i32>
389 %x = lshr <2 x i32> %AA, <i32 17, i32 17>
390 %tmp.3 = lshr <2 x i32> %tmp.2, <i32 17, i32 17>
391 %tmp.5 = add <2 x i32> %tmp.3, %x
392 %tmp.6 = shl <2 x i32> %tmp.5, <i32 17, i32 17>
396 ;; handle casts between shifts.
397 define i32 @test26(i32 %A) {
398 ; CHECK-LABEL: @test26(
399 ; CHECK-NEXT: and i32 %A, -2
400 ; CHECK-NEXT: ret i32
401 %B = lshr i32 %A, 1 ; <i32> [#uses=1]
402 %C = bitcast i32 %B to i32 ; <i32> [#uses=1]
403 %D = shl i32 %C, 1 ; <i32> [#uses=1]
408 define i1 @test27(i32 %x) nounwind {
409 ; CHECK-LABEL: @test27(
410 ; CHECK-NEXT: and i32 %x, 8
411 ; CHECK-NEXT: icmp ne i32
414 %z = trunc i32 %y to i1
418 define i8 @test28(i8 %x) {
420 ; CHECK-LABEL: @test28(
421 ; CHECK: icmp slt i8 %x, 0
423 %tmp1 = lshr i8 %x, 7
424 %cond1 = icmp ne i8 %tmp1, 0
425 br i1 %cond1, label %bb1, label %bb2
434 define i8 @test28a(i8 %x, i8 %y) {
436 ; This shouldn't be transformed.
437 ; CHECK-LABEL: @test28a(
438 ; CHECK: %tmp1 = lshr i8 %x, 7
439 ; CHECK: %cond1 = icmp eq i8 %tmp1, 0
440 ; CHECK: br i1 %cond1, label %bb2, label %bb1
441 %tmp1 = lshr i8 %x, 7
442 %cond1 = icmp ne i8 %tmp1, 0
443 br i1 %cond1, label %bb1, label %bb2
447 %tmp2 = add i8 %tmp1, %y
452 define i32 @test29(i64 %d18) {
454 %tmp916 = lshr i64 %d18, 32
455 %tmp917 = trunc i64 %tmp916 to i32
456 %tmp10 = lshr i32 %tmp917, 31
458 ; CHECK-LABEL: @test29(
459 ; CHECK: %tmp916 = lshr i64 %d18, 63
460 ; CHECK: %tmp10 = trunc i64 %tmp916 to i32
464 define i32 @test30(i32 %A, i32 %B, i32 %C) {
469 ; CHECK-LABEL: @test30(
470 ; CHECK: %X1 = and i32 %A, %B
471 ; CHECK: %Z = shl i32 %X1, %C
474 define i32 @test31(i32 %A, i32 %B, i32 %C) {
479 ; CHECK-LABEL: @test31(
480 ; CHECK: %X1 = or i32 %A, %B
481 ; CHECK: %Z = lshr i32 %X1, %C
484 define i32 @test32(i32 %A, i32 %B, i32 %C) {
489 ; CHECK-LABEL: @test32(
490 ; CHECK: %X1 = xor i32 %A, %B
491 ; CHECK: %Z = ashr i32 %X1, %C
495 define i1 @test33(i32 %X) {
496 %tmp1 = shl i32 %X, 7
497 %tmp2 = icmp slt i32 %tmp1, 0
499 ; CHECK-LABEL: @test33(
500 ; CHECK: %tmp1.mask = and i32 %X, 16777216
501 ; CHECK: %tmp2 = icmp ne i32 %tmp1.mask, 0
504 define i1 @test34(i32 %X) {
505 %tmp1 = lshr i32 %X, 7
506 %tmp2 = icmp slt i32 %tmp1, 0
508 ; CHECK-LABEL: @test34(
509 ; CHECK: ret i1 false
512 define i1 @test35(i32 %X) {
513 %tmp1 = ashr i32 %X, 7
514 %tmp2 = icmp slt i32 %tmp1, 0
516 ; CHECK-LABEL: @test35(
517 ; CHECK: %tmp2 = icmp slt i32 %X, 0
518 ; CHECK: ret i1 %tmp2
521 define i128 @test36(i128 %A, i128 %B) {
523 %tmp27 = shl i128 %A, 64
524 %tmp23 = shl i128 %B, 64
525 %ins = or i128 %tmp23, %tmp27
526 %tmp45 = lshr i128 %ins, 64
529 ; CHECK-LABEL: @test36(
530 ; CHECK: %tmp231 = or i128 %B, %A
531 ; CHECK: %ins = and i128 %tmp231, 18446744073709551615
532 ; CHECK: ret i128 %ins
535 define i64 @test37(i128 %A, i32 %B) {
537 %tmp27 = shl i128 %A, 64
538 %tmp22 = zext i32 %B to i128
539 %tmp23 = shl i128 %tmp22, 96
540 %ins = or i128 %tmp23, %tmp27
541 %tmp45 = lshr i128 %ins, 64
542 %tmp46 = trunc i128 %tmp45 to i64
545 ; CHECK-LABEL: @test37(
546 ; CHECK: %tmp23 = shl nuw nsw i128 %tmp22, 32
547 ; CHECK: %ins = or i128 %tmp23, %A
548 ; CHECK: %tmp46 = trunc i128 %ins to i64
551 define i32 @test38(i32 %x) nounwind readnone {
552 %rem = srem i32 %x, 32
553 %shl = shl i32 1, %rem
555 ; CHECK-LABEL: @test38(
556 ; CHECK-NEXT: and i32 %x, 31
557 ; CHECK-NEXT: shl i32 1
558 ; CHECK-NEXT: ret i32
561 ; <rdar://problem/8756731>
562 ; CHECK-LABEL: @test39(
563 define i8 @test39(i32 %a0) {
565 %tmp4 = trunc i32 %a0 to i8
566 ; CHECK: and i8 %tmp49, 64
567 %tmp5 = shl i8 %tmp4, 5
568 %tmp48 = and i8 %tmp5, 32
569 %tmp49 = lshr i8 %tmp48, 5
570 %tmp50 = mul i8 %tmp49, 64
571 %tmp51 = xor i8 %tmp50, %tmp5
572 %tmp52 = and i8 %tmp51, -128
573 %tmp53 = lshr i8 %tmp52, 7
574 %tmp54 = mul i8 %tmp53, 16
575 ; CHECK: %0 = shl i8 %tmp4, 2
576 ; CHECK: %tmp54 = and i8 %0, 16
577 %tmp55 = xor i8 %tmp54, %tmp51
578 ; CHECK: ret i8 %tmp551
583 define i32 @test40(i32 %a, i32 %b) nounwind {
584 %shl1 = shl i32 1, %b
585 %shl2 = shl i32 %shl1, 2
586 %div = udiv i32 %a, %shl2
588 ; CHECK-LABEL: @test40(
589 ; CHECK-NEXT: add i32 %b, 2
590 ; CHECK-NEXT: lshr i32 %a
591 ; CHECK-NEXT: ret i32
594 define i32 @test41(i32 %a, i32 %b) nounwind {
598 ; CHECK-LABEL: @test41(
599 ; CHECK-NEXT: shl i32 8, %b
600 ; CHECK-NEXT: ret i32
603 define i32 @test42(i32 %a, i32 %b) nounwind {
604 %div = lshr i32 4096, %b ; must be exact otherwise we'd divide by zero
605 %div2 = udiv i32 %a, %div
607 ; CHECK-LABEL: @test42(
608 ; CHECK-NEXT: lshr exact i32 4096, %b
611 define i32 @test43(i32 %a, i32 %b) nounwind {
612 %div = shl i32 4096, %b ; must be exact otherwise we'd divide by zero
613 %div2 = udiv i32 %a, %div
615 ; CHECK-LABEL: @test43(
616 ; CHECK-NEXT: add i32 %b, 12
621 define i32 @test44(i32 %a) nounwind {
622 %y = shl nuw i32 %a, 1
625 ; CHECK-LABEL: @test44(
626 ; CHECK-NEXT: %y = shl i32 %a, 5
627 ; CHECK-NEXT: ret i32 %y
630 define i32 @test45(i32 %a) nounwind {
631 %y = lshr exact i32 %a, 1
634 ; CHECK-LABEL: @test45(
635 ; CHECK-NEXT: %y = lshr i32 %a, 5
636 ; CHECK-NEXT: ret i32 %y
639 define i32 @test46(i32 %a) {
640 %y = ashr exact i32 %a, 3
643 ; CHECK-LABEL: @test46(
644 ; CHECK-NEXT: %z = ashr exact i32 %a, 2
645 ; CHECK-NEXT: ret i32 %z
648 define i32 @test47(i32 %a) {
649 %y = lshr exact i32 %a, 3
652 ; CHECK-LABEL: @test47(
653 ; CHECK-NEXT: %z = lshr exact i32 %a, 2
654 ; CHECK-NEXT: ret i32 %z
657 define i32 @test48(i32 %x) {
658 %A = lshr exact i32 %x, 1
661 ; CHECK-LABEL: @test48(
662 ; CHECK-NEXT: %B = shl i32 %x, 2
663 ; CHECK-NEXT: ret i32 %B
666 define i32 @test49(i32 %x) {
667 %A = ashr exact i32 %x, 1
670 ; CHECK-LABEL: @test49(
671 ; CHECK-NEXT: %B = shl i32 %x, 2
672 ; CHECK-NEXT: ret i32 %B
675 define i32 @test50(i32 %x) {
676 %A = shl nsw i32 %x, 1
679 ; CHECK-LABEL: @test50(
680 ; CHECK-NEXT: %B = ashr i32 %x, 2
681 ; CHECK-NEXT: ret i32 %B
684 define i32 @test51(i32 %x) {
685 %A = shl nuw i32 %x, 1
688 ; CHECK-LABEL: @test51(
689 ; CHECK-NEXT: %B = lshr i32 %x, 2
690 ; CHECK-NEXT: ret i32 %B
693 define i32 @test52(i32 %x) {
694 %A = shl nsw i32 %x, 3
697 ; CHECK-LABEL: @test52(
698 ; CHECK-NEXT: %B = shl nsw i32 %x, 2
699 ; CHECK-NEXT: ret i32 %B
702 define i32 @test53(i32 %x) {
703 %A = shl nuw i32 %x, 3
706 ; CHECK-LABEL: @test53(
707 ; CHECK-NEXT: %B = shl nuw i32 %x, 2
708 ; CHECK-NEXT: ret i32 %B
711 define i32 @test54(i32 %x) {
712 %shr2 = lshr i32 %x, 1
713 %shl = shl i32 %shr2, 4
714 %and = and i32 %shl, 16
716 ; CHECK-LABEL: @test54(
717 ; CHECK: shl i32 %x, 3
721 define i32 @test55(i32 %x) {
722 %shr2 = lshr i32 %x, 1
723 %shl = shl i32 %shr2, 4
726 ; CHECK-LABEL: @test55(
727 ; CHECK: shl i32 %x, 3
730 define i32 @test56(i32 %x) {
731 %shr2 = lshr i32 %x, 1
732 %shl = shl i32 %shr2, 4
735 ; CHECK-LABEL: @test56(
736 ; CHECK: shl i32 %shr2, 4
740 define i32 @test57(i32 %x) {
741 %shr = lshr i32 %x, 1
742 %shl = shl i32 %shr, 4
743 %and = and i32 %shl, 16
745 ; CHECK-LABEL: @test57(
746 ; CHECK: shl i32 %x, 3
749 define i32 @test58(i32 %x) {
750 %shr = lshr i32 %x, 1
751 %shl = shl i32 %shr, 4
754 ; CHECK-LABEL: @test58(
755 ; CHECK: shl i32 %x, 3
758 define i32 @test59(i32 %x) {
759 %shr = ashr i32 %x, 1
760 %shl = shl i32 %shr, 4
763 ; CHECK-LABEL: @test59(
764 ; CHECK: %shl = shl i32 %shr1, 4
768 define i32 @test60(i32 %x) {
769 %shr = ashr i32 %x, 4
770 %shl = shl i32 %shr, 1
773 ; CHECK-LABEL: @test60(
774 ; CHECK: ashr i32 %x, 3
778 define i32 @test61(i32 %x) {
779 %shr = ashr i32 %x, 4
780 %shl = shl i32 %shr, 1
783 ; CHECK-LABEL: @test61(
784 ; CHECK: ashr i32 %x, 4
787 ; propagate "exact" trait
788 define i32 @test62(i32 %x) {
789 %shr = ashr exact i32 %x, 4
790 %shl = shl i32 %shr, 1
793 ; CHECK-LABEL: @test62(
794 ; CHECK: ashr exact i32 %x, 3
798 ; CHECK-LABEL: @test63(
801 define void @test63(i128 %arg) {
803 br i1 undef, label %bb1, label %bb12
805 bb1: ; preds = %bb11, %bb
808 bb2: ; preds = %bb7, %bb1
809 br i1 undef, label %bb3, label %bb7
812 %tmp = lshr i128 %arg, 36893488147419103232
813 %tmp4 = shl i128 %tmp, 0
814 %tmp5 = or i128 %tmp4, undef
815 %tmp6 = trunc i128 %tmp5 to i16
819 br i1 undef, label %bb8, label %bb2
821 bb8: ; preds = %bb7, %bb3
822 %tmp9 = phi i16 [ %tmp6, %bb3 ], [ undef, %bb7 ]
823 %tmp10 = icmp eq i16 %tmp9, 0
824 br i1 %tmp10, label %bb11, label %bb12
827 br i1 undef, label %bb1, label %bb12
829 bb12: ; preds = %bb11, %bb8, %bb
833 define i32 @test64(i32 %a) {
834 ; CHECK-LABEL: @test64(
835 ; CHECK-NEXT: ret i32 undef
836 %b = ashr i32 %a, 32 ; shift all bits out
840 define <4 x i32> @test64_splat_vector(<4 x i32> %a) {
841 ; CHECK-LABEL: @test64_splat_vector
842 ; CHECK-NEXT: ret <4 x i32> undef
843 %b = ashr <4 x i32> %a, <i32 32, i32 32, i32 32, i32 32> ; shift all bits out
847 define <4 x i32> @test64_non_splat_vector(<4 x i32> %a) {
848 ; CHECK-LABEL: @test64_non_splat_vector
849 ; CHECK-NOT: ret <4 x i32> undef
850 %b = ashr <4 x i32> %a, <i32 32, i32 0, i32 1, i32 2> ; shift all bits out
854 define <2 x i65> @test_65(<2 x i64> %t) {
855 ; CHECK-LABEL: @test_65
856 %a = zext <2 x i64> %t to <2 x i65>
857 %sext = shl <2 x i65> %a, <i65 33, i65 33>
858 %b = ashr <2 x i65> %sext, <i65 33, i65 33>