1 ; RUN: opt < %s -instcombine -S | FileCheck %s
3 define i16 @test1(float %f) {
7 ; CHECK-NOT: insertelement {{.*}} 0.00
8 ; CHECK-NOT: call {{.*}} @llvm.x86.sse.mul
9 ; CHECK-NOT: call {{.*}} @llvm.x86.sse.sub
11 %tmp = insertelement <4 x float> undef, float %f, i32 0 ; <<4 x float>> [#uses=1]
12 %tmp10 = insertelement <4 x float> %tmp, float 0.000000e+00, i32 1 ; <<4 x float>> [#uses=1]
13 %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2 ; <<4 x float>> [#uses=1]
14 %tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, i32 3 ; <<4 x float>> [#uses=1]
15 %tmp28 = tail call <4 x float> @llvm.x86.sse.sub.ss( <4 x float> %tmp12, <4 x float> < float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
16 %tmp37 = tail call <4 x float> @llvm.x86.sse.mul.ss( <4 x float> %tmp28, <4 x float> < float 5.000000e-01, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
17 %tmp48 = tail call <4 x float> @llvm.x86.sse.min.ss( <4 x float> %tmp37, <4 x float> < float 6.553500e+04, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
18 %tmp59 = tail call <4 x float> @llvm.x86.sse.max.ss( <4 x float> %tmp48, <4 x float> zeroinitializer ) ; <<4 x float>> [#uses=1]
19 %tmp.upgrd.1 = tail call i32 @llvm.x86.sse.cvttss2si( <4 x float> %tmp59 ) ; <i32> [#uses=1]
20 %tmp69 = trunc i32 %tmp.upgrd.1 to i16 ; <i16> [#uses=1]
24 define i32 @test2(float %f) {
25 ; CHECK-LABEL: @test2(
26 ; CHECK-NOT: insertelement
27 ; CHECK-NOT: extractelement
29 %tmp5 = fmul float %f, %f
30 %tmp9 = insertelement <4 x float> undef, float %tmp5, i32 0
31 %tmp10 = insertelement <4 x float> %tmp9, float 0.000000e+00, i32 1
32 %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2
33 %tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, i32 3
34 %tmp19 = bitcast <4 x float> %tmp12 to <4 x i32>
35 %tmp21 = extractelement <4 x i32> %tmp19, i32 0
39 define i64 @test3(float %f, double %d) {
40 ; CHECK-LABEL: @test3(
41 ; CHECK-NOT: insertelement {{.*}} 0.00
44 %v00 = insertelement <4 x float> undef, float %f, i32 0
45 %v01 = insertelement <4 x float> %v00, float 0.000000e+00, i32 1
46 %v02 = insertelement <4 x float> %v01, float 0.000000e+00, i32 2
47 %v03 = insertelement <4 x float> %v02, float 0.000000e+00, i32 3
48 %tmp0 = tail call i32 @llvm.x86.sse.cvtss2si(<4 x float> %v03)
49 %v10 = insertelement <4 x float> undef, float %f, i32 0
50 %v11 = insertelement <4 x float> %v10, float 0.000000e+00, i32 1
51 %v12 = insertelement <4 x float> %v11, float 0.000000e+00, i32 2
52 %v13 = insertelement <4 x float> %v12, float 0.000000e+00, i32 3
53 %tmp1 = tail call i64 @llvm.x86.sse.cvtss2si64(<4 x float> %v13)
54 %v20 = insertelement <4 x float> undef, float %f, i32 0
55 %v21 = insertelement <4 x float> %v20, float 0.000000e+00, i32 1
56 %v22 = insertelement <4 x float> %v21, float 0.000000e+00, i32 2
57 %v23 = insertelement <4 x float> %v22, float 0.000000e+00, i32 3
58 %tmp2 = tail call i32 @llvm.x86.sse.cvttss2si(<4 x float> %v23)
59 %v30 = insertelement <4 x float> undef, float %f, i32 0
60 %v31 = insertelement <4 x float> %v30, float 0.000000e+00, i32 1
61 %v32 = insertelement <4 x float> %v31, float 0.000000e+00, i32 2
62 %v33 = insertelement <4 x float> %v32, float 0.000000e+00, i32 3
63 %tmp3 = tail call i64 @llvm.x86.sse.cvttss2si64(<4 x float> %v33)
64 %v40 = insertelement <2 x double> undef, double %d, i32 0
65 %v41 = insertelement <2 x double> %v40, double 0.000000e+00, i32 1
66 %tmp4 = tail call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> %v41)
67 %v50 = insertelement <2 x double> undef, double %d, i32 0
68 %v51 = insertelement <2 x double> %v50, double 0.000000e+00, i32 1
69 %tmp5 = tail call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %v51)
70 %v60 = insertelement <2 x double> undef, double %d, i32 0
71 %v61 = insertelement <2 x double> %v60, double 0.000000e+00, i32 1
72 %tmp6 = tail call i32 @llvm.x86.sse2.cvttsd2si(<2 x double> %v61)
73 %v70 = insertelement <2 x double> undef, double %d, i32 0
74 %v71 = insertelement <2 x double> %v70, double 0.000000e+00, i32 1
75 %tmp7 = tail call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> %v71)
76 %tmp8 = add i32 %tmp0, %tmp2
77 %tmp9 = add i32 %tmp4, %tmp6
78 %tmp10 = add i32 %tmp8, %tmp9
79 %tmp11 = sext i32 %tmp10 to i64
80 %tmp12 = add i64 %tmp1, %tmp3
81 %tmp13 = add i64 %tmp5, %tmp7
82 %tmp14 = add i64 %tmp12, %tmp13
83 %tmp15 = add i64 %tmp11, %tmp14
87 define void @get_image() nounwind {
88 ; CHECK-LABEL: @get_image(
89 ; CHECK-NOT: extractelement
92 %0 = call i32 @fgetc(i8* null) nounwind ; <i32> [#uses=1]
93 %1 = trunc i32 %0 to i8 ; <i8> [#uses=1]
94 %tmp2 = insertelement <100 x i8> zeroinitializer, i8 %1, i32 1 ; <<100 x i8>> [#uses=1]
95 %tmp1 = extractelement <100 x i8> %tmp2, i32 0 ; <i8> [#uses=1]
96 %2 = icmp eq i8 %tmp1, 80 ; <i1> [#uses=1]
97 br i1 %2, label %bb2, label %bb3
102 bb3: ; preds = %bb2, %entry
107 define void @vac(<4 x float>* nocapture %a) nounwind {
112 %tmp1 = load <4 x float>* %a ; <<4 x float>> [#uses=1]
113 %vecins = insertelement <4 x float> %tmp1, float 0.000000e+00, i32 0 ; <<4 x float>> [#uses=1]
114 %vecins4 = insertelement <4 x float> %vecins, float 0.000000e+00, i32 1; <<4 x float>> [#uses=1]
115 %vecins6 = insertelement <4 x float> %vecins4, float 0.000000e+00, i32 2; <<4 x float>> [#uses=1]
116 %vecins8 = insertelement <4 x float> %vecins6, float 0.000000e+00, i32 3; <<4 x float>> [#uses=1]
117 store <4 x float> %vecins8, <4 x float>* %a
121 declare i32 @fgetc(i8*)
123 declare <4 x float> @llvm.x86.sse.sub.ss(<4 x float>, <4 x float>)
125 declare <4 x float> @llvm.x86.sse.mul.ss(<4 x float>, <4 x float>)
127 declare <4 x float> @llvm.x86.sse.min.ss(<4 x float>, <4 x float>)
129 declare <4 x float> @llvm.x86.sse.max.ss(<4 x float>, <4 x float>)
131 declare i32 @llvm.x86.sse.cvtss2si(<4 x float>)
132 declare i64 @llvm.x86.sse.cvtss2si64(<4 x float>)
133 declare i32 @llvm.x86.sse.cvttss2si(<4 x float>)
134 declare i64 @llvm.x86.sse.cvttss2si64(<4 x float>)
135 declare i32 @llvm.x86.sse2.cvtsd2si(<2 x double>)
136 declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>)
137 declare i32 @llvm.x86.sse2.cvttsd2si(<2 x double>)
138 declare i64 @llvm.x86.sse2.cvttsd2si64(<2 x double>)
140 ; <rdar://problem/6945110>
141 define <4 x i32> @kernel3_vertical(<4 x i16> * %src, <8 x i16> * %foo) nounwind {
143 %tmp = load <4 x i16>* %src
144 %tmp1 = load <8 x i16>* %foo
145 ; CHECK: %tmp2 = shufflevector
146 %tmp2 = shufflevector <4 x i16> %tmp, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
147 ; pmovzxwd ignores the upper 64-bits of its input; -instcombine should remove this shuffle:
148 ; CHECK-NOT: shufflevector
149 %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7>
150 ; CHECK-NEXT: pmovzxwd
151 %0 = call <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16> %tmp3)
154 declare <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16>) nounwind readnone
156 define <4 x float> @dead_shuffle_elt(<4 x float> %x, <2 x float> %y) nounwind {
158 ; CHECK: define <4 x float> @dead_shuffle_elt
159 ; CHECK: shufflevector <2 x float> %y, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
160 %shuffle.i = shufflevector <2 x float> %y, <2 x float> %y, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
161 %shuffle9.i = shufflevector <4 x float> %x, <4 x float> %shuffle.i, <4 x i32> <i32 4, i32 5, i32 2, i32 3>
162 ret <4 x float> %shuffle9.i
165 define <2 x float> @test_fptrunc(double %f) {
166 ; CHECK-LABEL: @test_fptrunc(
167 ; CHECK: insertelement
168 ; CHECK: insertelement
169 ; CHECK-NOT: insertelement
170 %tmp9 = insertelement <4 x double> undef, double %f, i32 0
171 %tmp10 = insertelement <4 x double> %tmp9, double 0.000000e+00, i32 1
172 %tmp11 = insertelement <4 x double> %tmp10, double 0.000000e+00, i32 2
173 %tmp12 = insertelement <4 x double> %tmp11, double 0.000000e+00, i32 3
174 %tmp5 = fptrunc <4 x double> %tmp12 to <4 x float>
175 %ret = shufflevector <4 x float> %tmp5, <4 x float> undef, <2 x i32> <i32 0, i32 1>
179 define <2 x double> @test_fpext(float %f) {
180 ; CHECK-LABEL: @test_fpext(
181 ; CHECK: insertelement
182 ; CHECK: insertelement
183 ; CHECK-NOT: insertelement
184 %tmp9 = insertelement <4 x float> undef, float %f, i32 0
185 %tmp10 = insertelement <4 x float> %tmp9, float 0.000000e+00, i32 1
186 %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2
187 %tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, i32 3
188 %tmp5 = fpext <4 x float> %tmp12 to <4 x double>
189 %ret = shufflevector <4 x double> %tmp5, <4 x double> undef, <2 x i32> <i32 0, i32 1>
190 ret <2 x double> %ret
193 define <4 x float> @test_select(float %f, float %g) {
194 ; CHECK-LABEL: @test_select(
195 ; CHECK: %a0 = insertelement <4 x float> undef, float %f, i32 0
196 ; CHECK-NOT: insertelement
197 ; CHECK: %a3 = insertelement <4 x float> %a0, float 3.000000e+00, i32 3
198 ; CHECK-NOT: insertelement
199 ; CHECK: %ret = select <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x float> %a3, <4 x float> <float undef, float 4.000000e+00, float 5.000000e+00, float undef>
200 %a0 = insertelement <4 x float> undef, float %f, i32 0
201 %a1 = insertelement <4 x float> %a0, float 1.000000e+00, i32 1
202 %a2 = insertelement <4 x float> %a1, float 2.000000e+00, i32 2
203 %a3 = insertelement <4 x float> %a2, float 3.000000e+00, i32 3
204 %b0 = insertelement <4 x float> undef, float %g, i32 0
205 %b1 = insertelement <4 x float> %b0, float 4.000000e+00, i32 1
206 %b2 = insertelement <4 x float> %b1, float 5.000000e+00, i32 2
207 %b3 = insertelement <4 x float> %b2, float 6.000000e+00, i32 3
208 %ret = select <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x float> %a3, <4 x float> %b3