1 ; RUN: opt < %s -loop-vectorize -force-vector-width=4 -S -pass-remarks-missed='loop-vectorize' -pass-remarks-analysis='loop-vectorize' 2>&1 | FileCheck %s
3 ; CHECK: remark: source.cpp:4:5: loop not vectorized: loop contains a switch statement
4 ; CHECK: remark: source.cpp:4:5: loop not vectorized: use -Rpass-analysis=loop-vectorize for more info (Force=true, Vector Width=4)
5 ; CHECK: warning: source.cpp:4:5: loop not vectorized: failed explicitly specified loop vectorization
7 ; CHECK: _Z11test_switchPii
11 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
13 ; Function Attrs: nounwind optsize ssp uwtable
14 define void @_Z11test_switchPii(i32* nocapture %A, i32 %Length) #0 {
16 %cmp18 = icmp sgt i32 %Length, 0, !dbg !10
17 br i1 %cmp18, label %for.body.preheader, label %for.end, !dbg !10, !llvm.loop !12
19 for.body.preheader: ; preds = %entry
20 br label %for.body, !dbg !14
22 for.body: ; preds = %for.body.preheader, %for.inc
23 %indvars.iv = phi i64 [ %indvars.iv.next, %for.inc ], [ 0, %for.body.preheader ]
24 %arrayidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv, !dbg !14
25 %0 = load i32* %arrayidx, align 4, !dbg !14, !tbaa !16
26 switch i32 %0, label %for.inc [
31 sw.bb: ; preds = %for.body
32 %1 = trunc i64 %indvars.iv to i32, !dbg !20
33 %mul = shl nsw i32 %1, 1, !dbg !20
34 br label %for.inc, !dbg !22
36 sw.bb3: ; preds = %for.body
37 %2 = trunc i64 %indvars.iv to i32, !dbg !23
38 store i32 %2, i32* %arrayidx, align 4, !dbg !23, !tbaa !16
39 br label %for.inc, !dbg !23
41 for.inc: ; preds = %sw.bb3, %for.body, %sw.bb
42 %storemerge = phi i32 [ %mul, %sw.bb ], [ 0, %for.body ], [ 0, %sw.bb3 ]
43 store i32 %storemerge, i32* %arrayidx, align 4, !dbg !20, !tbaa !16
44 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1, !dbg !10
45 %lftr.wideiv = trunc i64 %indvars.iv.next to i32, !dbg !10
46 %exitcond = icmp eq i32 %lftr.wideiv, %Length, !dbg !10
47 br i1 %exitcond, label %for.end.loopexit, label %for.body, !dbg !10, !llvm.loop !12
49 for.end.loopexit: ; preds = %for.inc
52 for.end: ; preds = %for.end.loopexit, %entry
56 attributes #0 = { nounwind }
59 !llvm.module.flags = !{!7, !8}
62 !0 = !{!"0x11\004\00clang version 3.5.0\001\00\006\00\002", !1, !2, !2, !3, !2, !2} ; [ DW_TAG_compile_unit ] [./source.cpp] [DW_LANG_C_plus_plus]
63 !1 = !{!"source.cpp", !"."}
66 !4 = !{!"0x2e\00test_switch\00test_switch\00\001\000\001\000\006\00256\001\001", !1, !5, !6, null, void (i32*, i32)* @_Z11test_switchPii, null, null, !2} ; [ DW_TAG_subprogram ] [line 1] [def] [test_switch]
67 !5 = !{!"0x29", !1} ; [ DW_TAG_file_type ] [./source.cpp]
68 !6 = !{!"0x15\00\000\000\000\000\000\000", i32 0, null, null, !2, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ]
69 !7 = !{i32 2, !"Dwarf Version", i32 2}
70 !8 = !{i32 2, !"Debug Info Version", i32 2}
71 !9 = !{!"clang version 3.5.0"}
72 !10 = !MDLocation(line: 3, column: 8, scope: !11)
73 !11 = !{!"0xb\003\003\000", !1, !4} ; [ DW_TAG_lexical_block ]
74 !12 = !{!12, !13, !13}
75 !13 = !{!"llvm.loop.vectorize.enable", i1 true}
76 !14 = !MDLocation(line: 4, column: 5, scope: !15)
77 !15 = !{!"0xb\003\0036\000", !1, !11} ; [ DW_TAG_lexical_block ]
78 !16 = !{!17, !17, i64 0}
79 !17 = !{!"int", !18, i64 0}
80 !18 = !{!"omnipotent char", !19, i64 0}
81 !19 = !{!"Simple C/C++ TBAA"}
82 !20 = !MDLocation(line: 6, column: 7, scope: !21)
83 !21 = !{!"0xb\004\0018\000", !1, !15} ; [ DW_TAG_lexical_block ]
84 !22 = !MDLocation(line: 7, column: 5, scope: !21)
85 !23 = !MDLocation(line: 9, column: 7, scope: !21)
86 !24 = !MDLocation(line: 14, column: 1, scope: !4)