1 ; RUN: opt < %s -simplifycfg -S | FileCheck %s
7 define void @test1(i32 %V) {
8 %C1 = icmp eq i32 %V, 4 ; <i1> [#uses=1]
9 %C2 = icmp eq i32 %V, 17 ; <i1> [#uses=1]
10 %CN = or i1 %C1, %C2 ; <i1> [#uses=1]
11 br i1 %CN, label %T, label %F
19 ; CHECK: switch i32 %V, label %F [
20 ; CHECK: i32 17, label %T
21 ; CHECK: i32 4, label %T
25 define void @test2(i32 %V) {
26 %C1 = icmp ne i32 %V, 4 ; <i1> [#uses=1]
27 %C2 = icmp ne i32 %V, 17 ; <i1> [#uses=1]
28 %CN = and i1 %C1, %C2 ; <i1> [#uses=1]
29 br i1 %CN, label %T, label %F
37 ; CHECK: switch i32 %V, label %T [
38 ; CHECK: i32 17, label %F
39 ; CHECK: i32 4, label %F
43 define void @test3(i32 %V) {
44 %C1 = icmp eq i32 %V, 4 ; <i1> [#uses=1]
45 br i1 %C1, label %T, label %N
47 %C2 = icmp eq i32 %V, 17 ; <i1> [#uses=1]
48 br i1 %C2, label %T, label %F
57 ; CHECK: switch i32 %V, label %F [
58 ; CHECK: i32 4, label %T
59 ; CHECK: i32 17, label %T
65 define i32 @test4(i8 zeroext %c) nounwind ssp noredzone {
67 %cmp = icmp eq i8 %c, 62
68 br i1 %cmp, label %lor.end, label %lor.lhs.false
70 lor.lhs.false: ; preds = %entry
71 %cmp4 = icmp eq i8 %c, 34
72 br i1 %cmp4, label %lor.end, label %lor.rhs
74 lor.rhs: ; preds = %lor.lhs.false
75 %cmp8 = icmp eq i8 %c, 92
78 lor.end: ; preds = %lor.rhs, %lor.lhs.false, %entry
79 %0 = phi i1 [ true, %lor.lhs.false ], [ true, %entry ], [ %cmp8, %lor.rhs ]
80 %lor.ext = zext i1 %0 to i32
84 ; CHECK: switch i8 %c, label %lor.rhs [
85 ; CHECK: i8 62, label %lor.end
86 ; CHECK: i8 34, label %lor.end
87 ; CHECK: i8 92, label %lor.end
91 define i32 @test5(i8 zeroext %c) nounwind ssp noredzone {
93 switch i8 %c, label %lor.rhs [
99 lor.rhs: ; preds = %entry
100 %V = icmp eq i8 %c, 92
103 lor.end: ; preds = %entry, %entry, %entry, %lor.rhs
104 %0 = phi i1 [ true, %entry ], [ %V, %lor.rhs ], [ true, %entry ], [ true, %entry ]
105 %lor.ext = zext i1 %0 to i32
108 ; CHECK: switch i8 %c, label %lor.rhs [
109 ; CHECK: i8 62, label %lor.end
110 ; CHECK: i8 34, label %lor.end
111 ; CHECK: i8 92, label %lor.end
116 define i1 @test6({ i32, i32 }* %I) {
118 %tmp.1.i = getelementptr { i32, i32 }* %I, i64 0, i32 1 ; <i32*> [#uses=1]
119 %tmp.2.i = load i32* %tmp.1.i ; <i32> [#uses=6]
120 %tmp.2 = icmp eq i32 %tmp.2.i, 14 ; <i1> [#uses=1]
121 br i1 %tmp.2, label %shortcirc_done.4, label %shortcirc_next.0
122 shortcirc_next.0: ; preds = %entry
123 %tmp.6 = icmp eq i32 %tmp.2.i, 15 ; <i1> [#uses=1]
124 br i1 %tmp.6, label %shortcirc_done.4, label %shortcirc_next.1
125 shortcirc_next.1: ; preds = %shortcirc_next.0
126 %tmp.11 = icmp eq i32 %tmp.2.i, 16 ; <i1> [#uses=1]
127 br i1 %tmp.11, label %shortcirc_done.4, label %shortcirc_next.2
128 shortcirc_next.2: ; preds = %shortcirc_next.1
129 %tmp.16 = icmp eq i32 %tmp.2.i, 17 ; <i1> [#uses=1]
130 br i1 %tmp.16, label %shortcirc_done.4, label %shortcirc_next.3
131 shortcirc_next.3: ; preds = %shortcirc_next.2
132 %tmp.21 = icmp eq i32 %tmp.2.i, 18 ; <i1> [#uses=1]
133 br i1 %tmp.21, label %shortcirc_done.4, label %shortcirc_next.4
134 shortcirc_next.4: ; preds = %shortcirc_next.3
135 %tmp.26 = icmp eq i32 %tmp.2.i, 19 ; <i1> [#uses=1]
136 br label %UnifiedReturnBlock
137 shortcirc_done.4: ; preds = %shortcirc_next.3, %shortcirc_next.2, %shortcirc_next.1, %shortcirc_next.0, %entry
138 br label %UnifiedReturnBlock
139 UnifiedReturnBlock: ; preds = %shortcirc_done.4, %shortcirc_next.4
140 %UnifiedRetVal = phi i1 [ %tmp.26, %shortcirc_next.4 ], [ true, %shortcirc_done.4 ] ; <i1> [#uses=1]
141 ret i1 %UnifiedRetVal
144 ; CHECK: switch i32 %tmp.2.i, label %shortcirc_next.4 [
145 ; CHECK: i32 14, label %UnifiedReturnBlock
146 ; CHECK: i32 15, label %UnifiedReturnBlock
147 ; CHECK: i32 16, label %UnifiedReturnBlock
148 ; CHECK: i32 17, label %UnifiedReturnBlock
149 ; CHECK: i32 18, label %UnifiedReturnBlock
150 ; CHECK: i32 19, label %switch.edge
154 define void @test7(i8 zeroext %c, i32 %x) nounwind ssp noredzone {
156 %cmp = icmp ult i32 %x, 32
157 %cmp4 = icmp eq i8 %c, 97
158 %or.cond = or i1 %cmp, %cmp4
159 %cmp9 = icmp eq i8 %c, 99
160 %or.cond11 = or i1 %or.cond, %cmp9
161 br i1 %or.cond11, label %if.then, label %if.end
163 if.then: ; preds = %entry
164 tail call void @foo1() nounwind noredzone
167 if.end: ; preds = %entry
171 ; CHECK: %cmp = icmp ult i32 %x, 32
172 ; CHECK: br i1 %cmp, label %if.then, label %switch.early.test
173 ; CHECK: switch.early.test:
174 ; CHECK: switch i8 %c, label %if.end [
175 ; CHECK: i8 99, label %if.then
176 ; CHECK: i8 97, label %if.then
180 define i32 @test8(i8 zeroext %c, i32 %x, i1 %C) nounwind ssp noredzone {
182 br i1 %C, label %N, label %if.then
184 %cmp = icmp ult i32 %x, 32
185 %cmp4 = icmp eq i8 %c, 97
186 %or.cond = or i1 %cmp, %cmp4
187 %cmp9 = icmp eq i8 %c, 99
188 %or.cond11 = or i1 %or.cond, %cmp9
189 br i1 %or.cond11, label %if.then, label %if.end
191 if.then: ; preds = %entry
192 %A = phi i32 [0, %entry], [42, %N]
193 tail call void @foo1() nounwind noredzone
196 if.end: ; preds = %entry
200 ; CHECK: switch.early.test:
201 ; CHECK: switch i8 %c, label %if.end [
202 ; CHECK: i8 99, label %if.then
203 ; CHECK: i8 97, label %if.then
205 ; CHECK: %A = phi i32 [ 0, %entry ], [ 42, %switch.early.test ], [ 42, %N ], [ 42, %switch.early.test ]