1 >From d0557763b0713a4c006bd2405eede3924569cafd Mon Sep 17 00:00:00 2001
2 From: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
3 Date: Mon, 5 Jul 2010 11:28:49 +0100
4 Subject: [PATCH 2/2] Fix PR44392
7 gcc/config/arm/arm.md | 43 +++++++++++++++++++------------------------
8 1 files changed, 19 insertions(+), 24 deletions(-)
10 --- a/gcc/config/arm/arm.md
11 +++ b/gcc/config/arm/arm.md
12 @@ -11523,34 +11523,29 @@
13 (define_expand "bswapsi2"
14 [(set (match_operand:SI 0 "s_register_operand" "=r")
15 (bswap:SI (match_operand:SI 1 "s_register_operand" "r")))]
17 +"TARGET_EITHER && (arm_arch6 || !optimize_size)"
23 - rtx op2 = gen_reg_rtx (SImode);
24 - rtx op3 = gen_reg_rtx (SImode);
27 + rtx op2 = gen_reg_rtx (SImode);
28 + rtx op3 = gen_reg_rtx (SImode);
32 - rtx op4 = gen_reg_rtx (SImode);
33 - rtx op5 = gen_reg_rtx (SImode);
36 + rtx op4 = gen_reg_rtx (SImode);
37 + rtx op5 = gen_reg_rtx (SImode);
39 - emit_insn (gen_thumb_legacy_rev (operands[0], operands[1],
40 - op2, op3, op4, op5));
44 - emit_insn (gen_arm_legacy_rev (operands[0], operands[1],
47 + emit_insn (gen_thumb_legacy_rev (operands[0], operands[1],
48 + op2, op3, op4, op5));
52 + emit_insn (gen_arm_legacy_rev (operands[0], operands[1],