6 #include <sys/syscall.h>
7 #include <linux/types.h>
8 #include <linux/perf_event.h>
9 #include <asm/unistd.h>
12 #define mb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
13 #define wmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
14 #define rmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
15 #define cpu_relax() asm volatile("rep; nop" ::: "memory");
16 #define CPUINFO_PROC {"model name"}
17 #ifndef __NR_perf_event_open
18 # define __NR_perf_event_open 336
21 # define __NR_futex 240
24 # define __NR_gettid 224
28 #if defined(__x86_64__)
29 #define mb() asm volatile("mfence" ::: "memory")
30 #define wmb() asm volatile("sfence" ::: "memory")
31 #define rmb() asm volatile("lfence" ::: "memory")
32 #define cpu_relax() asm volatile("rep; nop" ::: "memory");
33 #define CPUINFO_PROC {"model name"}
34 #ifndef __NR_perf_event_open
35 # define __NR_perf_event_open 298
38 # define __NR_futex 202
41 # define __NR_gettid 186
46 #include "../../arch/powerpc/include/uapi/asm/unistd.h"
47 #define mb() asm volatile ("sync" ::: "memory")
48 #define wmb() asm volatile ("sync" ::: "memory")
49 #define rmb() asm volatile ("sync" ::: "memory")
50 #define CPUINFO_PROC {"cpu"}
54 #define mb() asm volatile("bcr 15,0" ::: "memory")
55 #define wmb() asm volatile("bcr 15,0" ::: "memory")
56 #define rmb() asm volatile("bcr 15,0" ::: "memory")
57 #define CPUINFO_PROC {"vendor_id"}
61 #if defined(__SH4A__) || defined(__SH5__)
62 # define mb() asm volatile("synco" ::: "memory")
63 # define wmb() asm volatile("synco" ::: "memory")
64 # define rmb() asm volatile("synco" ::: "memory")
66 # define mb() asm volatile("" ::: "memory")
67 # define wmb() asm volatile("" ::: "memory")
68 # define rmb() asm volatile("" ::: "memory")
70 #define CPUINFO_PROC {"cpu type"}
74 #define mb() asm volatile("" ::: "memory")
75 #define wmb() asm volatile("" ::: "memory")
76 #define rmb() asm volatile("" ::: "memory")
77 #define CPUINFO_PROC {"cpu"}
82 #define mb() asm volatile("ba,pt %%xcc, 1f\n" \
83 "membar #StoreLoad\n" \
86 #define mb() asm volatile("":::"memory")
88 #define wmb() asm volatile("":::"memory")
89 #define rmb() asm volatile("":::"memory")
90 #define CPUINFO_PROC {"cpu"}
94 #define mb() asm volatile("mb" ::: "memory")
95 #define wmb() asm volatile("wmb" ::: "memory")
96 #define rmb() asm volatile("mb" ::: "memory")
97 #define CPUINFO_PROC {"cpu model"}
101 #define mb() asm volatile ("mf" ::: "memory")
102 #define wmb() asm volatile ("mf" ::: "memory")
103 #define rmb() asm volatile ("mf" ::: "memory")
104 #define cpu_relax() asm volatile ("hint @pause" ::: "memory")
105 #define CPUINFO_PROC {"model name"}
110 * Use the __kuser_memory_barrier helper in the CPU helper page. See
111 * arch/arm/kernel/entry-armv.S in the kernel source for details.
113 #define mb() ((void(*)(void))0xffff0fa0)()
114 #define wmb() ((void(*)(void))0xffff0fa0)()
115 #define rmb() ((void(*)(void))0xffff0fa0)()
116 #define CPUINFO_PROC {"model name", "Processor"}
120 #define mb() asm volatile("dmb ish" ::: "memory")
121 #define wmb() asm volatile("dmb ishst" ::: "memory")
122 #define rmb() asm volatile("dmb ishld" ::: "memory")
123 #define cpu_relax() asm volatile("yield" ::: "memory")
127 #define mb() asm volatile( \
136 #define CPUINFO_PROC {"cpu model"}
140 #define mb() asm volatile("" ::: "memory")
141 #define wmb() asm volatile("" ::: "memory")
142 #define rmb() asm volatile("" ::: "memory")
143 #define CPUINFO_PROC {"Processor"}
147 #define mb() asm volatile("" ::: "memory")
148 #define wmb() asm volatile("" ::: "memory")
149 #define rmb() asm volatile("" ::: "memory")
150 #define CPUINFO_PROC {"CPU"}
154 #define mb() asm volatile("memw" ::: "memory")
155 #define wmb() asm volatile("memw" ::: "memory")
156 #define rmb() asm volatile("" ::: "memory")
157 #define CPUINFO_PROC {"core ID"}
161 #define mb() asm volatile ("mf" ::: "memory")
162 #define wmb() asm volatile ("mf" ::: "memory")
163 #define rmb() asm volatile ("mf" ::: "memory")
164 #define cpu_relax() asm volatile ("mfspr zero, PASS" ::: "memory")
165 #define CPUINFO_PROC {"model name"}
168 #define barrier() asm volatile ("" ::: "memory")
171 #define cpu_relax() barrier()
175 sys_perf_event_open(struct perf_event_attr *attr,
176 pid_t pid, int cpu, int group_fd,
181 fd = syscall(__NR_perf_event_open, attr, pid, cpu,
184 #ifdef HAVE_ATTR_TEST
185 if (unlikely(test_attr__enabled))
186 test_attr__open(attr, pid, cpu, fd, group_fd, flags);
191 #endif /* _PERF_SYS_H */