2 * intel_pt.c: Intel Processor Trace support
3 * Copyright (c) 2013-2015, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 #include <linux/kernel.h>
20 #include <linux/types.h>
33 #include "thread-stack.h"
35 #include "callchain.h"
42 #include "intel-pt-decoder/intel-pt-log.h"
43 #include "intel-pt-decoder/intel-pt-decoder.h"
44 #include "intel-pt-decoder/intel-pt-insn-decoder.h"
45 #include "intel-pt-decoder/intel-pt-pkt-decoder.h"
47 #define MAX_TIMESTAMP (~0ULL)
50 struct auxtrace auxtrace;
51 struct auxtrace_queues queues;
52 struct auxtrace_heap heap;
54 struct perf_session *session;
55 struct machine *machine;
56 struct perf_evsel *switch_evsel;
57 struct thread *unknown_thread;
58 bool timeless_decoding;
66 int have_sched_switch;
72 struct perf_tsc_conversion tc;
73 bool cap_user_time_zero;
75 struct itrace_synth_opts synth_opts;
77 bool sample_instructions;
78 u64 instructions_sample_type;
79 u64 instructions_sample_period;
84 u64 branches_sample_type;
87 bool sample_transactions;
88 u64 transactions_sample_type;
91 bool synth_needs_swap;
100 unsigned max_non_turbo_ratio;
104 INTEL_PT_SS_NOT_TRACING,
107 INTEL_PT_SS_EXPECTING_SWITCH_EVENT,
108 INTEL_PT_SS_EXPECTING_SWITCH_IP,
111 struct intel_pt_queue {
113 unsigned int queue_nr;
114 struct auxtrace_buffer *buffer;
116 const struct intel_pt_state *state;
117 struct ip_callchain *chain;
118 union perf_event *event_buf;
121 bool step_through_buffers;
122 bool use_buffer_pid_tid;
127 struct thread *thread;
137 static void intel_pt_dump(struct intel_pt *pt __maybe_unused,
138 unsigned char *buf, size_t len)
140 struct intel_pt_pkt packet;
143 char desc[INTEL_PT_PKT_DESC_MAX];
144 const char *color = PERF_COLOR_BLUE;
146 color_fprintf(stdout, color,
147 ". ... Intel Processor Trace data: size %zu bytes\n",
151 ret = intel_pt_get_packet(buf, len, &packet);
157 color_fprintf(stdout, color, " %08x: ", pos);
158 for (i = 0; i < pkt_len; i++)
159 color_fprintf(stdout, color, " %02x", buf[i]);
161 color_fprintf(stdout, color, " ");
163 ret = intel_pt_pkt_desc(&packet, desc,
164 INTEL_PT_PKT_DESC_MAX);
166 color_fprintf(stdout, color, " %s\n", desc);
168 color_fprintf(stdout, color, " Bad packet!\n");
176 static void intel_pt_dump_event(struct intel_pt *pt, unsigned char *buf,
180 intel_pt_dump(pt, buf, len);
183 static int intel_pt_do_fix_overlap(struct intel_pt *pt, struct auxtrace_buffer *a,
184 struct auxtrace_buffer *b)
188 start = intel_pt_find_overlap(a->data, a->size, b->data, b->size,
192 b->use_size = b->data + b->size - start;
197 static void intel_pt_use_buffer_pid_tid(struct intel_pt_queue *ptq,
198 struct auxtrace_queue *queue,
199 struct auxtrace_buffer *buffer)
201 if (queue->cpu == -1 && buffer->cpu != -1)
202 ptq->cpu = buffer->cpu;
204 ptq->pid = buffer->pid;
205 ptq->tid = buffer->tid;
207 intel_pt_log("queue %u cpu %d pid %d tid %d\n",
208 ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid);
210 thread__zput(ptq->thread);
212 if (ptq->tid != -1) {
214 ptq->thread = machine__findnew_thread(ptq->pt->machine,
218 ptq->thread = machine__find_thread(ptq->pt->machine, -1,
223 /* This function assumes data is processed sequentially only */
224 static int intel_pt_get_trace(struct intel_pt_buffer *b, void *data)
226 struct intel_pt_queue *ptq = data;
227 struct auxtrace_buffer *buffer = ptq->buffer, *old_buffer = buffer;
228 struct auxtrace_queue *queue;
235 queue = &ptq->pt->queues.queue_array[ptq->queue_nr];
237 buffer = auxtrace_buffer__next(queue, buffer);
240 auxtrace_buffer__drop_data(old_buffer);
245 ptq->buffer = buffer;
248 int fd = perf_data_file__fd(ptq->pt->session->file);
250 buffer->data = auxtrace_buffer__get_data(buffer, fd);
255 if (ptq->pt->snapshot_mode && !buffer->consecutive && old_buffer &&
256 intel_pt_do_fix_overlap(ptq->pt, old_buffer, buffer))
260 auxtrace_buffer__drop_data(old_buffer);
262 if (buffer->use_data) {
263 b->len = buffer->use_size;
264 b->buf = buffer->use_data;
266 b->len = buffer->size;
267 b->buf = buffer->data;
269 b->ref_timestamp = buffer->reference;
271 if (!old_buffer || ptq->pt->sampling_mode || (ptq->pt->snapshot_mode &&
272 !buffer->consecutive)) {
273 b->consecutive = false;
274 b->trace_nr = buffer->buffer_nr + 1;
276 b->consecutive = true;
279 if (ptq->use_buffer_pid_tid && (ptq->pid != buffer->pid ||
280 ptq->tid != buffer->tid))
281 intel_pt_use_buffer_pid_tid(ptq, queue, buffer);
283 if (ptq->step_through_buffers)
287 return intel_pt_get_trace(b, data);
292 struct intel_pt_cache_entry {
293 struct auxtrace_cache_entry entry;
296 enum intel_pt_insn_op op;
297 enum intel_pt_insn_branch branch;
302 static int intel_pt_config_div(const char *var, const char *value, void *data)
307 if (!strcmp(var, "intel-pt.cache-divisor")) {
308 val = strtol(value, NULL, 0);
309 if (val > 0 && val <= INT_MAX)
316 static int intel_pt_cache_divisor(void)
323 perf_config(intel_pt_config_div, &d);
331 static unsigned int intel_pt_cache_size(struct dso *dso,
332 struct machine *machine)
336 size = dso__data_size(dso, machine);
337 size /= intel_pt_cache_divisor();
340 if (size > (1 << 21))
342 return 32 - __builtin_clz(size);
345 static struct auxtrace_cache *intel_pt_cache(struct dso *dso,
346 struct machine *machine)
348 struct auxtrace_cache *c;
351 if (dso->auxtrace_cache)
352 return dso->auxtrace_cache;
354 bits = intel_pt_cache_size(dso, machine);
356 /* Ignoring cache creation failure */
357 c = auxtrace_cache__new(bits, sizeof(struct intel_pt_cache_entry), 200);
359 dso->auxtrace_cache = c;
364 static int intel_pt_cache_add(struct dso *dso, struct machine *machine,
365 u64 offset, u64 insn_cnt, u64 byte_cnt,
366 struct intel_pt_insn *intel_pt_insn)
368 struct auxtrace_cache *c = intel_pt_cache(dso, machine);
369 struct intel_pt_cache_entry *e;
375 e = auxtrace_cache__alloc_entry(c);
379 e->insn_cnt = insn_cnt;
380 e->byte_cnt = byte_cnt;
381 e->op = intel_pt_insn->op;
382 e->branch = intel_pt_insn->branch;
383 e->length = intel_pt_insn->length;
384 e->rel = intel_pt_insn->rel;
386 err = auxtrace_cache__add(c, offset, &e->entry);
388 auxtrace_cache__free_entry(c, e);
393 static struct intel_pt_cache_entry *
394 intel_pt_cache_lookup(struct dso *dso, struct machine *machine, u64 offset)
396 struct auxtrace_cache *c = intel_pt_cache(dso, machine);
401 return auxtrace_cache__lookup(dso->auxtrace_cache, offset);
404 static int intel_pt_walk_next_insn(struct intel_pt_insn *intel_pt_insn,
405 uint64_t *insn_cnt_ptr, uint64_t *ip,
406 uint64_t to_ip, uint64_t max_insn_cnt,
409 struct intel_pt_queue *ptq = data;
410 struct machine *machine = ptq->pt->machine;
411 struct thread *thread;
412 struct addr_location al;
413 unsigned char buf[1024];
418 u64 offset, start_offset, start_ip;
422 if (to_ip && *ip == to_ip)
425 bufsz = intel_pt_insn_max_size();
427 if (*ip >= ptq->pt->kernel_start)
428 cpumode = PERF_RECORD_MISC_KERNEL;
430 cpumode = PERF_RECORD_MISC_USER;
432 thread = ptq->thread;
434 if (cpumode != PERF_RECORD_MISC_KERNEL)
436 thread = ptq->pt->unknown_thread;
440 thread__find_addr_map(thread, cpumode, MAP__FUNCTION, *ip, &al);
441 if (!al.map || !al.map->dso)
444 if (al.map->dso->data.status == DSO_DATA_STATUS_ERROR &&
445 dso__data_status_seen(al.map->dso,
446 DSO_DATA_STATUS_SEEN_ITRACE))
449 offset = al.map->map_ip(al.map, *ip);
451 if (!to_ip && one_map) {
452 struct intel_pt_cache_entry *e;
454 e = intel_pt_cache_lookup(al.map->dso, machine, offset);
456 (!max_insn_cnt || e->insn_cnt <= max_insn_cnt)) {
457 *insn_cnt_ptr = e->insn_cnt;
459 intel_pt_insn->op = e->op;
460 intel_pt_insn->branch = e->branch;
461 intel_pt_insn->length = e->length;
462 intel_pt_insn->rel = e->rel;
463 intel_pt_log_insn_no_data(intel_pt_insn, *ip);
468 start_offset = offset;
471 /* Load maps to ensure dso->is_64_bit has been updated */
472 map__load(al.map, machine->symbol_filter);
474 x86_64 = al.map->dso->is_64_bit;
477 len = dso__data_read_offset(al.map->dso, machine,
482 if (intel_pt_get_insn(buf, len, x86_64, intel_pt_insn))
485 intel_pt_log_insn(intel_pt_insn, *ip);
489 if (intel_pt_insn->branch != INTEL_PT_BR_NO_BRANCH)
492 if (max_insn_cnt && insn_cnt >= max_insn_cnt)
495 *ip += intel_pt_insn->length;
497 if (to_ip && *ip == to_ip)
500 if (*ip >= al.map->end)
503 offset += intel_pt_insn->length;
508 *insn_cnt_ptr = insn_cnt;
514 * Didn't lookup in the 'to_ip' case, so do it now to prevent duplicate
518 struct intel_pt_cache_entry *e;
520 e = intel_pt_cache_lookup(al.map->dso, machine, start_offset);
525 /* Ignore cache errors */
526 intel_pt_cache_add(al.map->dso, machine, start_offset, insn_cnt,
527 *ip - start_ip, intel_pt_insn);
532 *insn_cnt_ptr = insn_cnt;
536 static bool intel_pt_get_config(struct intel_pt *pt,
537 struct perf_event_attr *attr, u64 *config)
539 if (attr->type == pt->pmu_type) {
541 *config = attr->config;
548 static bool intel_pt_exclude_kernel(struct intel_pt *pt)
550 struct perf_evsel *evsel;
552 evlist__for_each(pt->session->evlist, evsel) {
553 if (intel_pt_get_config(pt, &evsel->attr, NULL) &&
554 !evsel->attr.exclude_kernel)
560 static bool intel_pt_return_compression(struct intel_pt *pt)
562 struct perf_evsel *evsel;
565 if (!pt->noretcomp_bit)
568 evlist__for_each(pt->session->evlist, evsel) {
569 if (intel_pt_get_config(pt, &evsel->attr, &config) &&
570 (config & pt->noretcomp_bit))
576 static unsigned int intel_pt_mtc_period(struct intel_pt *pt)
578 struct perf_evsel *evsel;
582 if (!pt->mtc_freq_bits)
585 for (shift = 0, config = pt->mtc_freq_bits; !(config & 1); shift++)
588 evlist__for_each(pt->session->evlist, evsel) {
589 if (intel_pt_get_config(pt, &evsel->attr, &config))
590 return (config & pt->mtc_freq_bits) >> shift;
595 static bool intel_pt_timeless_decoding(struct intel_pt *pt)
597 struct perf_evsel *evsel;
598 bool timeless_decoding = true;
601 if (!pt->tsc_bit || !pt->cap_user_time_zero)
604 evlist__for_each(pt->session->evlist, evsel) {
605 if (!(evsel->attr.sample_type & PERF_SAMPLE_TIME))
607 if (intel_pt_get_config(pt, &evsel->attr, &config)) {
608 if (config & pt->tsc_bit)
609 timeless_decoding = false;
614 return timeless_decoding;
617 static bool intel_pt_tracing_kernel(struct intel_pt *pt)
619 struct perf_evsel *evsel;
621 evlist__for_each(pt->session->evlist, evsel) {
622 if (intel_pt_get_config(pt, &evsel->attr, NULL) &&
623 !evsel->attr.exclude_kernel)
629 static bool intel_pt_have_tsc(struct intel_pt *pt)
631 struct perf_evsel *evsel;
632 bool have_tsc = false;
638 evlist__for_each(pt->session->evlist, evsel) {
639 if (intel_pt_get_config(pt, &evsel->attr, &config)) {
640 if (config & pt->tsc_bit)
649 static u64 intel_pt_ns_to_ticks(const struct intel_pt *pt, u64 ns)
653 quot = ns / pt->tc.time_mult;
654 rem = ns % pt->tc.time_mult;
655 return (quot << pt->tc.time_shift) + (rem << pt->tc.time_shift) /
659 static struct intel_pt_queue *intel_pt_alloc_queue(struct intel_pt *pt,
660 unsigned int queue_nr)
662 struct intel_pt_params params = { .get_trace = 0, };
663 struct intel_pt_queue *ptq;
665 ptq = zalloc(sizeof(struct intel_pt_queue));
669 if (pt->synth_opts.callchain) {
670 size_t sz = sizeof(struct ip_callchain);
672 sz += pt->synth_opts.callchain_sz * sizeof(u64);
673 ptq->chain = zalloc(sz);
678 ptq->event_buf = malloc(PERF_SAMPLE_MAX_SIZE);
683 ptq->queue_nr = queue_nr;
684 ptq->exclude_kernel = intel_pt_exclude_kernel(pt);
690 params.get_trace = intel_pt_get_trace;
691 params.walk_insn = intel_pt_walk_next_insn;
693 params.return_compression = intel_pt_return_compression(pt);
694 params.max_non_turbo_ratio = pt->max_non_turbo_ratio;
695 params.mtc_period = intel_pt_mtc_period(pt);
696 params.tsc_ctc_ratio_n = pt->tsc_ctc_ratio_n;
697 params.tsc_ctc_ratio_d = pt->tsc_ctc_ratio_d;
699 if (pt->synth_opts.instructions) {
700 if (pt->synth_opts.period) {
701 switch (pt->synth_opts.period_type) {
702 case PERF_ITRACE_PERIOD_INSTRUCTIONS:
704 INTEL_PT_PERIOD_INSTRUCTIONS;
705 params.period = pt->synth_opts.period;
707 case PERF_ITRACE_PERIOD_TICKS:
708 params.period_type = INTEL_PT_PERIOD_TICKS;
709 params.period = pt->synth_opts.period;
711 case PERF_ITRACE_PERIOD_NANOSECS:
712 params.period_type = INTEL_PT_PERIOD_TICKS;
713 params.period = intel_pt_ns_to_ticks(pt,
714 pt->synth_opts.period);
721 if (!params.period) {
722 params.period_type = INTEL_PT_PERIOD_INSTRUCTIONS;
723 params.period = 1000;
727 ptq->decoder = intel_pt_decoder_new(¶ms);
734 zfree(&ptq->event_buf);
740 static void intel_pt_free_queue(void *priv)
742 struct intel_pt_queue *ptq = priv;
746 thread__zput(ptq->thread);
747 intel_pt_decoder_free(ptq->decoder);
748 zfree(&ptq->event_buf);
753 static void intel_pt_set_pid_tid_cpu(struct intel_pt *pt,
754 struct auxtrace_queue *queue)
756 struct intel_pt_queue *ptq = queue->priv;
758 if (queue->tid == -1 || pt->have_sched_switch) {
759 ptq->tid = machine__get_current_tid(pt->machine, ptq->cpu);
760 thread__zput(ptq->thread);
763 if (!ptq->thread && ptq->tid != -1)
764 ptq->thread = machine__find_thread(pt->machine, -1, ptq->tid);
767 ptq->pid = ptq->thread->pid_;
768 if (queue->cpu == -1)
769 ptq->cpu = ptq->thread->cpu;
773 static void intel_pt_sample_flags(struct intel_pt_queue *ptq)
775 if (ptq->state->flags & INTEL_PT_ABORT_TX) {
776 ptq->flags = PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_TX_ABORT;
777 } else if (ptq->state->flags & INTEL_PT_ASYNC) {
778 if (ptq->state->to_ip)
779 ptq->flags = PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CALL |
781 PERF_IP_FLAG_INTERRUPT;
783 ptq->flags = PERF_IP_FLAG_BRANCH |
784 PERF_IP_FLAG_TRACE_END;
787 if (ptq->state->from_ip)
788 ptq->flags = intel_pt_insn_type(ptq->state->insn_op);
790 ptq->flags = PERF_IP_FLAG_BRANCH |
791 PERF_IP_FLAG_TRACE_BEGIN;
792 if (ptq->state->flags & INTEL_PT_IN_TX)
793 ptq->flags |= PERF_IP_FLAG_IN_TX;
794 ptq->insn_len = ptq->state->insn_len;
798 static int intel_pt_setup_queue(struct intel_pt *pt,
799 struct auxtrace_queue *queue,
800 unsigned int queue_nr)
802 struct intel_pt_queue *ptq = queue->priv;
804 if (list_empty(&queue->head))
808 ptq = intel_pt_alloc_queue(pt, queue_nr);
813 if (queue->cpu != -1)
814 ptq->cpu = queue->cpu;
815 ptq->tid = queue->tid;
817 if (pt->sampling_mode) {
818 if (pt->timeless_decoding)
819 ptq->step_through_buffers = true;
820 if (pt->timeless_decoding || !pt->have_sched_switch)
821 ptq->use_buffer_pid_tid = true;
827 ptq->switch_state != INTEL_PT_SS_EXPECTING_SWITCH_EVENT)) {
828 const struct intel_pt_state *state;
831 if (pt->timeless_decoding)
834 intel_pt_log("queue %u getting timestamp\n", queue_nr);
835 intel_pt_log("queue %u decoding cpu %d pid %d tid %d\n",
836 queue_nr, ptq->cpu, ptq->pid, ptq->tid);
838 state = intel_pt_decode(ptq->decoder);
840 if (state->err == INTEL_PT_ERR_NODATA) {
841 intel_pt_log("queue %u has no timestamp\n",
847 if (state->timestamp)
851 ptq->timestamp = state->timestamp;
852 intel_pt_log("queue %u timestamp 0x%" PRIx64 "\n",
853 queue_nr, ptq->timestamp);
855 ptq->have_sample = true;
856 intel_pt_sample_flags(ptq);
857 ret = auxtrace_heap__add(&pt->heap, queue_nr, ptq->timestamp);
866 static int intel_pt_setup_queues(struct intel_pt *pt)
871 for (i = 0; i < pt->queues.nr_queues; i++) {
872 ret = intel_pt_setup_queue(pt, &pt->queues.queue_array[i], i);
879 static int intel_pt_inject_event(union perf_event *event,
880 struct perf_sample *sample, u64 type,
883 event->header.size = perf_event__sample_event_size(sample, type, 0);
884 return perf_event__synthesize_sample(event, type, 0, sample, swapped);
887 static int intel_pt_synth_branch_sample(struct intel_pt_queue *ptq)
890 struct intel_pt *pt = ptq->pt;
891 union perf_event *event = ptq->event_buf;
892 struct perf_sample sample = { .ip = 0, };
894 event->sample.header.type = PERF_RECORD_SAMPLE;
895 event->sample.header.misc = PERF_RECORD_MISC_USER;
896 event->sample.header.size = sizeof(struct perf_event_header);
898 if (!pt->timeless_decoding)
899 sample.time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
901 sample.ip = ptq->state->from_ip;
902 sample.pid = ptq->pid;
903 sample.tid = ptq->tid;
904 sample.addr = ptq->state->to_ip;
905 sample.id = ptq->pt->branches_id;
906 sample.stream_id = ptq->pt->branches_id;
908 sample.cpu = ptq->cpu;
909 sample.flags = ptq->flags;
910 sample.insn_len = ptq->insn_len;
912 if (pt->branches_filter && !(pt->branches_filter & ptq->flags))
915 if (pt->synth_opts.inject) {
916 ret = intel_pt_inject_event(event, &sample,
917 pt->branches_sample_type,
918 pt->synth_needs_swap);
923 ret = perf_session__deliver_synth_event(pt->session, event, &sample);
925 pr_err("Intel Processor Trace: failed to deliver branch event, error %d\n",
931 static int intel_pt_synth_instruction_sample(struct intel_pt_queue *ptq)
934 struct intel_pt *pt = ptq->pt;
935 union perf_event *event = ptq->event_buf;
936 struct perf_sample sample = { .ip = 0, };
938 event->sample.header.type = PERF_RECORD_SAMPLE;
939 event->sample.header.misc = PERF_RECORD_MISC_USER;
940 event->sample.header.size = sizeof(struct perf_event_header);
942 if (!pt->timeless_decoding)
943 sample.time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
945 sample.ip = ptq->state->from_ip;
946 sample.pid = ptq->pid;
947 sample.tid = ptq->tid;
948 sample.addr = ptq->state->to_ip;
949 sample.id = ptq->pt->instructions_id;
950 sample.stream_id = ptq->pt->instructions_id;
951 sample.period = ptq->state->tot_insn_cnt - ptq->last_insn_cnt;
952 sample.cpu = ptq->cpu;
953 sample.flags = ptq->flags;
954 sample.insn_len = ptq->insn_len;
956 ptq->last_insn_cnt = ptq->state->tot_insn_cnt;
958 if (pt->synth_opts.callchain) {
959 thread_stack__sample(ptq->thread, ptq->chain,
960 pt->synth_opts.callchain_sz, sample.ip);
961 sample.callchain = ptq->chain;
964 if (pt->synth_opts.inject) {
965 ret = intel_pt_inject_event(event, &sample,
966 pt->instructions_sample_type,
967 pt->synth_needs_swap);
972 ret = perf_session__deliver_synth_event(pt->session, event, &sample);
974 pr_err("Intel Processor Trace: failed to deliver instruction event, error %d\n",
980 static int intel_pt_synth_transaction_sample(struct intel_pt_queue *ptq)
983 struct intel_pt *pt = ptq->pt;
984 union perf_event *event = ptq->event_buf;
985 struct perf_sample sample = { .ip = 0, };
987 event->sample.header.type = PERF_RECORD_SAMPLE;
988 event->sample.header.misc = PERF_RECORD_MISC_USER;
989 event->sample.header.size = sizeof(struct perf_event_header);
991 if (!pt->timeless_decoding)
992 sample.time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
994 sample.ip = ptq->state->from_ip;
995 sample.pid = ptq->pid;
996 sample.tid = ptq->tid;
997 sample.addr = ptq->state->to_ip;
998 sample.id = ptq->pt->transactions_id;
999 sample.stream_id = ptq->pt->transactions_id;
1001 sample.cpu = ptq->cpu;
1002 sample.flags = ptq->flags;
1003 sample.insn_len = ptq->insn_len;
1005 if (pt->synth_opts.callchain) {
1006 thread_stack__sample(ptq->thread, ptq->chain,
1007 pt->synth_opts.callchain_sz, sample.ip);
1008 sample.callchain = ptq->chain;
1011 if (pt->synth_opts.inject) {
1012 ret = intel_pt_inject_event(event, &sample,
1013 pt->transactions_sample_type,
1014 pt->synth_needs_swap);
1019 ret = perf_session__deliver_synth_event(pt->session, event, &sample);
1021 pr_err("Intel Processor Trace: failed to deliver transaction event, error %d\n",
1027 static int intel_pt_synth_error(struct intel_pt *pt, int code, int cpu,
1028 pid_t pid, pid_t tid, u64 ip)
1030 union perf_event event;
1031 char msg[MAX_AUXTRACE_ERROR_MSG];
1034 intel_pt__strerror(code, msg, MAX_AUXTRACE_ERROR_MSG);
1036 auxtrace_synth_error(&event.auxtrace_error, PERF_AUXTRACE_ERROR_ITRACE,
1037 code, cpu, pid, tid, ip, msg);
1039 err = perf_session__deliver_synth_event(pt->session, &event, NULL);
1041 pr_err("Intel Processor Trace: failed to deliver error event, error %d\n",
1047 static int intel_pt_next_tid(struct intel_pt *pt, struct intel_pt_queue *ptq)
1049 struct auxtrace_queue *queue;
1050 pid_t tid = ptq->next_tid;
1056 intel_pt_log("switch: cpu %d tid %d\n", ptq->cpu, tid);
1058 err = machine__set_current_tid(pt->machine, ptq->cpu, -1, tid);
1060 queue = &pt->queues.queue_array[ptq->queue_nr];
1061 intel_pt_set_pid_tid_cpu(pt, queue);
1068 static inline bool intel_pt_is_switch_ip(struct intel_pt_queue *ptq, u64 ip)
1070 struct intel_pt *pt = ptq->pt;
1072 return ip == pt->switch_ip &&
1073 (ptq->flags & PERF_IP_FLAG_BRANCH) &&
1074 !(ptq->flags & (PERF_IP_FLAG_CONDITIONAL | PERF_IP_FLAG_ASYNC |
1075 PERF_IP_FLAG_INTERRUPT | PERF_IP_FLAG_TX_ABORT));
1078 static int intel_pt_sample(struct intel_pt_queue *ptq)
1080 const struct intel_pt_state *state = ptq->state;
1081 struct intel_pt *pt = ptq->pt;
1084 if (!ptq->have_sample)
1087 ptq->have_sample = false;
1089 if (pt->sample_instructions &&
1090 (state->type & INTEL_PT_INSTRUCTION)) {
1091 err = intel_pt_synth_instruction_sample(ptq);
1096 if (pt->sample_transactions &&
1097 (state->type & INTEL_PT_TRANSACTION)) {
1098 err = intel_pt_synth_transaction_sample(ptq);
1103 if (!(state->type & INTEL_PT_BRANCH))
1106 if (pt->synth_opts.callchain)
1107 thread_stack__event(ptq->thread, ptq->flags, state->from_ip,
1108 state->to_ip, ptq->insn_len,
1111 thread_stack__set_trace_nr(ptq->thread, state->trace_nr);
1113 if (pt->sample_branches) {
1114 err = intel_pt_synth_branch_sample(ptq);
1119 if (!pt->sync_switch)
1122 if (intel_pt_is_switch_ip(ptq, state->to_ip)) {
1123 switch (ptq->switch_state) {
1124 case INTEL_PT_SS_UNKNOWN:
1125 case INTEL_PT_SS_EXPECTING_SWITCH_IP:
1126 err = intel_pt_next_tid(pt, ptq);
1129 ptq->switch_state = INTEL_PT_SS_TRACING;
1132 ptq->switch_state = INTEL_PT_SS_EXPECTING_SWITCH_EVENT;
1135 } else if (!state->to_ip) {
1136 ptq->switch_state = INTEL_PT_SS_NOT_TRACING;
1137 } else if (ptq->switch_state == INTEL_PT_SS_NOT_TRACING) {
1138 ptq->switch_state = INTEL_PT_SS_UNKNOWN;
1139 } else if (ptq->switch_state == INTEL_PT_SS_UNKNOWN &&
1140 state->to_ip == pt->ptss_ip &&
1141 (ptq->flags & PERF_IP_FLAG_CALL)) {
1142 ptq->switch_state = INTEL_PT_SS_TRACING;
1148 static u64 intel_pt_switch_ip(struct machine *machine, u64 *ptss_ip)
1151 struct symbol *sym, *start;
1152 u64 ip, switch_ip = 0;
1157 map = machine__kernel_map(machine, MAP__FUNCTION);
1161 if (map__load(map, machine->symbol_filter))
1164 start = dso__first_symbol(map->dso, MAP__FUNCTION);
1166 for (sym = start; sym; sym = dso__next_symbol(sym)) {
1167 if (sym->binding == STB_GLOBAL &&
1168 !strcmp(sym->name, "__switch_to")) {
1169 ip = map->unmap_ip(map, sym->start);
1170 if (ip >= map->start && ip < map->end) {
1177 if (!switch_ip || !ptss_ip)
1180 for (sym = start; sym; sym = dso__next_symbol(sym)) {
1181 if (!strcmp(sym->name, "perf_trace_sched_switch")) {
1182 ip = map->unmap_ip(map, sym->start);
1183 if (ip >= map->start && ip < map->end) {
1193 static int intel_pt_run_decoder(struct intel_pt_queue *ptq, u64 *timestamp)
1195 const struct intel_pt_state *state = ptq->state;
1196 struct intel_pt *pt = ptq->pt;
1199 if (!pt->kernel_start) {
1200 pt->kernel_start = machine__kernel_start(pt->machine);
1201 if (pt->per_cpu_mmaps && pt->have_sched_switch &&
1202 !pt->timeless_decoding && intel_pt_tracing_kernel(pt) &&
1203 !pt->sampling_mode) {
1204 pt->switch_ip = intel_pt_switch_ip(pt->machine,
1206 if (pt->switch_ip) {
1207 intel_pt_log("switch_ip: %"PRIx64" ptss_ip: %"PRIx64"\n",
1208 pt->switch_ip, pt->ptss_ip);
1209 pt->sync_switch = true;
1214 intel_pt_log("queue %u decoding cpu %d pid %d tid %d\n",
1215 ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid);
1217 err = intel_pt_sample(ptq);
1221 state = intel_pt_decode(ptq->decoder);
1223 if (state->err == INTEL_PT_ERR_NODATA)
1225 if (pt->sync_switch &&
1226 state->from_ip >= pt->kernel_start) {
1227 pt->sync_switch = false;
1228 intel_pt_next_tid(pt, ptq);
1230 if (pt->synth_opts.errors) {
1231 err = intel_pt_synth_error(pt, state->err,
1242 ptq->have_sample = true;
1243 intel_pt_sample_flags(ptq);
1245 /* Use estimated TSC upon return to user space */
1247 (state->from_ip >= pt->kernel_start || !state->from_ip) &&
1248 state->to_ip && state->to_ip < pt->kernel_start) {
1249 intel_pt_log("TSC %"PRIx64" est. TSC %"PRIx64"\n",
1250 state->timestamp, state->est_timestamp);
1251 ptq->timestamp = state->est_timestamp;
1252 /* Use estimated TSC in unknown switch state */
1253 } else if (pt->sync_switch &&
1254 ptq->switch_state == INTEL_PT_SS_UNKNOWN &&
1255 intel_pt_is_switch_ip(ptq, state->to_ip) &&
1256 ptq->next_tid == -1) {
1257 intel_pt_log("TSC %"PRIx64" est. TSC %"PRIx64"\n",
1258 state->timestamp, state->est_timestamp);
1259 ptq->timestamp = state->est_timestamp;
1260 } else if (state->timestamp > ptq->timestamp) {
1261 ptq->timestamp = state->timestamp;
1264 if (!pt->timeless_decoding && ptq->timestamp >= *timestamp) {
1265 *timestamp = ptq->timestamp;
1272 static inline int intel_pt_update_queues(struct intel_pt *pt)
1274 if (pt->queues.new_data) {
1275 pt->queues.new_data = false;
1276 return intel_pt_setup_queues(pt);
1281 static int intel_pt_process_queues(struct intel_pt *pt, u64 timestamp)
1283 unsigned int queue_nr;
1288 struct auxtrace_queue *queue;
1289 struct intel_pt_queue *ptq;
1291 if (!pt->heap.heap_cnt)
1294 if (pt->heap.heap_array[0].ordinal >= timestamp)
1297 queue_nr = pt->heap.heap_array[0].queue_nr;
1298 queue = &pt->queues.queue_array[queue_nr];
1301 intel_pt_log("queue %u processing 0x%" PRIx64 " to 0x%" PRIx64 "\n",
1302 queue_nr, pt->heap.heap_array[0].ordinal,
1305 auxtrace_heap__pop(&pt->heap);
1307 if (pt->heap.heap_cnt) {
1308 ts = pt->heap.heap_array[0].ordinal + 1;
1315 intel_pt_set_pid_tid_cpu(pt, queue);
1317 ret = intel_pt_run_decoder(ptq, &ts);
1320 auxtrace_heap__add(&pt->heap, queue_nr, ts);
1325 ret = auxtrace_heap__add(&pt->heap, queue_nr, ts);
1329 ptq->on_heap = false;
1336 static int intel_pt_process_timeless_queues(struct intel_pt *pt, pid_t tid,
1339 struct auxtrace_queues *queues = &pt->queues;
1343 for (i = 0; i < queues->nr_queues; i++) {
1344 struct auxtrace_queue *queue = &pt->queues.queue_array[i];
1345 struct intel_pt_queue *ptq = queue->priv;
1347 if (ptq && (tid == -1 || ptq->tid == tid)) {
1349 intel_pt_set_pid_tid_cpu(pt, queue);
1350 intel_pt_run_decoder(ptq, &ts);
1356 static int intel_pt_lost(struct intel_pt *pt, struct perf_sample *sample)
1358 return intel_pt_synth_error(pt, INTEL_PT_ERR_LOST, sample->cpu,
1359 sample->pid, sample->tid, 0);
1362 static struct intel_pt_queue *intel_pt_cpu_to_ptq(struct intel_pt *pt, int cpu)
1366 if (cpu < 0 || !pt->queues.nr_queues)
1369 if ((unsigned)cpu >= pt->queues.nr_queues)
1370 i = pt->queues.nr_queues - 1;
1374 if (pt->queues.queue_array[i].cpu == cpu)
1375 return pt->queues.queue_array[i].priv;
1377 for (j = 0; i > 0; j++) {
1378 if (pt->queues.queue_array[--i].cpu == cpu)
1379 return pt->queues.queue_array[i].priv;
1382 for (; j < pt->queues.nr_queues; j++) {
1383 if (pt->queues.queue_array[j].cpu == cpu)
1384 return pt->queues.queue_array[j].priv;
1390 static int intel_pt_process_switch(struct intel_pt *pt,
1391 struct perf_sample *sample)
1393 struct intel_pt_queue *ptq;
1394 struct perf_evsel *evsel;
1398 evsel = perf_evlist__id2evsel(pt->session->evlist, sample->id);
1399 if (evsel != pt->switch_evsel)
1402 tid = perf_evsel__intval(evsel, sample, "next_pid");
1405 intel_pt_log("sched_switch: cpu %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
1406 cpu, tid, sample->time, perf_time_to_tsc(sample->time,
1409 if (!pt->sync_switch)
1412 ptq = intel_pt_cpu_to_ptq(pt, cpu);
1416 switch (ptq->switch_state) {
1417 case INTEL_PT_SS_NOT_TRACING:
1420 case INTEL_PT_SS_UNKNOWN:
1421 case INTEL_PT_SS_TRACING:
1422 ptq->next_tid = tid;
1423 ptq->switch_state = INTEL_PT_SS_EXPECTING_SWITCH_IP;
1425 case INTEL_PT_SS_EXPECTING_SWITCH_EVENT:
1426 if (!ptq->on_heap) {
1427 ptq->timestamp = perf_time_to_tsc(sample->time,
1429 err = auxtrace_heap__add(&pt->heap, ptq->queue_nr,
1433 ptq->on_heap = true;
1435 ptq->switch_state = INTEL_PT_SS_TRACING;
1437 case INTEL_PT_SS_EXPECTING_SWITCH_IP:
1438 ptq->next_tid = tid;
1439 intel_pt_log("ERROR: cpu %d expecting switch ip\n", cpu);
1445 return machine__set_current_tid(pt->machine, cpu, -1, tid);
1448 static int intel_pt_process_itrace_start(struct intel_pt *pt,
1449 union perf_event *event,
1450 struct perf_sample *sample)
1452 if (!pt->per_cpu_mmaps)
1455 intel_pt_log("itrace_start: cpu %d pid %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
1456 sample->cpu, event->itrace_start.pid,
1457 event->itrace_start.tid, sample->time,
1458 perf_time_to_tsc(sample->time, &pt->tc));
1460 return machine__set_current_tid(pt->machine, sample->cpu,
1461 event->itrace_start.pid,
1462 event->itrace_start.tid);
1465 static int intel_pt_process_event(struct perf_session *session,
1466 union perf_event *event,
1467 struct perf_sample *sample,
1468 struct perf_tool *tool)
1470 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
1478 if (!tool->ordered_events) {
1479 pr_err("Intel Processor Trace requires ordered events\n");
1483 if (sample->time && sample->time != (u64)-1)
1484 timestamp = perf_time_to_tsc(sample->time, &pt->tc);
1488 if (timestamp || pt->timeless_decoding) {
1489 err = intel_pt_update_queues(pt);
1494 if (pt->timeless_decoding) {
1495 if (event->header.type == PERF_RECORD_EXIT) {
1496 err = intel_pt_process_timeless_queues(pt,
1500 } else if (timestamp) {
1501 err = intel_pt_process_queues(pt, timestamp);
1506 if (event->header.type == PERF_RECORD_AUX &&
1507 (event->aux.flags & PERF_AUX_FLAG_TRUNCATED) &&
1508 pt->synth_opts.errors) {
1509 err = intel_pt_lost(pt, sample);
1514 if (pt->switch_evsel && event->header.type == PERF_RECORD_SAMPLE)
1515 err = intel_pt_process_switch(pt, sample);
1516 else if (event->header.type == PERF_RECORD_ITRACE_START)
1517 err = intel_pt_process_itrace_start(pt, event, sample);
1519 intel_pt_log("event %s (%u): cpu %d time %"PRIu64" tsc %#"PRIx64"\n",
1520 perf_event__name(event->header.type), event->header.type,
1521 sample->cpu, sample->time, timestamp);
1526 static int intel_pt_flush(struct perf_session *session, struct perf_tool *tool)
1528 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
1535 if (!tool->ordered_events)
1538 ret = intel_pt_update_queues(pt);
1542 if (pt->timeless_decoding)
1543 return intel_pt_process_timeless_queues(pt, -1,
1546 return intel_pt_process_queues(pt, MAX_TIMESTAMP);
1549 static void intel_pt_free_events(struct perf_session *session)
1551 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
1553 struct auxtrace_queues *queues = &pt->queues;
1556 for (i = 0; i < queues->nr_queues; i++) {
1557 intel_pt_free_queue(queues->queue_array[i].priv);
1558 queues->queue_array[i].priv = NULL;
1560 intel_pt_log_disable();
1561 auxtrace_queues__free(queues);
1564 static void intel_pt_free(struct perf_session *session)
1566 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
1569 auxtrace_heap__free(&pt->heap);
1570 intel_pt_free_events(session);
1571 session->auxtrace = NULL;
1572 thread__delete(pt->unknown_thread);
1576 static int intel_pt_process_auxtrace_event(struct perf_session *session,
1577 union perf_event *event,
1578 struct perf_tool *tool __maybe_unused)
1580 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
1583 if (pt->sampling_mode)
1586 if (!pt->data_queued) {
1587 struct auxtrace_buffer *buffer;
1589 int fd = perf_data_file__fd(session->file);
1592 if (perf_data_file__is_pipe(session->file)) {
1595 data_offset = lseek(fd, 0, SEEK_CUR);
1596 if (data_offset == -1)
1600 err = auxtrace_queues__add_event(&pt->queues, session, event,
1601 data_offset, &buffer);
1605 /* Dump here now we have copied a piped trace out of the pipe */
1607 if (auxtrace_buffer__get_data(buffer, fd)) {
1608 intel_pt_dump_event(pt, buffer->data,
1610 auxtrace_buffer__put_data(buffer);
1618 struct intel_pt_synth {
1619 struct perf_tool dummy_tool;
1620 struct perf_session *session;
1623 static int intel_pt_event_synth(struct perf_tool *tool,
1624 union perf_event *event,
1625 struct perf_sample *sample __maybe_unused,
1626 struct machine *machine __maybe_unused)
1628 struct intel_pt_synth *intel_pt_synth =
1629 container_of(tool, struct intel_pt_synth, dummy_tool);
1631 return perf_session__deliver_synth_event(intel_pt_synth->session, event,
1635 static int intel_pt_synth_event(struct perf_session *session,
1636 struct perf_event_attr *attr, u64 id)
1638 struct intel_pt_synth intel_pt_synth;
1640 memset(&intel_pt_synth, 0, sizeof(struct intel_pt_synth));
1641 intel_pt_synth.session = session;
1643 return perf_event__synthesize_attr(&intel_pt_synth.dummy_tool, attr, 1,
1644 &id, intel_pt_event_synth);
1647 static int intel_pt_synth_events(struct intel_pt *pt,
1648 struct perf_session *session)
1650 struct perf_evlist *evlist = session->evlist;
1651 struct perf_evsel *evsel;
1652 struct perf_event_attr attr;
1657 evlist__for_each(evlist, evsel) {
1658 if (evsel->attr.type == pt->pmu_type && evsel->ids) {
1665 pr_debug("There are no selected events with Intel Processor Trace data\n");
1669 memset(&attr, 0, sizeof(struct perf_event_attr));
1670 attr.size = sizeof(struct perf_event_attr);
1671 attr.type = PERF_TYPE_HARDWARE;
1672 attr.sample_type = evsel->attr.sample_type & PERF_SAMPLE_MASK;
1673 attr.sample_type |= PERF_SAMPLE_IP | PERF_SAMPLE_TID |
1675 if (pt->timeless_decoding)
1676 attr.sample_type &= ~(u64)PERF_SAMPLE_TIME;
1678 attr.sample_type |= PERF_SAMPLE_TIME;
1679 if (!pt->per_cpu_mmaps)
1680 attr.sample_type &= ~(u64)PERF_SAMPLE_CPU;
1681 attr.exclude_user = evsel->attr.exclude_user;
1682 attr.exclude_kernel = evsel->attr.exclude_kernel;
1683 attr.exclude_hv = evsel->attr.exclude_hv;
1684 attr.exclude_host = evsel->attr.exclude_host;
1685 attr.exclude_guest = evsel->attr.exclude_guest;
1686 attr.sample_id_all = evsel->attr.sample_id_all;
1687 attr.read_format = evsel->attr.read_format;
1689 id = evsel->id[0] + 1000000000;
1693 if (pt->synth_opts.instructions) {
1694 attr.config = PERF_COUNT_HW_INSTRUCTIONS;
1695 if (pt->synth_opts.period_type == PERF_ITRACE_PERIOD_NANOSECS)
1696 attr.sample_period =
1697 intel_pt_ns_to_ticks(pt, pt->synth_opts.period);
1699 attr.sample_period = pt->synth_opts.period;
1700 pt->instructions_sample_period = attr.sample_period;
1701 if (pt->synth_opts.callchain)
1702 attr.sample_type |= PERF_SAMPLE_CALLCHAIN;
1703 pr_debug("Synthesizing 'instructions' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
1704 id, (u64)attr.sample_type);
1705 err = intel_pt_synth_event(session, &attr, id);
1707 pr_err("%s: failed to synthesize 'instructions' event type\n",
1711 pt->sample_instructions = true;
1712 pt->instructions_sample_type = attr.sample_type;
1713 pt->instructions_id = id;
1717 if (pt->synth_opts.transactions) {
1718 attr.config = PERF_COUNT_HW_INSTRUCTIONS;
1719 attr.sample_period = 1;
1720 if (pt->synth_opts.callchain)
1721 attr.sample_type |= PERF_SAMPLE_CALLCHAIN;
1722 pr_debug("Synthesizing 'transactions' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
1723 id, (u64)attr.sample_type);
1724 err = intel_pt_synth_event(session, &attr, id);
1726 pr_err("%s: failed to synthesize 'transactions' event type\n",
1730 pt->sample_transactions = true;
1731 pt->transactions_id = id;
1733 evlist__for_each(evlist, evsel) {
1734 if (evsel->id && evsel->id[0] == pt->transactions_id) {
1736 zfree(&evsel->name);
1737 evsel->name = strdup("transactions");
1743 if (pt->synth_opts.branches) {
1744 attr.config = PERF_COUNT_HW_BRANCH_INSTRUCTIONS;
1745 attr.sample_period = 1;
1746 attr.sample_type |= PERF_SAMPLE_ADDR;
1747 attr.sample_type &= ~(u64)PERF_SAMPLE_CALLCHAIN;
1748 pr_debug("Synthesizing 'branches' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
1749 id, (u64)attr.sample_type);
1750 err = intel_pt_synth_event(session, &attr, id);
1752 pr_err("%s: failed to synthesize 'branches' event type\n",
1756 pt->sample_branches = true;
1757 pt->branches_sample_type = attr.sample_type;
1758 pt->branches_id = id;
1761 pt->synth_needs_swap = evsel->needs_swap;
1766 static struct perf_evsel *intel_pt_find_sched_switch(struct perf_evlist *evlist)
1768 struct perf_evsel *evsel;
1770 evlist__for_each_reverse(evlist, evsel) {
1771 const char *name = perf_evsel__name(evsel);
1773 if (!strcmp(name, "sched:sched_switch"))
1780 static const char * const intel_pt_info_fmts[] = {
1781 [INTEL_PT_PMU_TYPE] = " PMU Type %"PRId64"\n",
1782 [INTEL_PT_TIME_SHIFT] = " Time Shift %"PRIu64"\n",
1783 [INTEL_PT_TIME_MULT] = " Time Muliplier %"PRIu64"\n",
1784 [INTEL_PT_TIME_ZERO] = " Time Zero %"PRIu64"\n",
1785 [INTEL_PT_CAP_USER_TIME_ZERO] = " Cap Time Zero %"PRId64"\n",
1786 [INTEL_PT_TSC_BIT] = " TSC bit %#"PRIx64"\n",
1787 [INTEL_PT_NORETCOMP_BIT] = " NoRETComp bit %#"PRIx64"\n",
1788 [INTEL_PT_HAVE_SCHED_SWITCH] = " Have sched_switch %"PRId64"\n",
1789 [INTEL_PT_SNAPSHOT_MODE] = " Snapshot mode %"PRId64"\n",
1790 [INTEL_PT_PER_CPU_MMAPS] = " Per-cpu maps %"PRId64"\n",
1791 [INTEL_PT_MTC_BIT] = " MTC bit %#"PRIx64"\n",
1792 [INTEL_PT_TSC_CTC_N] = " TSC:CTC numerator %"PRIu64"\n",
1793 [INTEL_PT_TSC_CTC_D] = " TSC:CTC denominator %"PRIu64"\n",
1794 [INTEL_PT_CYC_BIT] = " CYC bit %#"PRIx64"\n",
1797 static void intel_pt_print_info(u64 *arr, int start, int finish)
1804 for (i = start; i <= finish; i++)
1805 fprintf(stdout, intel_pt_info_fmts[i], arr[i]);
1808 int intel_pt_process_auxtrace_info(union perf_event *event,
1809 struct perf_session *session)
1811 struct auxtrace_info_event *auxtrace_info = &event->auxtrace_info;
1812 size_t min_sz = sizeof(u64) * INTEL_PT_PER_CPU_MMAPS;
1813 struct intel_pt *pt;
1816 if (auxtrace_info->header.size < sizeof(struct auxtrace_info_event) +
1820 pt = zalloc(sizeof(struct intel_pt));
1824 err = auxtrace_queues__init(&pt->queues);
1828 intel_pt_log_set_name(INTEL_PT_PMU_NAME);
1830 pt->session = session;
1831 pt->machine = &session->machines.host; /* No kvm support */
1832 pt->auxtrace_type = auxtrace_info->type;
1833 pt->pmu_type = auxtrace_info->priv[INTEL_PT_PMU_TYPE];
1834 pt->tc.time_shift = auxtrace_info->priv[INTEL_PT_TIME_SHIFT];
1835 pt->tc.time_mult = auxtrace_info->priv[INTEL_PT_TIME_MULT];
1836 pt->tc.time_zero = auxtrace_info->priv[INTEL_PT_TIME_ZERO];
1837 pt->cap_user_time_zero = auxtrace_info->priv[INTEL_PT_CAP_USER_TIME_ZERO];
1838 pt->tsc_bit = auxtrace_info->priv[INTEL_PT_TSC_BIT];
1839 pt->noretcomp_bit = auxtrace_info->priv[INTEL_PT_NORETCOMP_BIT];
1840 pt->have_sched_switch = auxtrace_info->priv[INTEL_PT_HAVE_SCHED_SWITCH];
1841 pt->snapshot_mode = auxtrace_info->priv[INTEL_PT_SNAPSHOT_MODE];
1842 pt->per_cpu_mmaps = auxtrace_info->priv[INTEL_PT_PER_CPU_MMAPS];
1843 intel_pt_print_info(&auxtrace_info->priv[0], INTEL_PT_PMU_TYPE,
1844 INTEL_PT_PER_CPU_MMAPS);
1846 if (auxtrace_info->header.size >= sizeof(struct auxtrace_info_event) +
1847 (sizeof(u64) * INTEL_PT_CYC_BIT)) {
1848 pt->mtc_bit = auxtrace_info->priv[INTEL_PT_MTC_BIT];
1849 pt->mtc_freq_bits = auxtrace_info->priv[INTEL_PT_MTC_FREQ_BITS];
1850 pt->tsc_ctc_ratio_n = auxtrace_info->priv[INTEL_PT_TSC_CTC_N];
1851 pt->tsc_ctc_ratio_d = auxtrace_info->priv[INTEL_PT_TSC_CTC_D];
1852 pt->cyc_bit = auxtrace_info->priv[INTEL_PT_CYC_BIT];
1853 intel_pt_print_info(&auxtrace_info->priv[0], INTEL_PT_MTC_BIT,
1857 pt->timeless_decoding = intel_pt_timeless_decoding(pt);
1858 pt->have_tsc = intel_pt_have_tsc(pt);
1859 pt->sampling_mode = false;
1860 pt->est_tsc = !pt->timeless_decoding;
1862 pt->unknown_thread = thread__new(999999999, 999999999);
1863 if (!pt->unknown_thread) {
1865 goto err_free_queues;
1867 err = thread__set_comm(pt->unknown_thread, "unknown", 0);
1869 goto err_delete_thread;
1870 if (thread__init_map_groups(pt->unknown_thread, pt->machine)) {
1872 goto err_delete_thread;
1875 pt->auxtrace.process_event = intel_pt_process_event;
1876 pt->auxtrace.process_auxtrace_event = intel_pt_process_auxtrace_event;
1877 pt->auxtrace.flush_events = intel_pt_flush;
1878 pt->auxtrace.free_events = intel_pt_free_events;
1879 pt->auxtrace.free = intel_pt_free;
1880 session->auxtrace = &pt->auxtrace;
1885 if (pt->have_sched_switch == 1) {
1886 pt->switch_evsel = intel_pt_find_sched_switch(session->evlist);
1887 if (!pt->switch_evsel) {
1888 pr_err("%s: missing sched_switch event\n", __func__);
1889 goto err_delete_thread;
1893 if (session->itrace_synth_opts && session->itrace_synth_opts->set) {
1894 pt->synth_opts = *session->itrace_synth_opts;
1896 itrace_synth_opts__set_default(&pt->synth_opts);
1897 if (use_browser != -1) {
1898 pt->synth_opts.branches = false;
1899 pt->synth_opts.callchain = true;
1903 if (pt->synth_opts.log)
1904 intel_pt_log_enable();
1906 /* Maximum non-turbo ratio is TSC freq / 100 MHz */
1907 if (pt->tc.time_mult) {
1908 u64 tsc_freq = intel_pt_ns_to_ticks(pt, 1000000000);
1910 pt->max_non_turbo_ratio = (tsc_freq + 50000000) / 100000000;
1911 intel_pt_log("TSC frequency %"PRIu64"\n", tsc_freq);
1912 intel_pt_log("Maximum non-turbo ratio %u\n",
1913 pt->max_non_turbo_ratio);
1916 if (pt->synth_opts.calls)
1917 pt->branches_filter |= PERF_IP_FLAG_CALL | PERF_IP_FLAG_ASYNC |
1918 PERF_IP_FLAG_TRACE_END;
1919 if (pt->synth_opts.returns)
1920 pt->branches_filter |= PERF_IP_FLAG_RETURN |
1921 PERF_IP_FLAG_TRACE_BEGIN;
1923 if (pt->synth_opts.callchain && !symbol_conf.use_callchain) {
1924 symbol_conf.use_callchain = true;
1925 if (callchain_register_param(&callchain_param) < 0) {
1926 symbol_conf.use_callchain = false;
1927 pt->synth_opts.callchain = false;
1931 err = intel_pt_synth_events(pt, session);
1933 goto err_delete_thread;
1935 err = auxtrace_queues__process_index(&pt->queues, session);
1937 goto err_delete_thread;
1939 if (pt->queues.populated)
1940 pt->data_queued = true;
1942 if (pt->timeless_decoding)
1943 pr_debug2("Intel PT decoding without timestamps\n");
1948 thread__delete(pt->unknown_thread);
1950 intel_pt_log_disable();
1951 auxtrace_queues__free(&pt->queues);
1952 session->auxtrace = NULL;