1 //===- AsmMatcherEmitter.cpp - Generate an assembly matcher ---------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This tablegen backend emits a target specifier matcher for converting parsed
11 // assembly operands in the MCInst structures.
13 // The input to the target specific matcher is a list of literal tokens and
14 // operands. The target specific parser should generally eliminate any syntax
15 // which is not relevant for matching; for example, comma tokens should have
16 // already been consumed and eliminated by the parser. Most instructions will
17 // end up with a single literal token (the instruction name) and some number of
20 // Some example inputs, for X86:
21 // 'addl' (immediate ...) (register ...)
22 // 'add' (immediate ...) (memory ...)
25 // The assembly matcher is responsible for converting this input into a precise
26 // machine instruction (i.e., an instruction with a well defined encoding). This
27 // mapping has several properties which complicate matching:
29 // - It may be ambiguous; many architectures can legally encode particular
30 // variants of an instruction in different ways (for example, using a smaller
31 // encoding for small immediates). Such ambiguities should never be
32 // arbitrarily resolved by the assembler, the assembler is always responsible
33 // for choosing the "best" available instruction.
35 // - It may depend on the subtarget or the assembler context. Instructions
36 // which are invalid for the current mode, but otherwise unambiguous (e.g.,
37 // an SSE instruction in a file being assembled for i486) should be accepted
38 // and rejected by the assembler front end. However, if the proper encoding
39 // for an instruction is dependent on the assembler context then the matcher
40 // is responsible for selecting the correct machine instruction for the
43 // The core matching algorithm attempts to exploit the regularity in most
44 // instruction sets to quickly determine the set of possibly matching
45 // instructions, and the simplify the generated code. Additionally, this helps
46 // to ensure that the ambiguities are intentionally resolved by the user.
48 // The matching is divided into two distinct phases:
50 // 1. Classification: Each operand is mapped to the unique set which (a)
51 // contains it, and (b) is the largest such subset for which a single
52 // instruction could match all members.
54 // For register classes, we can generate these subgroups automatically. For
55 // arbitrary operands, we expect the user to define the classes and their
56 // relations to one another (for example, 8-bit signed immediates as a
57 // subset of 32-bit immediates).
59 // By partitioning the operands in this way, we guarantee that for any
60 // tuple of classes, any single instruction must match either all or none
61 // of the sets of operands which could classify to that tuple.
63 // In addition, the subset relation amongst classes induces a partial order
64 // on such tuples, which we use to resolve ambiguities.
66 // 2. The input can now be treated as a tuple of classes (static tokens are
67 // simple singleton sets). Each such tuple should generally map to a single
68 // instruction (we currently ignore cases where this isn't true, whee!!!),
69 // which we can emit a simple matcher for.
71 //===----------------------------------------------------------------------===//
73 #include "AsmMatcherEmitter.h"
74 #include "CodeGenTarget.h"
76 #include "StringMatcher.h"
77 #include "llvm/ADT/OwningPtr.h"
78 #include "llvm/ADT/PointerUnion.h"
79 #include "llvm/ADT/SmallPtrSet.h"
80 #include "llvm/ADT/SmallVector.h"
81 #include "llvm/ADT/STLExtras.h"
82 #include "llvm/ADT/StringExtras.h"
83 #include "llvm/Support/CommandLine.h"
84 #include "llvm/Support/Debug.h"
89 static cl::opt<std::string>
90 MatchPrefix("match-prefix", cl::init(""),
91 cl::desc("Only match instructions with the given prefix"));
96 struct SubtargetFeatureInfo;
98 /// ClassInfo - Helper class for storing the information about a particular
99 /// class of operands which can be matched.
102 /// Invalid kind, for use as a sentinel value.
105 /// The class for a particular token.
108 /// The (first) register class, subsequent register classes are
109 /// RegisterClass0+1, and so on.
112 /// The (first) user defined class, subsequent user defined classes are
113 /// UserClass0+1, and so on.
117 /// Kind - The class kind, which is either a predefined kind, or (UserClass0 +
118 /// N) for the Nth user defined class.
121 /// SuperClasses - The super classes of this class. Note that for simplicities
122 /// sake user operands only record their immediate super class, while register
123 /// operands include all superclasses.
124 std::vector<ClassInfo*> SuperClasses;
126 /// Name - The full class name, suitable for use in an enum.
129 /// ClassName - The unadorned generic name for this class (e.g., Token).
130 std::string ClassName;
132 /// ValueName - The name of the value this class represents; for a token this
133 /// is the literal token string, for an operand it is the TableGen class (or
134 /// empty if this is a derived class).
135 std::string ValueName;
137 /// PredicateMethod - The name of the operand method to test whether the
138 /// operand matches this class; this is not valid for Token or register kinds.
139 std::string PredicateMethod;
141 /// RenderMethod - The name of the operand method to add this operand to an
142 /// MCInst; this is not valid for Token or register kinds.
143 std::string RenderMethod;
145 /// For register classes, the records for all the registers in this class.
146 std::set<Record*> Registers;
149 /// isRegisterClass() - Check if this is a register class.
150 bool isRegisterClass() const {
151 return Kind >= RegisterClass0 && Kind < UserClass0;
154 /// isUserClass() - Check if this is a user defined class.
155 bool isUserClass() const {
156 return Kind >= UserClass0;
159 /// isRelatedTo - Check whether this class is "related" to \arg RHS. Classes
160 /// are related if they are in the same class hierarchy.
161 bool isRelatedTo(const ClassInfo &RHS) const {
162 // Tokens are only related to tokens.
163 if (Kind == Token || RHS.Kind == Token)
164 return Kind == Token && RHS.Kind == Token;
166 // Registers classes are only related to registers classes, and only if
167 // their intersection is non-empty.
168 if (isRegisterClass() || RHS.isRegisterClass()) {
169 if (!isRegisterClass() || !RHS.isRegisterClass())
172 std::set<Record*> Tmp;
173 std::insert_iterator< std::set<Record*> > II(Tmp, Tmp.begin());
174 std::set_intersection(Registers.begin(), Registers.end(),
175 RHS.Registers.begin(), RHS.Registers.end(),
181 // Otherwise we have two users operands; they are related if they are in the
182 // same class hierarchy.
184 // FIXME: This is an oversimplification, they should only be related if they
185 // intersect, however we don't have that information.
186 assert(isUserClass() && RHS.isUserClass() && "Unexpected class!");
187 const ClassInfo *Root = this;
188 while (!Root->SuperClasses.empty())
189 Root = Root->SuperClasses.front();
191 const ClassInfo *RHSRoot = &RHS;
192 while (!RHSRoot->SuperClasses.empty())
193 RHSRoot = RHSRoot->SuperClasses.front();
195 return Root == RHSRoot;
198 /// isSubsetOf - Test whether this class is a subset of \arg RHS;
199 bool isSubsetOf(const ClassInfo &RHS) const {
200 // This is a subset of RHS if it is the same class...
204 // ... or if any of its super classes are a subset of RHS.
205 for (std::vector<ClassInfo*>::const_iterator it = SuperClasses.begin(),
206 ie = SuperClasses.end(); it != ie; ++it)
207 if ((*it)->isSubsetOf(RHS))
213 /// operator< - Compare two classes.
214 bool operator<(const ClassInfo &RHS) const {
218 // Unrelated classes can be ordered by kind.
219 if (!isRelatedTo(RHS))
220 return Kind < RHS.Kind;
224 assert(0 && "Invalid kind!");
226 // Tokens are comparable by value.
228 // FIXME: Compare by enum value.
229 return ValueName < RHS.ValueName;
232 // This class preceeds the RHS if it is a proper subset of the RHS.
235 if (RHS.isSubsetOf(*this))
238 // Otherwise, order by name to ensure we have a total ordering.
239 return ValueName < RHS.ValueName;
244 /// MatchableInfo - Helper class for storing the necessary information for an
245 /// instruction or alias which is capable of being matched.
246 struct MatchableInfo {
248 /// Token - This is the token that the operand came from.
251 /// The unique class instance this operand should match.
254 /// The operand name this is, if anything.
257 explicit AsmOperand(StringRef T) : Token(T), Class(0) {}
260 /// ResOperand - This represents a single operand in the result instruction
261 /// generated by the match. In cases (like addressing modes) where a single
262 /// assembler operand expands to multiple MCOperands, this represents the
263 /// single assembler operand, not the MCOperand.
266 /// RenderAsmOperand - This represents an operand result that is
267 /// generated by calling the render method on the assembly operand. The
268 /// corresponding AsmOperand is specified by AsmOperandNum.
271 /// TiedOperand - This represents a result operand that is a duplicate of
272 /// a previous result operand.
277 /// This is the operand # in the AsmOperands list that this should be
279 unsigned AsmOperandNum;
281 /// TiedOperandNum - This is the (earlier) result operand that should be
283 unsigned TiedOperandNum;
286 /// OpInfo - This is the information about the instruction operand that is
288 const CGIOperandList::OperandInfo *OpInfo;
290 static ResOperand getRenderedOp(unsigned AsmOpNum,
291 const CGIOperandList::OperandInfo *Op) {
293 X.Kind = RenderAsmOperand;
294 X.AsmOperandNum = AsmOpNum;
299 static ResOperand getTiedOp(unsigned TiedOperandNum,
300 const CGIOperandList::OperandInfo *Op) {
302 X.Kind = TiedOperand;
303 X.TiedOperandNum = TiedOperandNum;
309 /// ResultInst - The result instruction generated.
310 const CodeGenInstruction *ResultInst;
312 /// TheDef - This is the definition of the instruction or InstAlias that this
313 /// matchable came from.
314 Record *const TheDef;
316 /// DefRec - This is the definition that it came from.
317 PointerUnion<const CodeGenInstruction*, const CodeGenInstAlias*> DefRec;
320 const CGIOperandList &TheOperandList;
323 /// ResOperands - This is the operand list that should be built for the result
325 std::vector<ResOperand> ResOperands;
327 /// AsmString - The assembly string for this instruction (with variants
328 /// removed), e.g. "movsx $src, $dst".
329 std::string AsmString;
331 /// Mnemonic - This is the first token of the matched instruction, its
335 /// AsmOperands - The textual operands that this instruction matches,
336 /// annotated with a class and where in the OperandList they were defined.
337 /// This directly corresponds to the tokenized AsmString after the mnemonic is
339 SmallVector<AsmOperand, 4> AsmOperands;
341 /// Predicates - The required subtarget features to match this instruction.
342 SmallVector<SubtargetFeatureInfo*, 4> RequiredFeatures;
344 /// ConversionFnKind - The enum value which is passed to the generated
345 /// ConvertToMCInst to convert parsed operands into an MCInst for this
347 std::string ConversionFnKind;
349 MatchableInfo(const CodeGenInstruction &CGI)
350 : TheDef(CGI.TheDef), DefRec(&CGI),
351 TheOperandList(CGI.Operands), AsmString(CGI.AsmString) {
355 MatchableInfo(const CodeGenInstAlias *Alias)
356 : TheDef(Alias->TheDef), DefRec(Alias), TheOperandList(Alias->Operands),
357 AsmString(Alias->AsmString) {
358 ResultInst = Alias->ResultInst;
361 void Initialize(const AsmMatcherInfo &Info,
362 SmallPtrSet<Record*, 16> &SingletonRegisters);
364 /// Validate - Return true if this matchable is a valid thing to match against
365 /// and perform a bunch of validity checking.
366 bool Validate(StringRef CommentDelimiter, bool Hack) const;
368 /// getSingletonRegisterForAsmOperand - If the specified token is a singleton
369 /// register, return the Record for it, otherwise return null.
370 Record *getSingletonRegisterForAsmOperand(unsigned i,
371 const AsmMatcherInfo &Info) const;
373 int FindAsmOperandNamed(StringRef N) const {
374 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i)
375 if (N == AsmOperands[i].SrcOpName)
380 void BuildResultOperands();
382 /// operator< - Compare two matchables.
383 bool operator<(const MatchableInfo &RHS) const {
384 // The primary comparator is the instruction mnemonic.
385 if (Mnemonic != RHS.Mnemonic)
386 return Mnemonic < RHS.Mnemonic;
388 if (AsmOperands.size() != RHS.AsmOperands.size())
389 return AsmOperands.size() < RHS.AsmOperands.size();
391 // Compare lexicographically by operand. The matcher validates that other
392 // orderings wouldn't be ambiguous using \see CouldMatchAmiguouslyWith().
393 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
394 if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class)
396 if (*RHS.AsmOperands[i].Class < *AsmOperands[i].Class)
403 /// CouldMatchAmiguouslyWith - Check whether this matchable could
404 /// ambiguously match the same set of operands as \arg RHS (without being a
405 /// strictly superior match).
406 bool CouldMatchAmiguouslyWith(const MatchableInfo &RHS) {
407 // The primary comparator is the instruction mnemonic.
408 if (Mnemonic != RHS.Mnemonic)
411 // The number of operands is unambiguous.
412 if (AsmOperands.size() != RHS.AsmOperands.size())
415 // Otherwise, make sure the ordering of the two instructions is unambiguous
416 // by checking that either (a) a token or operand kind discriminates them,
417 // or (b) the ordering among equivalent kinds is consistent.
419 // Tokens and operand kinds are unambiguous (assuming a correct target
421 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i)
422 if (AsmOperands[i].Class->Kind != RHS.AsmOperands[i].Class->Kind ||
423 AsmOperands[i].Class->Kind == ClassInfo::Token)
424 if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class ||
425 *RHS.AsmOperands[i].Class < *AsmOperands[i].Class)
428 // Otherwise, this operand could commute if all operands are equivalent, or
429 // there is a pair of operands that compare less than and a pair that
430 // compare greater than.
431 bool HasLT = false, HasGT = false;
432 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
433 if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class)
435 if (*RHS.AsmOperands[i].Class < *AsmOperands[i].Class)
439 return !(HasLT ^ HasGT);
445 void TokenizeAsmString(const AsmMatcherInfo &Info);
448 /// SubtargetFeatureInfo - Helper class for storing information on a subtarget
449 /// feature which participates in instruction matching.
450 struct SubtargetFeatureInfo {
451 /// \brief The predicate record for this feature.
454 /// \brief An unique index assigned to represent this feature.
457 SubtargetFeatureInfo(Record *D, unsigned Idx) : TheDef(D), Index(Idx) {}
459 /// \brief The name of the enumerated constant identifying this feature.
460 std::string getEnumName() const {
461 return "Feature_" + TheDef->getName();
465 class AsmMatcherInfo {
467 /// The tablegen AsmParser record.
470 /// Target - The target information.
471 CodeGenTarget &Target;
473 /// The AsmParser "RegisterPrefix" value.
474 std::string RegisterPrefix;
476 /// The classes which are needed for matching.
477 std::vector<ClassInfo*> Classes;
479 /// The information on the matchables to match.
480 std::vector<MatchableInfo*> Matchables;
482 /// Map of Register records to their class information.
483 std::map<Record*, ClassInfo*> RegisterClasses;
485 /// Map of Predicate records to their subtarget information.
486 std::map<Record*, SubtargetFeatureInfo*> SubtargetFeatures;
489 /// Map of token to class information which has already been constructed.
490 std::map<std::string, ClassInfo*> TokenClasses;
492 /// Map of RegisterClass records to their class information.
493 std::map<Record*, ClassInfo*> RegisterClassClasses;
495 /// Map of AsmOperandClass records to their class information.
496 std::map<Record*, ClassInfo*> AsmOperandClasses;
499 /// getTokenClass - Lookup or create the class for the given token.
500 ClassInfo *getTokenClass(StringRef Token);
502 /// getOperandClass - Lookup or create the class for the given operand.
503 ClassInfo *getOperandClass(const CGIOperandList::OperandInfo &OI);
505 /// BuildRegisterClasses - Build the ClassInfo* instances for register
507 void BuildRegisterClasses(SmallPtrSet<Record*, 16> &SingletonRegisters);
509 /// BuildOperandClasses - Build the ClassInfo* instances for user defined
511 void BuildOperandClasses();
513 void BuildInstructionOperandReference(MatchableInfo *II,
515 MatchableInfo::AsmOperand &Op);
516 void BuildAliasOperandReference(MatchableInfo *II,
518 MatchableInfo::AsmOperand &Op);
521 AsmMatcherInfo(Record *AsmParser, CodeGenTarget &Target);
523 /// BuildInfo - Construct the various tables used during matching.
526 /// getSubtargetFeature - Lookup or create the subtarget feature info for the
528 SubtargetFeatureInfo *getSubtargetFeature(Record *Def) const {
529 assert(Def->isSubClassOf("Predicate") && "Invalid predicate type!");
530 std::map<Record*, SubtargetFeatureInfo*>::const_iterator I =
531 SubtargetFeatures.find(Def);
532 return I == SubtargetFeatures.end() ? 0 : I->second;
538 void MatchableInfo::dump() {
539 errs() << TheDef->getName() << " -- " << "flattened:\"" << AsmString <<"\"\n";
541 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
542 AsmOperand &Op = AsmOperands[i];
543 errs() << " op[" << i << "] = " << Op.Class->ClassName << " - ";
544 errs() << '\"' << Op.Token << "\"\n";
546 if (!Op.OperandInfo) {
547 errs() << "(singleton register)\n";
551 const CGIOperandList::OperandInfo &OI = *Op.OperandInfo;
552 errs() << OI.Name << " " << OI.Rec->getName()
553 << " (" << OI.MIOperandNo << ", " << OI.MINumOperands << ")\n";
558 void MatchableInfo::Initialize(const AsmMatcherInfo &Info,
559 SmallPtrSet<Record*, 16> &SingletonRegisters) {
560 // TODO: Eventually support asmparser for Variant != 0.
561 AsmString = CodeGenInstruction::FlattenAsmStringVariants(AsmString, 0);
563 TokenizeAsmString(Info);
565 // Compute the require features.
566 std::vector<Record*> Predicates =TheDef->getValueAsListOfDefs("Predicates");
567 for (unsigned i = 0, e = Predicates.size(); i != e; ++i)
568 if (SubtargetFeatureInfo *Feature =
569 Info.getSubtargetFeature(Predicates[i]))
570 RequiredFeatures.push_back(Feature);
572 // Collect singleton registers, if used.
573 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
574 if (Record *Reg = getSingletonRegisterForAsmOperand(i, Info))
575 SingletonRegisters.insert(Reg);
579 /// TokenizeAsmString - Tokenize a simplified assembly string.
580 void MatchableInfo::TokenizeAsmString(const AsmMatcherInfo &Info) {
581 StringRef String = AsmString;
584 for (unsigned i = 0, e = String.size(); i != e; ++i) {
594 AsmOperands.push_back(AsmOperand(String.slice(Prev, i)));
597 if (!isspace(String[i]) && String[i] != ',')
598 AsmOperands.push_back(AsmOperand(String.substr(i, 1)));
604 AsmOperands.push_back(AsmOperand(String.slice(Prev, i)));
608 assert(i != String.size() && "Invalid quoted character");
609 AsmOperands.push_back(AsmOperand(String.substr(i, 1)));
614 // If this isn't "${", treat like a normal token.
615 if (i + 1 == String.size() || String[i + 1] != '{') {
617 AsmOperands.push_back(AsmOperand(String.slice(Prev, i)));
625 AsmOperands.push_back(AsmOperand(String.slice(Prev, i)));
629 StringRef::iterator End = std::find(String.begin() + i, String.end(),'}');
630 assert(End != String.end() && "Missing brace in operand reference!");
631 size_t EndPos = End - String.begin();
632 AsmOperands.push_back(AsmOperand(String.slice(i, EndPos+1)));
640 AsmOperands.push_back(AsmOperand(String.slice(Prev, i)));
649 if (InTok && Prev != String.size())
650 AsmOperands.push_back(AsmOperand(String.substr(Prev)));
652 // The first token of the instruction is the mnemonic, which must be a
653 // simple string, not a $foo variable or a singleton register.
654 assert(!AsmOperands.empty() && "Instruction has no tokens?");
655 Mnemonic = AsmOperands[0].Token;
656 if (Mnemonic[0] == '$' || getSingletonRegisterForAsmOperand(0, Info))
657 throw TGError(TheDef->getLoc(),
658 "Invalid instruction mnemonic '" + Mnemonic.str() + "'!");
660 // Remove the first operand, it is tracked in the mnemonic field.
661 AsmOperands.erase(AsmOperands.begin());
666 bool MatchableInfo::Validate(StringRef CommentDelimiter, bool Hack) const {
667 // Reject matchables with no .s string.
668 if (AsmString.empty())
669 throw TGError(TheDef->getLoc(), "instruction with empty asm string");
671 // Reject any matchables with a newline in them, they should be marked
672 // isCodeGenOnly if they are pseudo instructions.
673 if (AsmString.find('\n') != std::string::npos)
674 throw TGError(TheDef->getLoc(),
675 "multiline instruction is not valid for the asmparser, "
676 "mark it isCodeGenOnly");
678 // Remove comments from the asm string. We know that the asmstring only
680 if (!CommentDelimiter.empty() &&
681 StringRef(AsmString).find(CommentDelimiter) != StringRef::npos)
682 throw TGError(TheDef->getLoc(),
683 "asmstring for instruction has comment character in it, "
684 "mark it isCodeGenOnly");
686 // Reject matchables with operand modifiers, these aren't something we can
687 /// handle, the target should be refactored to use operands instead of
690 // Also, check for instructions which reference the operand multiple times;
691 // this implies a constraint we would not honor.
692 std::set<std::string> OperandNames;
693 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
694 StringRef Tok = AsmOperands[i].Token;
695 if (Tok[0] == '$' && Tok.find(':') != StringRef::npos)
696 throw TGError(TheDef->getLoc(),
697 "matchable with operand modifier '" + Tok.str() +
698 "' not supported by asm matcher. Mark isCodeGenOnly!");
700 // Verify that any operand is only mentioned once.
701 // We reject aliases and ignore instructions for now.
702 if (Tok[0] == '$' && !OperandNames.insert(Tok).second) {
704 throw TGError(TheDef->getLoc(),
705 "ERROR: matchable with tied operand '" + Tok.str() +
706 "' can never be matched!");
707 // FIXME: Should reject these. The ARM backend hits this with $lane in a
708 // bunch of instructions. It is unclear what the right answer is.
710 errs() << "warning: '" << TheDef->getName() << "': "
711 << "ignoring instruction with tied operand '"
712 << Tok.str() << "'\n";
722 /// getSingletonRegisterForAsmOperand - If the specified token is a singleton
723 /// register, return the register name, otherwise return a null StringRef.
724 Record *MatchableInfo::
725 getSingletonRegisterForAsmOperand(unsigned i, const AsmMatcherInfo &Info) const{
726 StringRef Tok = AsmOperands[i].Token;
727 if (!Tok.startswith(Info.RegisterPrefix))
730 StringRef RegName = Tok.substr(Info.RegisterPrefix.size());
731 if (const CodeGenRegister *Reg = Info.Target.getRegisterByName(RegName))
734 // If there is no register prefix (i.e. "%" in "%eax"), then this may
735 // be some random non-register token, just ignore it.
736 if (Info.RegisterPrefix.empty())
739 // Otherwise, we have something invalid prefixed with the register prefix,
741 std::string Err = "unable to find register for '" + RegName.str() +
742 "' (which matches register prefix)";
743 throw TGError(TheDef->getLoc(), Err);
747 static std::string getEnumNameForToken(StringRef Str) {
750 for (StringRef::iterator it = Str.begin(), ie = Str.end(); it != ie; ++it) {
752 case '*': Res += "_STAR_"; break;
753 case '%': Res += "_PCT_"; break;
754 case ':': Res += "_COLON_"; break;
759 Res += "_" + utostr((unsigned) *it) + "_";
766 ClassInfo *AsmMatcherInfo::getTokenClass(StringRef Token) {
767 ClassInfo *&Entry = TokenClasses[Token];
770 Entry = new ClassInfo();
771 Entry->Kind = ClassInfo::Token;
772 Entry->ClassName = "Token";
773 Entry->Name = "MCK_" + getEnumNameForToken(Token);
774 Entry->ValueName = Token;
775 Entry->PredicateMethod = "<invalid>";
776 Entry->RenderMethod = "<invalid>";
777 Classes.push_back(Entry);
784 AsmMatcherInfo::getOperandClass(const CGIOperandList::OperandInfo &OI) {
785 if (OI.Rec->isSubClassOf("RegisterClass")) {
786 if (ClassInfo *CI = RegisterClassClasses[OI.Rec])
788 throw TGError(OI.Rec->getLoc(), "register class has no class info!");
791 assert(OI.Rec->isSubClassOf("Operand") && "Unexpected operand!");
792 Record *MatchClass = OI.Rec->getValueAsDef("ParserMatchClass");
793 if (ClassInfo *CI = AsmOperandClasses[MatchClass])
796 throw TGError(OI.Rec->getLoc(), "operand has no match class!");
799 void AsmMatcherInfo::
800 BuildRegisterClasses(SmallPtrSet<Record*, 16> &SingletonRegisters) {
801 const std::vector<CodeGenRegister> &Registers = Target.getRegisters();
802 const std::vector<CodeGenRegisterClass> &RegClassList =
803 Target.getRegisterClasses();
805 // The register sets used for matching.
806 std::set< std::set<Record*> > RegisterSets;
808 // Gather the defined sets.
809 for (std::vector<CodeGenRegisterClass>::const_iterator it =
810 RegClassList.begin(), ie = RegClassList.end(); it != ie; ++it)
811 RegisterSets.insert(std::set<Record*>(it->Elements.begin(),
812 it->Elements.end()));
814 // Add any required singleton sets.
815 for (SmallPtrSet<Record*, 16>::iterator it = SingletonRegisters.begin(),
816 ie = SingletonRegisters.end(); it != ie; ++it) {
818 RegisterSets.insert(std::set<Record*>(&Rec, &Rec + 1));
821 // Introduce derived sets where necessary (when a register does not determine
822 // a unique register set class), and build the mapping of registers to the set
823 // they should classify to.
824 std::map<Record*, std::set<Record*> > RegisterMap;
825 for (std::vector<CodeGenRegister>::const_iterator it = Registers.begin(),
826 ie = Registers.end(); it != ie; ++it) {
827 const CodeGenRegister &CGR = *it;
828 // Compute the intersection of all sets containing this register.
829 std::set<Record*> ContainingSet;
831 for (std::set< std::set<Record*> >::iterator it = RegisterSets.begin(),
832 ie = RegisterSets.end(); it != ie; ++it) {
833 if (!it->count(CGR.TheDef))
836 if (ContainingSet.empty()) {
841 std::set<Record*> Tmp;
842 std::swap(Tmp, ContainingSet);
843 std::insert_iterator< std::set<Record*> > II(ContainingSet,
844 ContainingSet.begin());
845 std::set_intersection(Tmp.begin(), Tmp.end(), it->begin(), it->end(), II);
848 if (!ContainingSet.empty()) {
849 RegisterSets.insert(ContainingSet);
850 RegisterMap.insert(std::make_pair(CGR.TheDef, ContainingSet));
854 // Construct the register classes.
855 std::map<std::set<Record*>, ClassInfo*> RegisterSetClasses;
857 for (std::set< std::set<Record*> >::iterator it = RegisterSets.begin(),
858 ie = RegisterSets.end(); it != ie; ++it, ++Index) {
859 ClassInfo *CI = new ClassInfo();
860 CI->Kind = ClassInfo::RegisterClass0 + Index;
861 CI->ClassName = "Reg" + utostr(Index);
862 CI->Name = "MCK_Reg" + utostr(Index);
864 CI->PredicateMethod = ""; // unused
865 CI->RenderMethod = "addRegOperands";
867 Classes.push_back(CI);
868 RegisterSetClasses.insert(std::make_pair(*it, CI));
871 // Find the superclasses; we could compute only the subgroup lattice edges,
872 // but there isn't really a point.
873 for (std::set< std::set<Record*> >::iterator it = RegisterSets.begin(),
874 ie = RegisterSets.end(); it != ie; ++it) {
875 ClassInfo *CI = RegisterSetClasses[*it];
876 for (std::set< std::set<Record*> >::iterator it2 = RegisterSets.begin(),
877 ie2 = RegisterSets.end(); it2 != ie2; ++it2)
879 std::includes(it2->begin(), it2->end(), it->begin(), it->end()))
880 CI->SuperClasses.push_back(RegisterSetClasses[*it2]);
883 // Name the register classes which correspond to a user defined RegisterClass.
884 for (std::vector<CodeGenRegisterClass>::const_iterator
885 it = RegClassList.begin(), ie = RegClassList.end(); it != ie; ++it) {
886 ClassInfo *CI = RegisterSetClasses[std::set<Record*>(it->Elements.begin(),
887 it->Elements.end())];
888 if (CI->ValueName.empty()) {
889 CI->ClassName = it->getName();
890 CI->Name = "MCK_" + it->getName();
891 CI->ValueName = it->getName();
893 CI->ValueName = CI->ValueName + "," + it->getName();
895 RegisterClassClasses.insert(std::make_pair(it->TheDef, CI));
898 // Populate the map for individual registers.
899 for (std::map<Record*, std::set<Record*> >::iterator it = RegisterMap.begin(),
900 ie = RegisterMap.end(); it != ie; ++it)
901 RegisterClasses[it->first] = RegisterSetClasses[it->second];
903 // Name the register classes which correspond to singleton registers.
904 for (SmallPtrSet<Record*, 16>::iterator it = SingletonRegisters.begin(),
905 ie = SingletonRegisters.end(); it != ie; ++it) {
907 ClassInfo *CI = RegisterClasses[Rec];
908 assert(CI && "Missing singleton register class info!");
910 if (CI->ValueName.empty()) {
911 CI->ClassName = Rec->getName();
912 CI->Name = "MCK_" + Rec->getName();
913 CI->ValueName = Rec->getName();
915 CI->ValueName = CI->ValueName + "," + Rec->getName();
919 void AsmMatcherInfo::BuildOperandClasses() {
920 std::vector<Record*> AsmOperands =
921 Records.getAllDerivedDefinitions("AsmOperandClass");
923 // Pre-populate AsmOperandClasses map.
924 for (std::vector<Record*>::iterator it = AsmOperands.begin(),
925 ie = AsmOperands.end(); it != ie; ++it)
926 AsmOperandClasses[*it] = new ClassInfo();
929 for (std::vector<Record*>::iterator it = AsmOperands.begin(),
930 ie = AsmOperands.end(); it != ie; ++it, ++Index) {
931 ClassInfo *CI = AsmOperandClasses[*it];
932 CI->Kind = ClassInfo::UserClass0 + Index;
934 ListInit *Supers = (*it)->getValueAsListInit("SuperClasses");
935 for (unsigned i = 0, e = Supers->getSize(); i != e; ++i) {
936 DefInit *DI = dynamic_cast<DefInit*>(Supers->getElement(i));
938 PrintError((*it)->getLoc(), "Invalid super class reference!");
942 ClassInfo *SC = AsmOperandClasses[DI->getDef()];
944 PrintError((*it)->getLoc(), "Invalid super class reference!");
946 CI->SuperClasses.push_back(SC);
948 CI->ClassName = (*it)->getValueAsString("Name");
949 CI->Name = "MCK_" + CI->ClassName;
950 CI->ValueName = (*it)->getName();
952 // Get or construct the predicate method name.
953 Init *PMName = (*it)->getValueInit("PredicateMethod");
954 if (StringInit *SI = dynamic_cast<StringInit*>(PMName)) {
955 CI->PredicateMethod = SI->getValue();
957 assert(dynamic_cast<UnsetInit*>(PMName) &&
958 "Unexpected PredicateMethod field!");
959 CI->PredicateMethod = "is" + CI->ClassName;
962 // Get or construct the render method name.
963 Init *RMName = (*it)->getValueInit("RenderMethod");
964 if (StringInit *SI = dynamic_cast<StringInit*>(RMName)) {
965 CI->RenderMethod = SI->getValue();
967 assert(dynamic_cast<UnsetInit*>(RMName) &&
968 "Unexpected RenderMethod field!");
969 CI->RenderMethod = "add" + CI->ClassName + "Operands";
972 AsmOperandClasses[*it] = CI;
973 Classes.push_back(CI);
977 AsmMatcherInfo::AsmMatcherInfo(Record *asmParser, CodeGenTarget &target)
978 : AsmParser(asmParser), Target(target),
979 RegisterPrefix(AsmParser->getValueAsString("RegisterPrefix")) {
983 void AsmMatcherInfo::BuildInfo() {
984 // Build information about all of the AssemblerPredicates.
985 std::vector<Record*> AllPredicates =
986 Records.getAllDerivedDefinitions("Predicate");
987 for (unsigned i = 0, e = AllPredicates.size(); i != e; ++i) {
988 Record *Pred = AllPredicates[i];
989 // Ignore predicates that are not intended for the assembler.
990 if (!Pred->getValueAsBit("AssemblerMatcherPredicate"))
993 if (Pred->getName().empty())
994 throw TGError(Pred->getLoc(), "Predicate has no name!");
996 unsigned FeatureNo = SubtargetFeatures.size();
997 SubtargetFeatures[Pred] = new SubtargetFeatureInfo(Pred, FeatureNo);
998 assert(FeatureNo < 32 && "Too many subtarget features!");
1001 StringRef CommentDelimiter = AsmParser->getValueAsString("CommentDelimiter");
1003 // Parse the instructions; we need to do this first so that we can gather the
1004 // singleton register classes.
1005 SmallPtrSet<Record*, 16> SingletonRegisters;
1006 for (CodeGenTarget::inst_iterator I = Target.inst_begin(),
1007 E = Target.inst_end(); I != E; ++I) {
1008 const CodeGenInstruction &CGI = **I;
1010 // If the tblgen -match-prefix option is specified (for tblgen hackers),
1011 // filter the set of instructions we consider.
1012 if (!StringRef(CGI.TheDef->getName()).startswith(MatchPrefix))
1015 // Ignore "codegen only" instructions.
1016 if (CGI.TheDef->getValueAsBit("isCodeGenOnly"))
1019 // Validate the operand list to ensure we can handle this instruction.
1020 for (unsigned i = 0, e = CGI.Operands.size(); i != e; ++i) {
1021 const CGIOperandList::OperandInfo &OI = CGI.Operands[i];
1023 // Validate tied operands.
1024 if (OI.getTiedRegister() != -1) {
1025 // If we have a tied operand that consists of multiple MCOperands, reject
1026 // it. We reject aliases and ignore instructions for now.
1027 if (OI.MINumOperands != 1) {
1028 // FIXME: Should reject these. The ARM backend hits this with $lane
1029 // in a bunch of instructions. It is unclear what the right answer is.
1031 errs() << "warning: '" << CGI.TheDef->getName() << "': "
1032 << "ignoring instruction with multi-operand tied operand '"
1033 << OI.Name << "'\n";
1040 OwningPtr<MatchableInfo> II(new MatchableInfo(CGI));
1042 II->Initialize(*this, SingletonRegisters);
1044 // Ignore instructions which shouldn't be matched and diagnose invalid
1045 // instruction definitions with an error.
1046 if (!II->Validate(CommentDelimiter, true))
1049 // Ignore "Int_*" and "*_Int" instructions, which are internal aliases.
1051 // FIXME: This is a total hack.
1052 if (StringRef(II->TheDef->getName()).startswith("Int_") ||
1053 StringRef(II->TheDef->getName()).endswith("_Int"))
1056 Matchables.push_back(II.take());
1059 // Parse all of the InstAlias definitions and stick them in the list of
1061 std::vector<Record*> AllInstAliases =
1062 Records.getAllDerivedDefinitions("InstAlias");
1063 for (unsigned i = 0, e = AllInstAliases.size(); i != e; ++i) {
1064 CodeGenInstAlias *Alias = new CodeGenInstAlias(AllInstAliases[i], Target);
1066 OwningPtr<MatchableInfo> II(new MatchableInfo(Alias));
1068 II->Initialize(*this, SingletonRegisters);
1070 // Validate the alias definitions.
1071 II->Validate(CommentDelimiter, false);
1073 Matchables.push_back(II.take());
1076 // Build info for the register classes.
1077 BuildRegisterClasses(SingletonRegisters);
1079 // Build info for the user defined assembly operand classes.
1080 BuildOperandClasses();
1082 // Build the information about matchables, now that we have fully formed
1084 for (std::vector<MatchableInfo*>::iterator it = Matchables.begin(),
1085 ie = Matchables.end(); it != ie; ++it) {
1086 MatchableInfo *II = *it;
1088 // Parse the tokens after the mnemonic.
1089 for (unsigned i = 0, e = II->AsmOperands.size(); i != e; ++i) {
1090 MatchableInfo::AsmOperand &Op = II->AsmOperands[i];
1091 StringRef Token = Op.Token;
1093 // Check for singleton registers.
1094 if (Record *RegRecord = II->getSingletonRegisterForAsmOperand(i, *this)) {
1095 Op.Class = RegisterClasses[RegRecord];
1096 assert(Op.Class && Op.Class->Registers.size() == 1 &&
1097 "Unexpected class for singleton register");
1101 // Check for simple tokens.
1102 if (Token[0] != '$') {
1103 Op.Class = getTokenClass(Token);
1107 // Otherwise this is an operand reference.
1108 StringRef OperandName;
1109 if (Token[1] == '{')
1110 OperandName = Token.substr(2, Token.size() - 3);
1112 OperandName = Token.substr(1);
1114 if (II->DefRec.is<const CodeGenInstruction*>())
1115 BuildInstructionOperandReference(II, OperandName, Op);
1117 BuildAliasOperandReference(II, OperandName, Op);
1120 II->BuildResultOperands();
1123 // Reorder classes so that classes preceed super classes.
1124 std::sort(Classes.begin(), Classes.end(), less_ptr<ClassInfo>());
1127 /// BuildInstructionOperandReference - The specified operand is a reference to a
1128 /// named operand such as $src. Resolve the Class and OperandInfo pointers.
1129 void AsmMatcherInfo::
1130 BuildInstructionOperandReference(MatchableInfo *II,
1131 StringRef OperandName,
1132 MatchableInfo::AsmOperand &Op) {
1133 const CodeGenInstruction &CGI = *II->DefRec.get<const CodeGenInstruction*>();
1134 const CGIOperandList &Operands = CGI.Operands;
1136 // Map this token to an operand. FIXME: Move elsewhere.
1138 if (!Operands.hasOperandNamed(OperandName, Idx))
1139 throw TGError(II->TheDef->getLoc(), "error: unable to find operand: '" +
1140 OperandName.str() + "'");
1142 // Set up the operand class.
1143 Op.Class = getOperandClass(Operands[Idx]);
1145 // If the named operand is tied, canonicalize it to the untied operand.
1146 // For example, something like:
1147 // (outs GPR:$dst), (ins GPR:$src)
1148 // with an asmstring of
1150 // we want to canonicalize to:
1152 // so that we know how to provide the $dst operand when filling in the result.
1153 int OITied = Operands[Idx].getTiedRegister();
1155 // The tied operand index is an MIOperand index, find the operand that
1157 for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
1158 if (Operands[i].MIOperandNo == unsigned(OITied)) {
1159 OperandName = Operands[i].Name;
1165 Op.SrcOpName = OperandName;
1168 void AsmMatcherInfo::BuildAliasOperandReference(MatchableInfo *II,
1169 StringRef OperandName,
1170 MatchableInfo::AsmOperand &Op) {
1171 const CodeGenInstAlias &CGA = *II->DefRec.get<const CodeGenInstAlias*>();
1174 // FIXME: This is a total hack, it should not be a copy of
1175 // BuildInstructionOperandReference
1177 const CGIOperandList &Operands = CGA.Operands;
1179 // Map this token to an operand. FIXME: Move elsewhere.
1181 if (!Operands.hasOperandNamed(OperandName, Idx))
1182 throw TGError(II->TheDef->getLoc(), "error: unable to find operand: '" +
1183 OperandName.str() + "'");
1185 // Set up the operand class.
1186 Op.Class = getOperandClass(Operands[Idx]);
1188 // If the named operand is tied, canonicalize it to the untied operand.
1189 // For example, something like:
1190 // (outs GPR:$dst), (ins GPR:$src)
1191 // with an asmstring of
1193 // we want to canonicalize to:
1195 // so that we know how to provide the $dst operand when filling in the result.
1196 int OITied = Operands[Idx].getTiedRegister();
1198 // The tied operand index is an MIOperand index, find the operand that
1200 for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
1201 if (Operands[i].MIOperandNo == unsigned(OITied)) {
1202 OperandName = Operands[i].Name;
1208 Op.SrcOpName = OperandName;
1211 void MatchableInfo::BuildResultOperands() {
1212 for (unsigned i = 0, e = TheOperandList.size(); i != e; ++i) {
1213 const CGIOperandList::OperandInfo &OpInfo = TheOperandList[i];
1215 // If this is a tied operand, just copy from the previously handled operand.
1216 int TiedOp = OpInfo.getTiedRegister();
1218 ResOperands.push_back(ResOperand::getTiedOp(TiedOp, &OpInfo));
1222 // Find out what operand from the asmparser that this MCInst operand comes
1224 int SrcOperand = FindAsmOperandNamed(OpInfo.Name);
1226 if (!OpInfo.Name.empty() && SrcOperand != -1) {
1227 ResOperands.push_back(ResOperand::getRenderedOp(SrcOperand, &OpInfo));
1231 throw TGError(TheDef->getLoc(), "Instruction '" +
1232 TheDef->getName() + "' has operand '" + OpInfo.Name +
1233 "' that doesn't appear in asm string!");
1238 static void EmitConvertToMCInst(CodeGenTarget &Target,
1239 std::vector<MatchableInfo*> &Infos,
1241 // Write the convert function to a separate stream, so we can drop it after
1243 std::string ConvertFnBody;
1244 raw_string_ostream CvtOS(ConvertFnBody);
1246 // Function we have already generated.
1247 std::set<std::string> GeneratedFns;
1249 // Start the unified conversion function.
1250 CvtOS << "static void ConvertToMCInst(ConversionKind Kind, MCInst &Inst, "
1251 << "unsigned Opcode,\n"
1252 << " const SmallVectorImpl<MCParsedAsmOperand*"
1253 << "> &Operands) {\n";
1254 CvtOS << " Inst.setOpcode(Opcode);\n";
1255 CvtOS << " switch (Kind) {\n";
1256 CvtOS << " default:\n";
1258 // Start the enum, which we will generate inline.
1260 OS << "// Unified function for converting operands to MCInst instances.\n\n";
1261 OS << "enum ConversionKind {\n";
1263 // TargetOperandClass - This is the target's operand class, like X86Operand.
1264 std::string TargetOperandClass = Target.getName() + "Operand";
1266 for (std::vector<MatchableInfo*>::const_iterator it = Infos.begin(),
1267 ie = Infos.end(); it != ie; ++it) {
1268 MatchableInfo &II = **it;
1270 // Build the conversion function signature.
1271 std::string Signature = "Convert";
1272 std::string CaseBody;
1273 raw_string_ostream CaseOS(CaseBody);
1275 // Compute the convert enum and the case body.
1276 for (unsigned i = 0, e = II.ResOperands.size(); i != e; ++i) {
1277 const MatchableInfo::ResOperand &OpInfo = II.ResOperands[i];
1279 // Generate code to populate each result operand.
1280 switch (OpInfo.Kind) {
1281 default: assert(0 && "Unknown result operand kind");
1282 case MatchableInfo::ResOperand::RenderAsmOperand: {
1283 // This comes from something we parsed.
1284 MatchableInfo::AsmOperand &Op = II.AsmOperands[OpInfo.AsmOperandNum];
1286 // Registers are always converted the same, don't duplicate the
1287 // conversion function based on them.
1289 if (Op.Class->isRegisterClass())
1292 Signature += Op.Class->ClassName;
1293 Signature += utostr(OpInfo.OpInfo->MINumOperands);
1294 Signature += "_" + itostr(OpInfo.AsmOperandNum);
1296 CaseOS << " ((" << TargetOperandClass << "*)Operands["
1297 << (OpInfo.AsmOperandNum+1) << "])->" << Op.Class->RenderMethod
1298 << "(Inst, " << OpInfo.OpInfo->MINumOperands << ");\n";
1302 case MatchableInfo::ResOperand::TiedOperand: {
1303 // If this operand is tied to a previous one, just copy the MCInst
1304 // operand from the earlier one.We can only tie single MCOperand values.
1305 //assert(OpInfo.OpInfo->MINumOperands == 1 && "Not a singular MCOperand");
1306 unsigned TiedOp = OpInfo.TiedOperandNum;
1307 assert(i > TiedOp && "Tied operand preceeds its target!");
1308 CaseOS << " Inst.addOperand(Inst.getOperand(" << TiedOp << "));\n";
1309 Signature += "__Tie" + utostr(TiedOp);
1315 II.ConversionFnKind = Signature;
1317 // Check if we have already generated this signature.
1318 if (!GeneratedFns.insert(Signature).second)
1321 // If not, emit it now. Add to the enum list.
1322 OS << " " << Signature << ",\n";
1324 CvtOS << " case " << Signature << ":\n";
1325 CvtOS << CaseOS.str();
1326 CvtOS << " return;\n";
1329 // Finish the convert function.
1334 // Finish the enum, and drop the convert function after it.
1336 OS << " NumConversionVariants\n";
1342 /// EmitMatchClassEnumeration - Emit the enumeration for match class kinds.
1343 static void EmitMatchClassEnumeration(CodeGenTarget &Target,
1344 std::vector<ClassInfo*> &Infos,
1346 OS << "namespace {\n\n";
1348 OS << "/// MatchClassKind - The kinds of classes which participate in\n"
1349 << "/// instruction matching.\n";
1350 OS << "enum MatchClassKind {\n";
1351 OS << " InvalidMatchClass = 0,\n";
1352 for (std::vector<ClassInfo*>::iterator it = Infos.begin(),
1353 ie = Infos.end(); it != ie; ++it) {
1354 ClassInfo &CI = **it;
1355 OS << " " << CI.Name << ", // ";
1356 if (CI.Kind == ClassInfo::Token) {
1357 OS << "'" << CI.ValueName << "'\n";
1358 } else if (CI.isRegisterClass()) {
1359 if (!CI.ValueName.empty())
1360 OS << "register class '" << CI.ValueName << "'\n";
1362 OS << "derived register class\n";
1364 OS << "user defined class '" << CI.ValueName << "'\n";
1367 OS << " NumMatchClassKinds\n";
1373 /// EmitClassifyOperand - Emit the function to classify an operand.
1374 static void EmitClassifyOperand(AsmMatcherInfo &Info,
1376 OS << "static MatchClassKind ClassifyOperand(MCParsedAsmOperand *GOp) {\n"
1377 << " " << Info.Target.getName() << "Operand &Operand = *("
1378 << Info.Target.getName() << "Operand*)GOp;\n";
1381 OS << " if (Operand.isToken())\n";
1382 OS << " return MatchTokenString(Operand.getToken());\n\n";
1384 // Classify registers.
1386 // FIXME: Don't hardcode isReg, getReg.
1387 OS << " if (Operand.isReg()) {\n";
1388 OS << " switch (Operand.getReg()) {\n";
1389 OS << " default: return InvalidMatchClass;\n";
1390 for (std::map<Record*, ClassInfo*>::iterator
1391 it = Info.RegisterClasses.begin(), ie = Info.RegisterClasses.end();
1393 OS << " case " << Info.Target.getName() << "::"
1394 << it->first->getName() << ": return " << it->second->Name << ";\n";
1398 // Classify user defined operands.
1399 for (std::vector<ClassInfo*>::iterator it = Info.Classes.begin(),
1400 ie = Info.Classes.end(); it != ie; ++it) {
1401 ClassInfo &CI = **it;
1403 if (!CI.isUserClass())
1406 OS << " // '" << CI.ClassName << "' class";
1407 if (!CI.SuperClasses.empty()) {
1408 OS << ", subclass of ";
1409 for (unsigned i = 0, e = CI.SuperClasses.size(); i != e; ++i) {
1411 OS << "'" << CI.SuperClasses[i]->ClassName << "'";
1412 assert(CI < *CI.SuperClasses[i] && "Invalid class relation!");
1417 OS << " if (Operand." << CI.PredicateMethod << "()) {\n";
1419 // Validate subclass relationships.
1420 if (!CI.SuperClasses.empty()) {
1421 for (unsigned i = 0, e = CI.SuperClasses.size(); i != e; ++i)
1422 OS << " assert(Operand." << CI.SuperClasses[i]->PredicateMethod
1423 << "() && \"Invalid class relationship!\");\n";
1426 OS << " return " << CI.Name << ";\n";
1429 OS << " return InvalidMatchClass;\n";
1433 /// EmitIsSubclass - Emit the subclass predicate function.
1434 static void EmitIsSubclass(CodeGenTarget &Target,
1435 std::vector<ClassInfo*> &Infos,
1437 OS << "/// IsSubclass - Compute whether \\arg A is a subclass of \\arg B.\n";
1438 OS << "static bool IsSubclass(MatchClassKind A, MatchClassKind B) {\n";
1439 OS << " if (A == B)\n";
1440 OS << " return true;\n\n";
1442 OS << " switch (A) {\n";
1443 OS << " default:\n";
1444 OS << " return false;\n";
1445 for (std::vector<ClassInfo*>::iterator it = Infos.begin(),
1446 ie = Infos.end(); it != ie; ++it) {
1447 ClassInfo &A = **it;
1449 if (A.Kind != ClassInfo::Token) {
1450 std::vector<StringRef> SuperClasses;
1451 for (std::vector<ClassInfo*>::iterator it = Infos.begin(),
1452 ie = Infos.end(); it != ie; ++it) {
1453 ClassInfo &B = **it;
1455 if (&A != &B && A.isSubsetOf(B))
1456 SuperClasses.push_back(B.Name);
1459 if (SuperClasses.empty())
1462 OS << "\n case " << A.Name << ":\n";
1464 if (SuperClasses.size() == 1) {
1465 OS << " return B == " << SuperClasses.back() << ";\n";
1469 OS << " switch (B) {\n";
1470 OS << " default: return false;\n";
1471 for (unsigned i = 0, e = SuperClasses.size(); i != e; ++i)
1472 OS << " case " << SuperClasses[i] << ": return true;\n";
1482 /// EmitMatchTokenString - Emit the function to match a token string to the
1483 /// appropriate match class value.
1484 static void EmitMatchTokenString(CodeGenTarget &Target,
1485 std::vector<ClassInfo*> &Infos,
1487 // Construct the match list.
1488 std::vector<StringMatcher::StringPair> Matches;
1489 for (std::vector<ClassInfo*>::iterator it = Infos.begin(),
1490 ie = Infos.end(); it != ie; ++it) {
1491 ClassInfo &CI = **it;
1493 if (CI.Kind == ClassInfo::Token)
1494 Matches.push_back(StringMatcher::StringPair(CI.ValueName,
1495 "return " + CI.Name + ";"));
1498 OS << "static MatchClassKind MatchTokenString(StringRef Name) {\n";
1500 StringMatcher("Name", Matches, OS).Emit();
1502 OS << " return InvalidMatchClass;\n";
1506 /// EmitMatchRegisterName - Emit the function to match a string to the target
1507 /// specific register enum.
1508 static void EmitMatchRegisterName(CodeGenTarget &Target, Record *AsmParser,
1510 // Construct the match list.
1511 std::vector<StringMatcher::StringPair> Matches;
1512 for (unsigned i = 0, e = Target.getRegisters().size(); i != e; ++i) {
1513 const CodeGenRegister &Reg = Target.getRegisters()[i];
1514 if (Reg.TheDef->getValueAsString("AsmName").empty())
1517 Matches.push_back(StringMatcher::StringPair(
1518 Reg.TheDef->getValueAsString("AsmName"),
1519 "return " + utostr(i + 1) + ";"));
1522 OS << "static unsigned MatchRegisterName(StringRef Name) {\n";
1524 StringMatcher("Name", Matches, OS).Emit();
1526 OS << " return 0;\n";
1530 /// EmitSubtargetFeatureFlagEnumeration - Emit the subtarget feature flag
1532 static void EmitSubtargetFeatureFlagEnumeration(AsmMatcherInfo &Info,
1534 OS << "// Flags for subtarget features that participate in "
1535 << "instruction matching.\n";
1536 OS << "enum SubtargetFeatureFlag {\n";
1537 for (std::map<Record*, SubtargetFeatureInfo*>::const_iterator
1538 it = Info.SubtargetFeatures.begin(),
1539 ie = Info.SubtargetFeatures.end(); it != ie; ++it) {
1540 SubtargetFeatureInfo &SFI = *it->second;
1541 OS << " " << SFI.getEnumName() << " = (1 << " << SFI.Index << "),\n";
1543 OS << " Feature_None = 0\n";
1547 /// EmitComputeAvailableFeatures - Emit the function to compute the list of
1548 /// available features given a subtarget.
1549 static void EmitComputeAvailableFeatures(AsmMatcherInfo &Info,
1551 std::string ClassName =
1552 Info.AsmParser->getValueAsString("AsmParserClassName");
1554 OS << "unsigned " << Info.Target.getName() << ClassName << "::\n"
1555 << "ComputeAvailableFeatures(const " << Info.Target.getName()
1556 << "Subtarget *Subtarget) const {\n";
1557 OS << " unsigned Features = 0;\n";
1558 for (std::map<Record*, SubtargetFeatureInfo*>::const_iterator
1559 it = Info.SubtargetFeatures.begin(),
1560 ie = Info.SubtargetFeatures.end(); it != ie; ++it) {
1561 SubtargetFeatureInfo &SFI = *it->second;
1562 OS << " if (" << SFI.TheDef->getValueAsString("CondString")
1564 OS << " Features |= " << SFI.getEnumName() << ";\n";
1566 OS << " return Features;\n";
1570 static std::string GetAliasRequiredFeatures(Record *R,
1571 const AsmMatcherInfo &Info) {
1572 std::vector<Record*> ReqFeatures = R->getValueAsListOfDefs("Predicates");
1574 unsigned NumFeatures = 0;
1575 for (unsigned i = 0, e = ReqFeatures.size(); i != e; ++i) {
1576 SubtargetFeatureInfo *F = Info.getSubtargetFeature(ReqFeatures[i]);
1579 throw TGError(R->getLoc(), "Predicate '" + ReqFeatures[i]->getName() +
1580 "' is not marked as an AssemblerPredicate!");
1585 Result += F->getEnumName();
1589 if (NumFeatures > 1)
1590 Result = '(' + Result + ')';
1594 /// EmitMnemonicAliases - If the target has any MnemonicAlias<> definitions,
1595 /// emit a function for them and return true, otherwise return false.
1596 static bool EmitMnemonicAliases(raw_ostream &OS, const AsmMatcherInfo &Info) {
1597 std::vector<Record*> Aliases =
1598 Records.getAllDerivedDefinitions("MnemonicAlias");
1599 if (Aliases.empty()) return false;
1601 OS << "static void ApplyMnemonicAliases(StringRef &Mnemonic, "
1602 "unsigned Features) {\n";
1604 // Keep track of all the aliases from a mnemonic. Use an std::map so that the
1605 // iteration order of the map is stable.
1606 std::map<std::string, std::vector<Record*> > AliasesFromMnemonic;
1608 for (unsigned i = 0, e = Aliases.size(); i != e; ++i) {
1609 Record *R = Aliases[i];
1610 AliasesFromMnemonic[R->getValueAsString("FromMnemonic")].push_back(R);
1613 // Process each alias a "from" mnemonic at a time, building the code executed
1614 // by the string remapper.
1615 std::vector<StringMatcher::StringPair> Cases;
1616 for (std::map<std::string, std::vector<Record*> >::iterator
1617 I = AliasesFromMnemonic.begin(), E = AliasesFromMnemonic.end();
1619 const std::vector<Record*> &ToVec = I->second;
1621 // Loop through each alias and emit code that handles each case. If there
1622 // are two instructions without predicates, emit an error. If there is one,
1624 std::string MatchCode;
1625 int AliasWithNoPredicate = -1;
1627 for (unsigned i = 0, e = ToVec.size(); i != e; ++i) {
1628 Record *R = ToVec[i];
1629 std::string FeatureMask = GetAliasRequiredFeatures(R, Info);
1631 // If this unconditionally matches, remember it for later and diagnose
1633 if (FeatureMask.empty()) {
1634 if (AliasWithNoPredicate != -1) {
1635 // We can't have two aliases from the same mnemonic with no predicate.
1636 PrintError(ToVec[AliasWithNoPredicate]->getLoc(),
1637 "two MnemonicAliases with the same 'from' mnemonic!");
1638 throw TGError(R->getLoc(), "this is the other MnemonicAlias.");
1641 AliasWithNoPredicate = i;
1645 if (!MatchCode.empty())
1646 MatchCode += "else ";
1647 MatchCode += "if ((Features & " + FeatureMask + ") == "+FeatureMask+")\n";
1648 MatchCode += " Mnemonic = \"" +R->getValueAsString("ToMnemonic")+"\";\n";
1651 if (AliasWithNoPredicate != -1) {
1652 Record *R = ToVec[AliasWithNoPredicate];
1653 if (!MatchCode.empty())
1654 MatchCode += "else\n ";
1655 MatchCode += "Mnemonic = \"" + R->getValueAsString("ToMnemonic")+"\";\n";
1658 MatchCode += "return;";
1660 Cases.push_back(std::make_pair(I->first, MatchCode));
1664 StringMatcher("Mnemonic", Cases, OS).Emit();
1670 void AsmMatcherEmitter::run(raw_ostream &OS) {
1671 CodeGenTarget Target;
1672 Record *AsmParser = Target.getAsmParser();
1673 std::string ClassName = AsmParser->getValueAsString("AsmParserClassName");
1675 // Compute the information on the instructions to match.
1676 AsmMatcherInfo Info(AsmParser, Target);
1679 // Sort the instruction table using the partial order on classes. We use
1680 // stable_sort to ensure that ambiguous instructions are still
1681 // deterministically ordered.
1682 std::stable_sort(Info.Matchables.begin(), Info.Matchables.end(),
1683 less_ptr<MatchableInfo>());
1685 DEBUG_WITH_TYPE("instruction_info", {
1686 for (std::vector<MatchableInfo*>::iterator
1687 it = Info.Matchables.begin(), ie = Info.Matchables.end();
1692 // Check for ambiguous matchables.
1693 DEBUG_WITH_TYPE("ambiguous_instrs", {
1694 unsigned NumAmbiguous = 0;
1695 for (unsigned i = 0, e = Info.Matchables.size(); i != e; ++i) {
1696 for (unsigned j = i + 1; j != e; ++j) {
1697 MatchableInfo &A = *Info.Matchables[i];
1698 MatchableInfo &B = *Info.Matchables[j];
1700 if (A.CouldMatchAmiguouslyWith(B)) {
1701 errs() << "warning: ambiguous matchables:\n";
1703 errs() << "\nis incomparable with:\n";
1711 errs() << "warning: " << NumAmbiguous
1712 << " ambiguous matchables!\n";
1715 // Write the output.
1717 EmitSourceFileHeader("Assembly Matcher Source Fragment", OS);
1719 // Information for the class declaration.
1720 OS << "\n#ifdef GET_ASSEMBLER_HEADER\n";
1721 OS << "#undef GET_ASSEMBLER_HEADER\n";
1722 OS << " // This should be included into the middle of the declaration of \n";
1723 OS << " // your subclasses implementation of TargetAsmParser.\n";
1724 OS << " unsigned ComputeAvailableFeatures(const " <<
1725 Target.getName() << "Subtarget *Subtarget) const;\n";
1726 OS << " enum MatchResultTy {\n";
1727 OS << " Match_Success, Match_MnemonicFail, Match_InvalidOperand,\n";
1728 OS << " Match_MissingFeature\n";
1730 OS << " MatchResultTy MatchInstructionImpl(const "
1731 << "SmallVectorImpl<MCParsedAsmOperand*>"
1732 << " &Operands, MCInst &Inst, unsigned &ErrorInfo);\n\n";
1733 OS << "#endif // GET_ASSEMBLER_HEADER_INFO\n\n";
1738 OS << "\n#ifdef GET_REGISTER_MATCHER\n";
1739 OS << "#undef GET_REGISTER_MATCHER\n\n";
1741 // Emit the subtarget feature enumeration.
1742 EmitSubtargetFeatureFlagEnumeration(Info, OS);
1744 // Emit the function to match a register name to number.
1745 EmitMatchRegisterName(Target, AsmParser, OS);
1747 OS << "#endif // GET_REGISTER_MATCHER\n\n";
1750 OS << "\n#ifdef GET_MATCHER_IMPLEMENTATION\n";
1751 OS << "#undef GET_MATCHER_IMPLEMENTATION\n\n";
1753 // Generate the function that remaps for mnemonic aliases.
1754 bool HasMnemonicAliases = EmitMnemonicAliases(OS, Info);
1756 // Generate the unified function to convert operands into an MCInst.
1757 EmitConvertToMCInst(Target, Info.Matchables, OS);
1759 // Emit the enumeration for classes which participate in matching.
1760 EmitMatchClassEnumeration(Target, Info.Classes, OS);
1762 // Emit the routine to match token strings to their match class.
1763 EmitMatchTokenString(Target, Info.Classes, OS);
1765 // Emit the routine to classify an operand.
1766 EmitClassifyOperand(Info, OS);
1768 // Emit the subclass predicate routine.
1769 EmitIsSubclass(Target, Info.Classes, OS);
1771 // Emit the available features compute function.
1772 EmitComputeAvailableFeatures(Info, OS);
1775 size_t MaxNumOperands = 0;
1776 for (std::vector<MatchableInfo*>::const_iterator it =
1777 Info.Matchables.begin(), ie = Info.Matchables.end();
1779 MaxNumOperands = std::max(MaxNumOperands, (*it)->AsmOperands.size());
1782 // Emit the static match table; unused classes get initalized to 0 which is
1783 // guaranteed to be InvalidMatchClass.
1785 // FIXME: We can reduce the size of this table very easily. First, we change
1786 // it so that store the kinds in separate bit-fields for each index, which
1787 // only needs to be the max width used for classes at that index (we also need
1788 // to reject based on this during classification). If we then make sure to
1789 // order the match kinds appropriately (putting mnemonics last), then we
1790 // should only end up using a few bits for each class, especially the ones
1791 // following the mnemonic.
1792 OS << "namespace {\n";
1793 OS << " struct MatchEntry {\n";
1794 OS << " unsigned Opcode;\n";
1795 OS << " const char *Mnemonic;\n";
1796 OS << " ConversionKind ConvertFn;\n";
1797 OS << " MatchClassKind Classes[" << MaxNumOperands << "];\n";
1798 OS << " unsigned RequiredFeatures;\n";
1801 OS << "// Predicate for searching for an opcode.\n";
1802 OS << " struct LessOpcode {\n";
1803 OS << " bool operator()(const MatchEntry &LHS, StringRef RHS) {\n";
1804 OS << " return StringRef(LHS.Mnemonic) < RHS;\n";
1806 OS << " bool operator()(StringRef LHS, const MatchEntry &RHS) {\n";
1807 OS << " return LHS < StringRef(RHS.Mnemonic);\n";
1809 OS << " bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) {\n";
1810 OS << " return StringRef(LHS.Mnemonic) < StringRef(RHS.Mnemonic);\n";
1814 OS << "} // end anonymous namespace.\n\n";
1816 OS << "static const MatchEntry MatchTable["
1817 << Info.Matchables.size() << "] = {\n";
1819 for (std::vector<MatchableInfo*>::const_iterator it =
1820 Info.Matchables.begin(), ie = Info.Matchables.end();
1822 MatchableInfo &II = **it;
1824 OS << " { " << Target.getName() << "::" << II.ResultInst->TheDef->getName()
1825 << ", \"" << II.Mnemonic << "\""
1826 << ", " << II.ConversionFnKind << ", { ";
1827 for (unsigned i = 0, e = II.AsmOperands.size(); i != e; ++i) {
1828 MatchableInfo::AsmOperand &Op = II.AsmOperands[i];
1831 OS << Op.Class->Name;
1835 // Write the required features mask.
1836 if (!II.RequiredFeatures.empty()) {
1837 for (unsigned i = 0, e = II.RequiredFeatures.size(); i != e; ++i) {
1839 OS << II.RequiredFeatures[i]->getEnumName();
1849 // Finally, build the match function.
1850 OS << Target.getName() << ClassName << "::MatchResultTy "
1851 << Target.getName() << ClassName << "::\n"
1852 << "MatchInstructionImpl(const SmallVectorImpl<MCParsedAsmOperand*>"
1854 OS << " MCInst &Inst, unsigned &ErrorInfo) {\n";
1856 // Emit code to get the available features.
1857 OS << " // Get the current feature set.\n";
1858 OS << " unsigned AvailableFeatures = getAvailableFeatures();\n\n";
1860 OS << " // Get the instruction mnemonic, which is the first token.\n";
1861 OS << " StringRef Mnemonic = ((" << Target.getName()
1862 << "Operand*)Operands[0])->getToken();\n\n";
1864 if (HasMnemonicAliases) {
1865 OS << " // Process all MnemonicAliases to remap the mnemonic.\n";
1866 OS << " ApplyMnemonicAliases(Mnemonic, AvailableFeatures);\n\n";
1869 // Emit code to compute the class list for this operand vector.
1870 OS << " // Eliminate obvious mismatches.\n";
1871 OS << " if (Operands.size() > " << (MaxNumOperands+1) << ") {\n";
1872 OS << " ErrorInfo = " << (MaxNumOperands+1) << ";\n";
1873 OS << " return Match_InvalidOperand;\n";
1876 OS << " // Compute the class list for this operand vector.\n";
1877 OS << " MatchClassKind Classes[" << MaxNumOperands << "];\n";
1878 OS << " for (unsigned i = 1, e = Operands.size(); i != e; ++i) {\n";
1879 OS << " Classes[i-1] = ClassifyOperand(Operands[i]);\n\n";
1881 OS << " // Check for invalid operands before matching.\n";
1882 OS << " if (Classes[i-1] == InvalidMatchClass) {\n";
1883 OS << " ErrorInfo = i;\n";
1884 OS << " return Match_InvalidOperand;\n";
1888 OS << " // Mark unused classes.\n";
1889 OS << " for (unsigned i = Operands.size()-1, e = " << MaxNumOperands << "; "
1890 << "i != e; ++i)\n";
1891 OS << " Classes[i] = InvalidMatchClass;\n\n";
1893 OS << " // Some state to try to produce better error messages.\n";
1894 OS << " bool HadMatchOtherThanFeatures = false;\n\n";
1895 OS << " // Set ErrorInfo to the operand that mismatches if it is \n";
1896 OS << " // wrong for all instances of the instruction.\n";
1897 OS << " ErrorInfo = ~0U;\n";
1899 // Emit code to search the table.
1900 OS << " // Search the table.\n";
1901 OS << " std::pair<const MatchEntry*, const MatchEntry*> MnemonicRange =\n";
1902 OS << " std::equal_range(MatchTable, MatchTable+"
1903 << Info.Matchables.size() << ", Mnemonic, LessOpcode());\n\n";
1905 OS << " // Return a more specific error code if no mnemonics match.\n";
1906 OS << " if (MnemonicRange.first == MnemonicRange.second)\n";
1907 OS << " return Match_MnemonicFail;\n\n";
1909 OS << " for (const MatchEntry *it = MnemonicRange.first, "
1910 << "*ie = MnemonicRange.second;\n";
1911 OS << " it != ie; ++it) {\n";
1913 OS << " // equal_range guarantees that instruction mnemonic matches.\n";
1914 OS << " assert(Mnemonic == it->Mnemonic);\n";
1916 // Emit check that the subclasses match.
1917 OS << " bool OperandsValid = true;\n";
1918 OS << " for (unsigned i = 0; i != " << MaxNumOperands << "; ++i) {\n";
1919 OS << " if (IsSubclass(Classes[i], it->Classes[i]))\n";
1920 OS << " continue;\n";
1921 OS << " // If this operand is broken for all of the instances of this\n";
1922 OS << " // mnemonic, keep track of it so we can report loc info.\n";
1923 OS << " if (it == MnemonicRange.first || ErrorInfo == i+1)\n";
1924 OS << " ErrorInfo = i+1;\n";
1926 OS << " ErrorInfo = ~0U;";
1927 OS << " // Otherwise, just reject this instance of the mnemonic.\n";
1928 OS << " OperandsValid = false;\n";
1932 OS << " if (!OperandsValid) continue;\n";
1934 // Emit check that the required features are available.
1935 OS << " if ((AvailableFeatures & it->RequiredFeatures) "
1936 << "!= it->RequiredFeatures) {\n";
1937 OS << " HadMatchOtherThanFeatures = true;\n";
1938 OS << " continue;\n";
1942 OS << " ConvertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);\n";
1944 // Call the post-processing function, if used.
1945 std::string InsnCleanupFn =
1946 AsmParser->getValueAsString("AsmParserInstCleanup");
1947 if (!InsnCleanupFn.empty())
1948 OS << " " << InsnCleanupFn << "(Inst);\n";
1950 OS << " return Match_Success;\n";
1953 OS << " // Okay, we had no match. Try to return a useful error code.\n";
1954 OS << " if (HadMatchOtherThanFeatures) return Match_MissingFeature;\n";
1955 OS << " return Match_InvalidOperand;\n";
1958 OS << "#endif // GET_MATCHER_IMPLEMENTATION\n\n";