1 //===- AsmWriterEmitter.cpp - Generate an assembly writer -----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This tablegen backend is emits an assembly printer for the current target.
11 // Note that this is currently fairly skeletal, but will grow over time.
13 //===----------------------------------------------------------------------===//
15 #include "AsmWriterEmitter.h"
16 #include "CodeGenTarget.h"
18 #include "llvm/ADT/StringExtras.h"
19 #include "llvm/Support/Debug.h"
20 #include "llvm/Support/MathExtras.h"
25 static bool isIdentChar(char C) {
26 return (C >= 'a' && C <= 'z') ||
27 (C >= 'A' && C <= 'Z') ||
28 (C >= '0' && C <= '9') ||
33 struct AsmWriterOperand {
34 enum { isLiteralTextOperand, isMachineInstrOperand } OperandType;
36 /// Str - For isLiteralTextOperand, this IS the literal text. For
37 /// isMachineInstrOperand, this is the PrinterMethodName for the operand.
40 /// MiOpNo - For isMachineInstrOperand, this is the operand number of the
41 /// machine instruction.
44 /// MiModifier - For isMachineInstrOperand, this is the modifier string for
45 /// an operand, specified with syntax like ${opname:modifier}.
46 std::string MiModifier;
48 AsmWriterOperand(const std::string &LitStr)
49 : OperandType(isLiteralTextOperand), Str(LitStr) {}
51 AsmWriterOperand(const std::string &Printer, unsigned OpNo,
52 const std::string &Modifier)
53 : OperandType(isMachineInstrOperand), Str(Printer), MIOpNo(OpNo),
54 MiModifier(Modifier) {}
56 bool operator!=(const AsmWriterOperand &Other) const {
57 if (OperandType != Other.OperandType || Str != Other.Str) return true;
58 if (OperandType == isMachineInstrOperand)
59 return MIOpNo != Other.MIOpNo || MiModifier != Other.MiModifier;
62 bool operator==(const AsmWriterOperand &Other) const {
63 return !operator!=(Other);
66 /// getCode - Return the code that prints this operand.
67 std::string getCode() const;
72 struct AsmWriterInst {
73 std::vector<AsmWriterOperand> Operands;
74 const CodeGenInstruction *CGI;
76 AsmWriterInst(const CodeGenInstruction &CGI, unsigned Variant);
78 /// MatchesAllButOneOp - If this instruction is exactly identical to the
79 /// specified instruction except for one differing operand, return the
80 /// differing operand number. Otherwise return ~0.
81 unsigned MatchesAllButOneOp(const AsmWriterInst &Other) const;
84 void AddLiteralString(const std::string &Str) {
85 // If the last operand was already a literal text string, append this to
86 // it, otherwise add a new operand.
87 if (!Operands.empty() &&
88 Operands.back().OperandType == AsmWriterOperand::isLiteralTextOperand)
89 Operands.back().Str.append(Str);
91 Operands.push_back(AsmWriterOperand(Str));
97 std::string AsmWriterOperand::getCode() const {
98 if (OperandType == isLiteralTextOperand)
99 return "O << \"" + Str + "\"; ";
101 std::string Result = Str + "(MI";
103 Result += ", " + utostr(MIOpNo);
104 if (!MiModifier.empty())
105 Result += ", \"" + MiModifier + '"';
106 return Result + "); ";
110 /// ParseAsmString - Parse the specified Instruction's AsmString into this
113 AsmWriterInst::AsmWriterInst(const CodeGenInstruction &CGI, unsigned Variant) {
115 unsigned CurVariant = ~0U; // ~0 if we are outside a {.|.|.} region, other #.
117 // NOTE: Any extensions to this code need to be mirrored in the
118 // AsmPrinter::printInlineAsm code that executes as compile time (assuming
119 // that inline asm strings should also get the new feature)!
120 const std::string &AsmString = CGI.AsmString;
121 std::string::size_type LastEmitted = 0;
122 while (LastEmitted != AsmString.size()) {
123 std::string::size_type DollarPos =
124 AsmString.find_first_of("${|}", LastEmitted);
125 if (DollarPos == std::string::npos) DollarPos = AsmString.size();
127 // Emit a constant string fragment.
128 if (DollarPos != LastEmitted) {
129 // TODO: this should eventually handle escaping.
130 if (CurVariant == Variant || CurVariant == ~0U)
131 AddLiteralString(std::string(AsmString.begin()+LastEmitted,
132 AsmString.begin()+DollarPos));
133 LastEmitted = DollarPos;
134 } else if (AsmString[DollarPos] == '{') {
135 if (CurVariant != ~0U)
136 throw "Nested variants found for instruction '" +
137 CGI.TheDef->getName() + "'!";
138 LastEmitted = DollarPos+1;
139 CurVariant = 0; // We are now inside of the variant!
140 } else if (AsmString[DollarPos] == '|') {
141 if (CurVariant == ~0U)
142 throw "'|' character found outside of a variant in instruction '"
143 + CGI.TheDef->getName() + "'!";
146 } else if (AsmString[DollarPos] == '}') {
147 if (CurVariant == ~0U)
148 throw "'}' character found outside of a variant in instruction '"
149 + CGI.TheDef->getName() + "'!";
152 } else if (DollarPos+1 != AsmString.size() &&
153 AsmString[DollarPos+1] == '$') {
154 if (CurVariant == Variant || CurVariant == ~0U)
155 AddLiteralString("$"); // "$$" -> $
156 LastEmitted = DollarPos+2;
158 // Get the name of the variable.
159 std::string::size_type VarEnd = DollarPos+1;
161 // handle ${foo}bar as $foo by detecting whether the character following
162 // the dollar sign is a curly brace. If so, advance VarEnd and DollarPos
163 // so the variable name does not contain the leading curly brace.
164 bool hasCurlyBraces = false;
165 if (VarEnd < AsmString.size() && '{' == AsmString[VarEnd]) {
166 hasCurlyBraces = true;
171 while (VarEnd < AsmString.size() && isIdentChar(AsmString[VarEnd]))
173 std::string VarName(AsmString.begin()+DollarPos+1,
174 AsmString.begin()+VarEnd);
176 // Modifier - Support ${foo:modifier} syntax, where "modifier" is passed
177 // into printOperand. Also support ${:feature}, which is passed into
179 std::string Modifier;
181 // In order to avoid starting the next string at the terminating curly
182 // brace, advance the end position past it if we found an opening curly
184 if (hasCurlyBraces) {
185 if (VarEnd >= AsmString.size())
186 throw "Reached end of string before terminating curly brace in '"
187 + CGI.TheDef->getName() + "'";
189 // Look for a modifier string.
190 if (AsmString[VarEnd] == ':') {
192 if (VarEnd >= AsmString.size())
193 throw "Reached end of string before terminating curly brace in '"
194 + CGI.TheDef->getName() + "'";
196 unsigned ModifierStart = VarEnd;
197 while (VarEnd < AsmString.size() && isIdentChar(AsmString[VarEnd]))
199 Modifier = std::string(AsmString.begin()+ModifierStart,
200 AsmString.begin()+VarEnd);
201 if (Modifier.empty())
202 throw "Bad operand modifier name in '"+ CGI.TheDef->getName() + "'";
205 if (AsmString[VarEnd] != '}')
206 throw "Variable name beginning with '{' did not end with '}' in '"
207 + CGI.TheDef->getName() + "'";
210 if (VarName.empty() && Modifier.empty())
211 throw "Stray '$' in '" + CGI.TheDef->getName() +
212 "' asm string, maybe you want $$?";
214 if (VarName.empty()) {
215 // Just a modifier, pass this into printSpecial.
216 Operands.push_back(AsmWriterOperand("printSpecial", ~0U, Modifier));
218 // Otherwise, normal operand.
219 unsigned OpNo = CGI.getOperandNamed(VarName);
220 CodeGenInstruction::OperandInfo OpInfo = CGI.OperandList[OpNo];
222 // If this is a two-address instruction, verify the second operand isn't
224 unsigned MIOp = OpInfo.MIOperandNo;
225 if (CGI.isTwoAddress && MIOp == 1)
226 throw "Should refer to operand #0 instead of #1 for two-address"
227 " instruction '" + CGI.TheDef->getName() + "'!";
229 if (CurVariant == Variant || CurVariant == ~0U)
230 Operands.push_back(AsmWriterOperand(OpInfo.PrinterMethodName, MIOp,
233 LastEmitted = VarEnd;
237 AddLiteralString("\\n");
240 /// MatchesAllButOneOp - If this instruction is exactly identical to the
241 /// specified instruction except for one differing operand, return the differing
242 /// operand number. If more than one operand mismatches, return ~1, otherwise
243 /// if the instructions are identical return ~0.
244 unsigned AsmWriterInst::MatchesAllButOneOp(const AsmWriterInst &Other)const{
245 if (Operands.size() != Other.Operands.size()) return ~1;
247 unsigned MismatchOperand = ~0U;
248 for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
249 if (Operands[i] != Other.Operands[i])
250 if (MismatchOperand != ~0U) // Already have one mismatch?
255 return MismatchOperand;
258 static void PrintCases(std::vector<std::pair<std::string,
259 AsmWriterOperand> > &OpsToPrint, std::ostream &O) {
260 O << " case " << OpsToPrint.back().first << ": ";
261 AsmWriterOperand TheOp = OpsToPrint.back().second;
262 OpsToPrint.pop_back();
264 // Check to see if any other operands are identical in this list, and if so,
265 // emit a case label for them.
266 for (unsigned i = OpsToPrint.size(); i != 0; --i)
267 if (OpsToPrint[i-1].second == TheOp) {
268 O << "\n case " << OpsToPrint[i-1].first << ": ";
269 OpsToPrint.erase(OpsToPrint.begin()+i-1);
272 // Finally, emit the code.
273 O << TheOp.getCode();
278 /// EmitInstructions - Emit the last instruction in the vector and any other
279 /// instructions that are suitably similar to it.
280 static void EmitInstructions(std::vector<AsmWriterInst> &Insts,
282 AsmWriterInst FirstInst = Insts.back();
285 std::vector<AsmWriterInst> SimilarInsts;
286 unsigned DifferingOperand = ~0;
287 for (unsigned i = Insts.size(); i != 0; --i) {
288 unsigned DiffOp = Insts[i-1].MatchesAllButOneOp(FirstInst);
290 if (DifferingOperand == ~0U) // First match!
291 DifferingOperand = DiffOp;
293 // If this differs in the same operand as the rest of the instructions in
294 // this class, move it to the SimilarInsts list.
295 if (DifferingOperand == DiffOp || DiffOp == ~0U) {
296 SimilarInsts.push_back(Insts[i-1]);
297 Insts.erase(Insts.begin()+i-1);
302 O << " case " << FirstInst.CGI->Namespace << "::"
303 << FirstInst.CGI->TheDef->getName() << ":\n";
304 for (unsigned i = 0, e = SimilarInsts.size(); i != e; ++i)
305 O << " case " << SimilarInsts[i].CGI->Namespace << "::"
306 << SimilarInsts[i].CGI->TheDef->getName() << ":\n";
307 for (unsigned i = 0, e = FirstInst.Operands.size(); i != e; ++i) {
308 if (i != DifferingOperand) {
309 // If the operand is the same for all instructions, just print it.
310 O << " " << FirstInst.Operands[i].getCode();
312 // If this is the operand that varies between all of the instructions,
313 // emit a switch for just this operand now.
314 O << " switch (MI->getOpcode()) {\n";
315 std::vector<std::pair<std::string, AsmWriterOperand> > OpsToPrint;
316 OpsToPrint.push_back(std::make_pair(FirstInst.CGI->Namespace + "::" +
317 FirstInst.CGI->TheDef->getName(),
318 FirstInst.Operands[i]));
320 for (unsigned si = 0, e = SimilarInsts.size(); si != e; ++si) {
321 AsmWriterInst &AWI = SimilarInsts[si];
322 OpsToPrint.push_back(std::make_pair(AWI.CGI->Namespace+"::"+
323 AWI.CGI->TheDef->getName(),
326 std::reverse(OpsToPrint.begin(), OpsToPrint.end());
327 while (!OpsToPrint.empty())
328 PrintCases(OpsToPrint, O);
337 void AsmWriterEmitter::
338 FindUniqueOperandCommands(std::vector<std::string> &UniqueOperandCommands,
339 std::vector<unsigned> &InstIdxs,
340 std::vector<unsigned> &InstOpsUsed) const {
341 InstIdxs.assign(NumberedInstructions.size(), ~0U);
343 // This vector parallels UniqueOperandCommands, keeping track of which
344 // instructions each case are used for. It is a comma separated string of
346 std::vector<std::string> InstrsForCase;
347 InstrsForCase.resize(UniqueOperandCommands.size());
348 InstOpsUsed.assign(UniqueOperandCommands.size(), 0);
350 for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i) {
351 const AsmWriterInst *Inst = getAsmWriterInstByID(i);
352 if (Inst == 0) continue; // PHI, INLINEASM, etc.
355 if (Inst->Operands.empty())
356 continue; // Instruction already done.
358 Command = " " + Inst->Operands[0].getCode() + "\n";
360 // If this is the last operand, emit a return.
361 if (Inst->Operands.size() == 1)
362 Command += " return true;\n";
364 // Check to see if we already have 'Command' in UniqueOperandCommands.
366 bool FoundIt = false;
367 for (unsigned idx = 0, e = UniqueOperandCommands.size(); idx != e; ++idx)
368 if (UniqueOperandCommands[idx] == Command) {
370 InstrsForCase[idx] += ", ";
371 InstrsForCase[idx] += Inst->CGI->TheDef->getName();
376 InstIdxs[i] = UniqueOperandCommands.size();
377 UniqueOperandCommands.push_back(Command);
378 InstrsForCase.push_back(Inst->CGI->TheDef->getName());
380 // This command matches one operand so far.
381 InstOpsUsed.push_back(1);
385 // For each entry of UniqueOperandCommands, there is a set of instructions
386 // that uses it. If the next command of all instructions in the set are
387 // identical, fold it into the command.
388 for (unsigned CommandIdx = 0, e = UniqueOperandCommands.size();
389 CommandIdx != e; ++CommandIdx) {
391 for (unsigned Op = 1; ; ++Op) {
392 // Scan for the first instruction in the set.
393 std::vector<unsigned>::iterator NIT =
394 std::find(InstIdxs.begin(), InstIdxs.end(), CommandIdx);
395 if (NIT == InstIdxs.end()) break; // No commonality.
397 // If this instruction has no more operands, we isn't anything to merge
398 // into this command.
399 const AsmWriterInst *FirstInst =
400 getAsmWriterInstByID(NIT-InstIdxs.begin());
401 if (!FirstInst || FirstInst->Operands.size() == Op)
404 // Otherwise, scan to see if all of the other instructions in this command
405 // set share the operand.
408 for (NIT = std::find(NIT+1, InstIdxs.end(), CommandIdx);
409 NIT != InstIdxs.end();
410 NIT = std::find(NIT+1, InstIdxs.end(), CommandIdx)) {
411 // Okay, found another instruction in this command set. If the operand
412 // matches, we're ok, otherwise bail out.
413 const AsmWriterInst *OtherInst =
414 getAsmWriterInstByID(NIT-InstIdxs.begin());
415 if (!OtherInst || OtherInst->Operands.size() == Op ||
416 OtherInst->Operands[Op] != FirstInst->Operands[Op]) {
423 // Okay, everything in this command set has the same next operand. Add it
424 // to UniqueOperandCommands and remember that it was consumed.
425 std::string Command = " " + FirstInst->Operands[Op].getCode() + "\n";
427 // If this is the last operand, emit a return after the code.
428 if (FirstInst->Operands.size() == Op+1)
429 Command += " return true;\n";
431 UniqueOperandCommands[CommandIdx] += Command;
432 InstOpsUsed[CommandIdx]++;
436 // Prepend some of the instructions each case is used for onto the case val.
437 for (unsigned i = 0, e = InstrsForCase.size(); i != e; ++i) {
438 std::string Instrs = InstrsForCase[i];
439 if (Instrs.size() > 70) {
440 Instrs.erase(Instrs.begin()+70, Instrs.end());
445 UniqueOperandCommands[i] = " // " + Instrs + "\n" +
446 UniqueOperandCommands[i];
452 void AsmWriterEmitter::run(std::ostream &O) {
453 EmitSourceFileHeader("Assembly Writer Source Fragment", O);
455 CodeGenTarget Target;
456 Record *AsmWriter = Target.getAsmWriter();
457 std::string ClassName = AsmWriter->getValueAsString("AsmWriterClassName");
458 unsigned Variant = AsmWriter->getValueAsInt("Variant");
461 "/// printInstruction - This method is automatically generated by tablegen\n"
462 "/// from the instruction set description. This method returns true if the\n"
463 "/// machine instruction was sufficiently described to print it, otherwise\n"
464 "/// it returns false.\n"
465 "bool " << Target.getName() << ClassName
466 << "::printInstruction(const MachineInstr *MI) {\n";
468 std::vector<AsmWriterInst> Instructions;
470 for (CodeGenTarget::inst_iterator I = Target.inst_begin(),
471 E = Target.inst_end(); I != E; ++I)
472 if (!I->second.AsmString.empty())
473 Instructions.push_back(AsmWriterInst(I->second, Variant));
475 // Get the instruction numbering.
476 Target.getInstructionsByEnumValue(NumberedInstructions);
478 // Compute the CodeGenInstruction -> AsmWriterInst mapping. Note that not
479 // all machine instructions are necessarily being printed, so there may be
480 // target instructions not in this map.
481 for (unsigned i = 0, e = Instructions.size(); i != e; ++i)
482 CGIAWIMap.insert(std::make_pair(Instructions[i].CGI, &Instructions[i]));
484 // Build an aggregate string, and build a table of offsets into it.
485 std::map<std::string, unsigned> StringOffset;
486 std::string AggregateString;
487 AggregateString += "\0\0";
489 /// OpcodeInfo - Theis encodes the index of the string to use for the first
490 /// chunk of the output as well as indices used for operand printing.
491 std::vector<unsigned> OpcodeInfo;
493 unsigned MaxStringIdx = 0;
494 for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i) {
495 AsmWriterInst *AWI = CGIAWIMap[NumberedInstructions[i]];
498 // Something not handled by the asmwriter printer.
500 } else if (AWI->Operands[0].OperandType !=
501 AsmWriterOperand::isLiteralTextOperand ||
502 AWI->Operands[0].Str.empty()) {
503 // Something handled by the asmwriter printer, but with no leading string.
506 unsigned &Entry = StringOffset[AWI->Operands[0].Str];
508 // Add the string to the aggregate if this is the first time found.
509 MaxStringIdx = Entry = AggregateString.size();
510 std::string Str = AWI->Operands[0].Str;
512 AggregateString += Str;
513 AggregateString += '\0';
517 // Nuke the string from the operand list. It is now handled!
518 AWI->Operands.erase(AWI->Operands.begin());
520 OpcodeInfo.push_back(Idx);
523 // Figure out how many bits we used for the string index.
524 unsigned AsmStrBits = Log2_32_Ceil(MaxStringIdx);
526 // To reduce code size, we compactify common instructions into a few bits
527 // in the opcode-indexed table.
528 unsigned BitsLeft = 32-AsmStrBits;
530 std::vector<std::vector<std::string> > TableDrivenOperandPrinters;
534 std::vector<std::string> UniqueOperandCommands;
536 // For the first operand check, add a default value for instructions with
537 // just opcode strings to use.
539 UniqueOperandCommands.push_back(" return true;\n");
543 std::vector<unsigned> InstIdxs;
544 std::vector<unsigned> NumInstOpsHandled;
545 FindUniqueOperandCommands(UniqueOperandCommands, InstIdxs,
548 // If we ran out of operands to print, we're done.
549 if (UniqueOperandCommands.empty()) break;
551 // Compute the number of bits we need to represent these cases, this is
552 // ceil(log2(numentries)).
553 unsigned NumBits = Log2_32_Ceil(UniqueOperandCommands.size());
555 // If we don't have enough bits for this operand, don't include it.
556 if (NumBits > BitsLeft) {
557 DEBUG(std::cerr << "Not enough bits to densely encode " << NumBits
562 // Otherwise, we can include this in the initial lookup table. Add it in.
564 for (unsigned i = 0, e = InstIdxs.size(); i != e; ++i)
565 if (InstIdxs[i] != ~0U)
566 OpcodeInfo[i] |= InstIdxs[i] << (BitsLeft+AsmStrBits);
568 // Remove the info about this operand.
569 for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i) {
570 if (AsmWriterInst *Inst = getAsmWriterInstByID(i))
571 if (!Inst->Operands.empty()) {
572 unsigned NumOps = NumInstOpsHandled[InstIdxs[i]];
573 assert(NumOps <= Inst->Operands.size() &&
574 "Can't remove this many ops!");
575 Inst->Operands.erase(Inst->Operands.begin(),
576 Inst->Operands.begin()+NumOps);
580 // Remember the handlers for this set of operands.
581 TableDrivenOperandPrinters.push_back(UniqueOperandCommands);
586 O<<" static const unsigned OpInfo[] = {\n";
587 for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i) {
588 O << " " << OpcodeInfo[i] << "U,\t// "
589 << NumberedInstructions[i]->TheDef->getName() << "\n";
591 // Add a dummy entry so the array init doesn't end with a comma.
595 // Emit the string itself.
596 O << " const char *AsmStrs = \n \"";
597 unsigned CharsPrinted = 0;
598 EscapeString(AggregateString);
599 for (unsigned i = 0, e = AggregateString.size(); i != e; ++i) {
600 if (CharsPrinted > 70) {
604 O << AggregateString[i];
607 // Print escape sequences all together.
608 if (AggregateString[i] == '\\') {
609 assert(i+1 < AggregateString.size() && "Incomplete escape sequence!");
610 if (isdigit(AggregateString[i+1])) {
611 assert(isdigit(AggregateString[i+2]) && isdigit(AggregateString[i+3]) &&
612 "Expected 3 digit octal escape!");
613 O << AggregateString[++i];
614 O << AggregateString[++i];
615 O << AggregateString[++i];
618 O << AggregateString[++i];
625 O << " if (MI->getOpcode() == TargetInstrInfo::INLINEASM) {\n"
626 << " printInlineAsm(MI);\n"
630 O << " // Emit the opcode for the instruction.\n"
631 << " unsigned Bits = OpInfo[MI->getOpcode()];\n"
632 << " if (Bits == 0) return false;\n"
633 << " O << AsmStrs+(Bits & " << (1 << AsmStrBits)-1 << ");\n\n";
635 // Output the table driven operand information.
636 BitsLeft = 32-AsmStrBits;
637 for (unsigned i = 0, e = TableDrivenOperandPrinters.size(); i != e; ++i) {
638 std::vector<std::string> &Commands = TableDrivenOperandPrinters[i];
640 // Compute the number of bits we need to represent these cases, this is
641 // ceil(log2(numentries)).
642 unsigned NumBits = Log2_32_Ceil(Commands.size());
643 assert(NumBits <= BitsLeft && "consistency error");
645 // Emit code to extract this field from Bits.
648 O << "\n // Fragment " << i << " encoded into " << NumBits
649 << " bits for " << Commands.size() << " unique commands.\n";
651 if (Commands.size() == 2) {
652 // Emit two possibilitys with if/else.
653 O << " if ((Bits >> " << (BitsLeft+AsmStrBits) << ") & "
654 << ((1 << NumBits)-1) << ") {\n"
660 O << " switch ((Bits >> " << (BitsLeft+AsmStrBits) << ") & "
661 << ((1 << NumBits)-1) << ") {\n"
662 << " default: // unreachable.\n";
664 // Print out all the cases.
665 for (unsigned i = 0, e = Commands.size(); i != e; ++i) {
666 O << " case " << i << ":\n";
674 // Okay, delete instructions with no operand info left.
675 for (unsigned i = 0, e = Instructions.size(); i != e; ++i) {
676 // Entire instruction has been emitted?
677 AsmWriterInst &Inst = Instructions[i];
678 if (Inst.Operands.empty()) {
679 Instructions.erase(Instructions.begin()+i);
685 // Because this is a vector, we want to emit from the end. Reverse all of the
686 // elements in the vector.
687 std::reverse(Instructions.begin(), Instructions.end());
689 if (!Instructions.empty()) {
690 // Find the opcode # of inline asm.
691 O << " switch (MI->getOpcode()) {\n";
692 while (!Instructions.empty())
693 EmitInstructions(Instructions, O);
696 O << " return true;\n";