1 //===- CodeEmitterGen.cpp - Code Emitter Generator ------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // CodeEmitterGen uses the descriptions of instructions and their fields to
11 // construct an automated code emitter: a function that, given a MachineInstr,
12 // returns the (currently, 32-bit unsigned) value of the instruction.
14 //===----------------------------------------------------------------------===//
16 #include "CodeEmitterGen.h"
17 #include "CodeGenTarget.h"
19 #include "llvm/ADT/StringExtras.h"
20 #include "llvm/Support/CommandLine.h"
21 #include "llvm/Support/Debug.h"
24 // FIXME: Somewhat hackish to use a command line option for this. There should
25 // be a CodeEmitter class in the Target.td that controls this sort of thing
28 MCEmitter("mc-emitter",
29 cl::desc("Generate CodeEmitter for use with the MC library."),
32 void CodeEmitterGen::reverseBits(std::vector<Record*> &Insts) {
33 for (std::vector<Record*>::iterator I = Insts.begin(), E = Insts.end();
36 if (R->getValueAsString("Namespace") == "TargetOpcode")
39 BitsInit *BI = R->getValueAsBitsInit("Inst");
41 unsigned numBits = BI->getNumBits();
42 BitsInit *NewBI = new BitsInit(numBits);
43 for (unsigned bit = 0, end = numBits / 2; bit != end; ++bit) {
44 unsigned bitSwapIdx = numBits - bit - 1;
45 Init *OrigBit = BI->getBit(bit);
46 Init *BitSwap = BI->getBit(bitSwapIdx);
47 NewBI->setBit(bit, BitSwap);
48 NewBI->setBit(bitSwapIdx, OrigBit);
51 unsigned middle = (numBits + 1) / 2;
52 NewBI->setBit(middle, BI->getBit(middle));
55 // Update the bits in reversed order so that emitInstrOpBits will get the
56 // correct endianness.
57 R->getValue("Inst")->setValue(NewBI);
61 // If the VarBitInit at position 'bit' matches the specified variable then
62 // return the variable bit position. Otherwise return -1.
63 int CodeEmitterGen::getVariableBit(const std::string &VarName,
64 BitsInit *BI, int bit) {
65 if (VarBitInit *VBI = dynamic_cast<VarBitInit*>(BI->getBit(bit))) {
66 TypedInit *TI = VBI->getVariable();
68 if (VarInit *VI = dynamic_cast<VarInit*>(TI)) {
69 if (VI->getName() == VarName) return VBI->getBitNum();
76 void CodeEmitterGen::run(raw_ostream &o) {
78 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
80 // For little-endian instruction bit encodings, reverse the bit order
81 if (Target.isLittleEndianEncoding()) reverseBits(Insts);
83 EmitSourceFileHeader("Machine Code Emitter", o);
84 std::string Namespace = Insts[0]->getValueAsString("Namespace") + "::";
86 const std::vector<const CodeGenInstruction*> &NumberedInstructions =
87 Target.getInstructionsByEnumValue();
89 // Emit function declaration
90 o << "unsigned " << Target.getName();
92 o << "MCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,\n"
93 << " SmallVectorImpl<MCFixup> &Fixups) const {\n";
95 o << "CodeEmitter::getBinaryCodeForInstr(const MachineInstr &MI) const {\n";
97 // Emit instruction base values
98 o << " static const unsigned InstBits[] = {\n";
99 for (std::vector<const CodeGenInstruction*>::const_iterator
100 IN = NumberedInstructions.begin(),
101 EN = NumberedInstructions.end();
103 const CodeGenInstruction *CGI = *IN;
104 Record *R = CGI->TheDef;
106 if (R->getValueAsString("Namespace") == "TargetOpcode") {
111 BitsInit *BI = R->getValueAsBitsInit("Inst");
113 // Start by filling in fixed values...
115 for (unsigned i = 0, e = BI->getNumBits(); i != e; ++i) {
116 if (BitInit *B = dynamic_cast<BitInit*>(BI->getBit(e-i-1))) {
117 Value |= B->getValue() << (e-i-1);
120 o << " " << Value << "U," << '\t' << "// " << R->getName() << "\n";
124 // Map to accumulate all the cases.
125 std::map<std::string, std::vector<std::string> > CaseMap;
127 // Construct all cases statement for each opcode
128 for (std::vector<Record*>::iterator IC = Insts.begin(), EC = Insts.end();
131 if (R->getValueAsString("Namespace") == "TargetOpcode")
133 const std::string &InstName = R->getName();
134 std::string Case("");
136 BitsInit *BI = R->getValueAsBitsInit("Inst");
137 const std::vector<RecordVal> &Vals = R->getValues();
138 CodeGenInstruction &CGI = Target.getInstruction(R);
140 // Loop over all of the fields in the instruction, determining which are the
141 // operands to the instruction.
142 unsigned NumberedOp = 0;
143 for (unsigned i = 0, e = Vals.size(); i != e; ++i) {
144 if (!Vals[i].getPrefix() && !Vals[i].getValue()->isComplete()) {
145 // Is the operand continuous? If so, we can just mask and OR it in
146 // instead of doing it bit-by-bit, saving a lot in runtime cost.
147 const std::string &VarName = Vals[i].getName();
150 for (int bit = BI->getNumBits()-1; bit >= 0; ) {
151 int varBit = getVariableBit(VarName, BI, bit);
156 int beginInstBit = bit;
157 int beginVarBit = varBit;
160 for (--bit; bit >= 0;) {
161 varBit = getVariableBit(VarName, BI, bit);
162 if (varBit == -1 || varBit != (beginVarBit - N)) break;
168 // If the operand matches by name, reference according to that
169 // operand number. Non-matching operands are assumed to be in
172 if (CGI.Operands.hasOperandNamed(VarName, OpIdx)) {
173 // Get the machine operand number for the indicated operand.
174 OpIdx = CGI.Operands[OpIdx].MIOperandNo;
175 assert (!CGI.Operands.isFlatOperandNotEmitted(OpIdx) &&
176 "Explicitly used operand also marked as not emitted!");
178 /// If this operand is not supposed to be emitted by the
179 /// generated emitter, skip it.
180 while (CGI.Operands.isFlatOperandNotEmitted(NumberedOp))
182 OpIdx = NumberedOp++;
184 std::pair<unsigned, unsigned> SO =
185 CGI.Operands.getSubOperandNumber(OpIdx);
186 std::string &EncoderMethodName =
187 CGI.Operands[SO.first].EncoderMethodName;
189 // If the source operand has a custom encoder, use it. This will
190 // get the encoding for all of the suboperands.
191 if (!EncoderMethodName.empty()) {
192 // A custom encoder has all of the information for the
193 // sub-operands, if there are more than one, so only
194 // query the encoder once per source operand.
195 if (SO.second == 0) {
196 Case += " // op: " + VarName + "\n"
197 + " op = " + EncoderMethodName + "(MI, "
204 Case += " // op: " + VarName + "\n"
205 + " op = getMachineOpValue(MI, MI.getOperand("
206 + utostr(OpIdx) + ")";
214 unsigned opMask = ~0U >> (32-N);
215 int opShift = beginVarBit - N + 1;
217 opShift = beginInstBit - beginVarBit;
220 Case += " Value |= (op & " + utostr(opMask) + "U) << "
221 + itostr(opShift) + ";\n";
222 } else if (opShift < 0) {
223 Case += " Value |= (op & " + utostr(opMask) + "U) >> "
224 + itostr(-opShift) + ";\n";
226 Case += " Value |= op & " + utostr(opMask) + "U;\n";
233 std::vector<std::string> &InstList = CaseMap[Case];
234 InstList.push_back(InstName);
237 // Emit initial function code
238 o << " const unsigned opcode = MI.getOpcode();\n"
239 << " unsigned Value = InstBits[opcode];\n"
240 << " unsigned op = 0;\n"
241 << " op = op; // suppress warning\n"
242 << " switch (opcode) {\n";
244 // Emit each case statement
245 std::map<std::string, std::vector<std::string> >::iterator IE, EE;
246 for (IE = CaseMap.begin(), EE = CaseMap.end(); IE != EE; ++IE) {
247 const std::string &Case = IE->first;
248 std::vector<std::string> &InstList = IE->second;
250 for (int i = 0, N = InstList.size(); i < N; i++) {
252 o << " case " << Namespace << InstList[i] << ":";
260 // Default case: unhandled opcode
262 << " std::string msg;\n"
263 << " raw_string_ostream Msg(msg);\n"
264 << " Msg << \"Not supported instr: \" << MI;\n"
265 << " report_fatal_error(Msg.str());\n"
267 << " return Value;\n"