1 //===- CodeEmitterGen.cpp - Code Emitter Generator ------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // CodeEmitterGen uses the descriptions of instructions and their fields to
11 // construct an automated code emitter: a function that, given a MachineInstr,
12 // returns the (currently, 32-bit unsigned) value of the instruction.
14 //===----------------------------------------------------------------------===//
16 #include "CodeEmitterGen.h"
17 #include "CodeGenTarget.h"
19 #include "Support/Debug.h"
22 void CodeEmitterGen::run(std::ostream &o) {
24 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
26 EmitSourceFileHeader("Machine Code Emitter", o);
28 std::string Namespace = Insts[0]->getValueAsString("Namespace") + "::";
30 //const std::string &Namespace = Inst->getValue("Namespace")->getName();
31 o << "unsigned " << Target.getName() << "CodeEmitter::"
32 << "getBinaryCodeForInstr(MachineInstr &MI) {\n"
33 << " unsigned Value = 0;\n"
34 << " DEBUG(std::cerr << MI);\n"
35 << " switch (MI.getOpcode()) {\n";
36 for (std::vector<Record*>::iterator I = Insts.begin(), E = Insts.end();
39 o << " case " << Namespace << R->getName() << ": {\n"
40 << " DEBUG(std::cerr << \"Emitting " << R->getName() << "\\n\");\n";
42 BitsInit *BI = R->getValueAsBitsInit("Inst");
45 const std::vector<RecordVal> &Vals = R->getValues();
47 DEBUG(o << " // prefilling: ");
48 // Start by filling in fixed values...
49 for (unsigned i = 0, e = BI->getNumBits(); i != e; ++i) {
50 if (BitInit *B = dynamic_cast<BitInit*>(BI->getBit(e-i-1))) {
51 Value |= B->getValue() << (e-i-1);
52 DEBUG(o << B->getValue());
59 DEBUG(o << " // " << *R->getValue("Inst") << "\n");
60 o << " Value = " << Value << "U;\n\n";
62 // Loop over all of the fields in the instruction determining which are the
63 // operands to the instruction.
66 std::map<std::string, unsigned> OpOrder;
67 std::map<std::string, bool> OpContinuous;
68 for (unsigned i = 0, e = Vals.size(); i != e; ++i) {
69 if (!Vals[i].getPrefix() && !Vals[i].getValue()->isComplete()) {
70 // Is the operand continuous? If so, we can just mask and OR it in
71 // instead of doing it bit-by-bit, saving a lot in runtime cost.
72 const BitsInit *InstInit = BI;
73 int beginBitInVar = -1, endBitInVar = -1;
74 int beginBitInInst = -1, endBitInInst = -1;
75 bool continuous = true;
77 for (int bit = InstInit->getNumBits()-1; bit >= 0; --bit) {
79 dynamic_cast<VarBitInit*>(InstInit->getBit(bit))) {
80 TypedInit *TI = VBI->getVariable();
81 if (VarInit *VI = dynamic_cast<VarInit*>(TI)) {
82 // only process the current variable
83 if (VI->getName() != Vals[i].getName())
86 if (beginBitInVar == -1)
87 beginBitInVar = VBI->getBitNum();
89 if (endBitInVar == -1)
90 endBitInVar = VBI->getBitNum();
92 if (endBitInVar == (int)VBI->getBitNum() + 1)
93 endBitInVar = VBI->getBitNum();
100 if (beginBitInInst == -1)
101 beginBitInInst = bit;
102 if (endBitInInst == -1)
105 if (endBitInInst == bit + 1)
113 // maintain same distance between bits in field and bits in
114 // instruction. if the relative distances stay the same
116 if (beginBitInVar - (int)VBI->getBitNum() !=
117 beginBitInInst - bit) {
125 // If we have found no bit in "Inst" which comes from this field, then
126 // this is not an operand!!
127 if (beginBitInInst != -1) {
128 o << " // op" << op << ": " << Vals[i].getName() << "\n"
129 << " int64_t op" << op
130 <<" = getMachineOpValue(MI, MI.getOperand("<<op<<"));\n";
131 //<< " MachineOperand &op" << op <<" = MI.getOperand("<<op<<");\n";
132 OpOrder[Vals[i].getName()] = op++;
134 DEBUG(o << " // Var: begin = " << beginBitInVar
135 << ", end = " << endBitInVar
136 << "; Inst: begin = " << beginBitInInst
137 << ", end = " << endBitInInst << "\n");
140 DEBUG(o << " // continuous: op" << OpOrder[Vals[i].getName()]
143 // Mask off the right bits
144 // Low mask (ie. shift, if necessary)
145 assert(endBitInVar >= 0 && "Negative shift amount in masking!");
146 if (endBitInVar != 0) {
147 o << " op" << OpOrder[Vals[i].getName()]
148 << " >>= " << endBitInVar << ";\n";
149 beginBitInVar -= endBitInVar;
154 o << " op" << OpOrder[Vals[i].getName()]
155 << " &= (1<<" << beginBitInVar+1 << ") - 1;\n";
157 // Shift the value to the correct place (according to place in inst)
158 assert(endBitInInst >= 0 && "Negative shift amount!");
159 if (endBitInInst != 0)
160 o << " op" << OpOrder[Vals[i].getName()]
161 << " <<= " << endBitInInst << ";\n";
163 // Just OR in the result
164 o << " Value |= op" << OpOrder[Vals[i].getName()] << ";\n";
167 // otherwise, will be taken care of in the loop below using this
169 OpContinuous[Vals[i].getName()] = continuous;
174 for (unsigned f = 0, e = Vals.size(); f != e; ++f) {
175 if (Vals[f].getPrefix()) {
176 BitsInit *FieldInitializer = (BitsInit*)Vals[f].getValue();
178 // Scan through the field looking for bit initializers of the current
180 for (int i = FieldInitializer->getNumBits()-1; i >= 0; --i) {
181 Init *I = FieldInitializer->getBit(i);
182 if (BitInit *BI = dynamic_cast<BitInit*>(I)) {
183 DEBUG(o << " // bit init: f: " << f << ", i: " << i << "\n");
184 } else if (UnsetInit *UI = dynamic_cast<UnsetInit*>(I)) {
185 DEBUG(o << " // unset init: f: " << f << ", i: " << i << "\n");
186 } else if (VarBitInit *VBI = dynamic_cast<VarBitInit*>(I)) {
187 TypedInit *TI = VBI->getVariable();
188 if (VarInit *VI = dynamic_cast<VarInit*>(TI)) {
189 // If the bits of the field are laid out consecutively in the
190 // instruction, then instead of separately ORing in bits, just
191 // mask and shift the entire field for efficiency.
192 if (OpContinuous[VI->getName()]) {
193 // already taken care of in the loop above, thus there is no
194 // need to individually OR in the bits
196 // for debugging, output the regular version anyway, commented
197 DEBUG(o << " // Value |= getValueBit(op"
198 << OpOrder[VI->getName()] << ", " << VBI->getBitNum()
199 << ")" << " << " << i << ";\n");
201 o << " Value |= getValueBit(op" << OpOrder[VI->getName()]
202 << ", " << VBI->getBitNum()
203 << ")" << " << " << i << ";\n";
205 } else if (FieldInit *FI = dynamic_cast<FieldInit*>(TI)) {
206 // FIXME: implement this!
207 o << "FIELD INIT not implemented yet!\n";
209 o << "Error: UNIMPLEMENTED\n";
221 << " std::cerr << \"Not supported instr: \" << MI << \"\\n\";\n"
224 << " return Value;\n"
227 EmitSourceFileTail(o);