1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This class wraps target description classes used by the various code
11 // generation TableGen backends. This makes it easier to access the data and
12 // provides a single place that needs to check it for validity. All of these
13 // classes abort on error conditions.
15 //===----------------------------------------------------------------------===//
17 #include "CodeGenTarget.h"
18 #include "CodeGenIntrinsics.h"
19 #include "CodeGenSchedule.h"
20 #include "llvm/ADT/STLExtras.h"
21 #include "llvm/ADT/StringExtras.h"
22 #include "llvm/Support/CommandLine.h"
23 #include "llvm/TableGen/Error.h"
24 #include "llvm/TableGen/Record.h"
28 static cl::opt<unsigned>
29 AsmParserNum("asmparsernum", cl::init(0),
30 cl::desc("Make -gen-asm-parser emit assembly parser #N"));
32 static cl::opt<unsigned>
33 AsmWriterNum("asmwriternum", cl::init(0),
34 cl::desc("Make -gen-asm-writer emit assembly writer #N"));
36 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
37 /// record corresponds to.
38 MVT::SimpleValueType llvm::getValueType(Record *Rec) {
39 return (MVT::SimpleValueType)Rec->getValueAsInt("Value");
42 std::string llvm::getName(MVT::SimpleValueType T) {
44 case MVT::Other: return "UNKNOWN";
45 case MVT::iPTR: return "TLI.getPointerTy()";
46 case MVT::iPTRAny: return "TLI.getPointerTy()";
47 default: return getEnumName(T);
51 std::string llvm::getEnumName(MVT::SimpleValueType T) {
53 case MVT::Other: return "MVT::Other";
54 case MVT::i1: return "MVT::i1";
55 case MVT::i8: return "MVT::i8";
56 case MVT::i16: return "MVT::i16";
57 case MVT::i32: return "MVT::i32";
58 case MVT::i64: return "MVT::i64";
59 case MVT::i128: return "MVT::i128";
60 case MVT::Any: return "MVT::Any";
61 case MVT::iAny: return "MVT::iAny";
62 case MVT::fAny: return "MVT::fAny";
63 case MVT::vAny: return "MVT::vAny";
64 case MVT::f16: return "MVT::f16";
65 case MVT::f32: return "MVT::f32";
66 case MVT::f64: return "MVT::f64";
67 case MVT::f80: return "MVT::f80";
68 case MVT::f128: return "MVT::f128";
69 case MVT::ppcf128: return "MVT::ppcf128";
70 case MVT::x86mmx: return "MVT::x86mmx";
71 case MVT::Glue: return "MVT::Glue";
72 case MVT::isVoid: return "MVT::isVoid";
73 case MVT::v2i1: return "MVT::v2i1";
74 case MVT::v4i1: return "MVT::v4i1";
75 case MVT::v8i1: return "MVT::v8i1";
76 case MVT::v16i1: return "MVT::v16i1";
77 case MVT::v32i1: return "MVT::v32i1";
78 case MVT::v64i1: return "MVT::v64i1";
79 case MVT::v1i8: return "MVT::v1i8";
80 case MVT::v2i8: return "MVT::v2i8";
81 case MVT::v4i8: return "MVT::v4i8";
82 case MVT::v8i8: return "MVT::v8i8";
83 case MVT::v16i8: return "MVT::v16i8";
84 case MVT::v32i8: return "MVT::v32i8";
85 case MVT::v64i8: return "MVT::v64i8";
86 case MVT::v1i16: return "MVT::v1i16";
87 case MVT::v2i16: return "MVT::v2i16";
88 case MVT::v4i16: return "MVT::v4i16";
89 case MVT::v8i16: return "MVT::v8i16";
90 case MVT::v16i16: return "MVT::v16i16";
91 case MVT::v32i16: return "MVT::v32i16";
92 case MVT::v1i32: return "MVT::v1i32";
93 case MVT::v2i32: return "MVT::v2i32";
94 case MVT::v4i32: return "MVT::v4i32";
95 case MVT::v8i32: return "MVT::v8i32";
96 case MVT::v16i32: return "MVT::v16i32";
97 case MVT::v1i64: return "MVT::v1i64";
98 case MVT::v2i64: return "MVT::v2i64";
99 case MVT::v4i64: return "MVT::v4i64";
100 case MVT::v8i64: return "MVT::v8i64";
101 case MVT::v16i64: return "MVT::v16i64";
102 case MVT::v1i128: return "MVT::v1i128";
103 case MVT::v2f16: return "MVT::v2f16";
104 case MVT::v4f16: return "MVT::v4f16";
105 case MVT::v8f16: return "MVT::v8f16";
106 case MVT::v1f32: return "MVT::v1f32";
107 case MVT::v2f32: return "MVT::v2f32";
108 case MVT::v4f32: return "MVT::v4f32";
109 case MVT::v8f32: return "MVT::v8f32";
110 case MVT::v16f32: return "MVT::v16f32";
111 case MVT::v1f64: return "MVT::v1f64";
112 case MVT::v2f64: return "MVT::v2f64";
113 case MVT::v4f64: return "MVT::v4f64";
114 case MVT::v8f64: return "MVT::v8f64";
115 case MVT::token: return "MVT::token";
116 case MVT::Metadata: return "MVT::Metadata";
117 case MVT::iPTR: return "MVT::iPTR";
118 case MVT::iPTRAny: return "MVT::iPTRAny";
119 case MVT::Untyped: return "MVT::Untyped";
120 default: llvm_unreachable("ILLEGAL VALUE TYPE!");
124 /// getQualifiedName - Return the name of the specified record, with a
125 /// namespace qualifier if the record contains one.
127 std::string llvm::getQualifiedName(const Record *R) {
128 std::string Namespace;
129 if (R->getValue("Namespace"))
130 Namespace = R->getValueAsString("Namespace");
131 if (Namespace.empty()) return R->getName();
132 return Namespace + "::" + R->getName();
136 /// getTarget - Return the current instance of the Target class.
138 CodeGenTarget::CodeGenTarget(RecordKeeper &records)
140 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target");
141 if (Targets.size() == 0)
142 PrintFatalError("ERROR: No 'Target' subclasses defined!");
143 if (Targets.size() != 1)
144 PrintFatalError("ERROR: Multiple subclasses of Target defined!");
145 TargetRec = Targets[0];
148 CodeGenTarget::~CodeGenTarget() {
151 const std::string &CodeGenTarget::getName() const {
152 return TargetRec->getName();
155 std::string CodeGenTarget::getInstNamespace() const {
156 for (const CodeGenInstruction *Inst : instructions()) {
157 // Make sure not to pick up "TargetOpcode" by accidentally getting
158 // the namespace off the PHI instruction or something.
159 if (Inst->Namespace != "TargetOpcode")
160 return Inst->Namespace;
166 Record *CodeGenTarget::getInstructionSet() const {
167 return TargetRec->getValueAsDef("InstructionSet");
171 /// getAsmParser - Return the AssemblyParser definition for this target.
173 Record *CodeGenTarget::getAsmParser() const {
174 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyParsers");
175 if (AsmParserNum >= LI.size())
176 PrintFatalError("Target does not have an AsmParser #" +
177 Twine(AsmParserNum) + "!");
178 return LI[AsmParserNum];
181 /// getAsmParserVariant - Return the AssmblyParserVariant definition for
184 Record *CodeGenTarget::getAsmParserVariant(unsigned i) const {
185 std::vector<Record*> LI =
186 TargetRec->getValueAsListOfDefs("AssemblyParserVariants");
188 PrintFatalError("Target does not have an AsmParserVariant #" + Twine(i) +
193 /// getAsmParserVariantCount - Return the AssmblyParserVariant definition
194 /// available for this target.
196 unsigned CodeGenTarget::getAsmParserVariantCount() const {
197 std::vector<Record*> LI =
198 TargetRec->getValueAsListOfDefs("AssemblyParserVariants");
202 /// getAsmWriter - Return the AssemblyWriter definition for this target.
204 Record *CodeGenTarget::getAsmWriter() const {
205 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters");
206 if (AsmWriterNum >= LI.size())
207 PrintFatalError("Target does not have an AsmWriter #" +
208 Twine(AsmWriterNum) + "!");
209 return LI[AsmWriterNum];
212 CodeGenRegBank &CodeGenTarget::getRegBank() const {
214 RegBank = llvm::make_unique<CodeGenRegBank>(Records);
218 void CodeGenTarget::ReadRegAltNameIndices() const {
219 RegAltNameIndices = Records.getAllDerivedDefinitions("RegAltNameIndex");
220 array_pod_sort(RegAltNameIndices.begin(), RegAltNameIndices.end(),
224 /// getRegisterByName - If there is a register with the specific AsmName,
226 const CodeGenRegister *CodeGenTarget::getRegisterByName(StringRef Name) const {
227 const StringMap<CodeGenRegister*> &Regs = getRegBank().getRegistersByName();
228 StringMap<CodeGenRegister*>::const_iterator I = Regs.find(Name);
234 std::vector<MVT::SimpleValueType> CodeGenTarget::
235 getRegisterVTs(Record *R) const {
236 const CodeGenRegister *Reg = getRegBank().getReg(R);
237 std::vector<MVT::SimpleValueType> Result;
238 for (const auto &RC : getRegBank().getRegClasses()) {
239 if (RC.contains(Reg)) {
240 ArrayRef<MVT::SimpleValueType> InVTs = RC.getValueTypes();
241 Result.insert(Result.end(), InVTs.begin(), InVTs.end());
245 // Remove duplicates.
246 array_pod_sort(Result.begin(), Result.end());
247 Result.erase(std::unique(Result.begin(), Result.end()), Result.end());
252 void CodeGenTarget::ReadLegalValueTypes() const {
253 for (const auto &RC : getRegBank().getRegClasses())
254 LegalValueTypes.insert(LegalValueTypes.end(), RC.VTs.begin(), RC.VTs.end());
256 // Remove duplicates.
257 array_pod_sort(LegalValueTypes.begin(), LegalValueTypes.end());
258 LegalValueTypes.erase(std::unique(LegalValueTypes.begin(),
259 LegalValueTypes.end()),
260 LegalValueTypes.end());
263 CodeGenSchedModels &CodeGenTarget::getSchedModels() const {
265 SchedModels = llvm::make_unique<CodeGenSchedModels>(Records, *this);
269 void CodeGenTarget::ReadInstructions() const {
270 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
271 if (Insts.size() <= 2)
272 PrintFatalError("No 'Instruction' subclasses defined!");
274 // Parse the instructions defined in the .td file.
275 for (unsigned i = 0, e = Insts.size(); i != e; ++i)
276 Instructions[Insts[i]] = llvm::make_unique<CodeGenInstruction>(Insts[i]);
279 static const CodeGenInstruction *
280 GetInstByName(const char *Name,
281 const DenseMap<const Record*,
282 std::unique_ptr<CodeGenInstruction>> &Insts,
283 RecordKeeper &Records) {
284 const Record *Rec = Records.getDef(Name);
286 const auto I = Insts.find(Rec);
287 if (!Rec || I == Insts.end())
288 PrintFatalError(Twine("Could not find '") + Name + "' instruction!");
289 return I->second.get();
292 /// \brief Return all of the instructions defined by the target, ordered by
293 /// their enum value.
294 void CodeGenTarget::ComputeInstrsByEnum() const {
295 // The ordering here must match the ordering in TargetOpcodes.h.
296 static const char *const FixedInstrs[] = {
297 "PHI", "INLINEASM", "CFI_INSTRUCTION", "EH_LABEL",
298 "GC_LABEL", "KILL", "EXTRACT_SUBREG", "INSERT_SUBREG",
299 "IMPLICIT_DEF", "SUBREG_TO_REG", "COPY_TO_REGCLASS", "DBG_VALUE",
300 "REG_SEQUENCE", "COPY", "BUNDLE", "LIFETIME_START",
301 "LIFETIME_END", "STACKMAP", "PATCHPOINT", "LOAD_STACK_GUARD",
302 "STATEPOINT", "LOCAL_ESCAPE", "FAULTING_LOAD_OP",
304 const auto &Insts = getInstructions();
305 for (const char *const *p = FixedInstrs; *p; ++p) {
306 const CodeGenInstruction *Instr = GetInstByName(*p, Insts, Records);
307 assert(Instr && "Missing target independent instruction");
308 assert(Instr->Namespace == "TargetOpcode" && "Bad namespace");
309 InstrsByEnum.push_back(Instr);
311 unsigned EndOfPredefines = InstrsByEnum.size();
313 for (const auto &I : Insts) {
314 const CodeGenInstruction *CGI = I.second.get();
315 if (CGI->Namespace != "TargetOpcode")
316 InstrsByEnum.push_back(CGI);
319 assert(InstrsByEnum.size() == Insts.size() && "Missing predefined instr");
321 // All of the instructions are now in random order based on the map iteration.
322 // Sort them by name.
323 std::sort(InstrsByEnum.begin() + EndOfPredefines, InstrsByEnum.end(),
324 [](const CodeGenInstruction *Rec1, const CodeGenInstruction *Rec2) {
325 return Rec1->TheDef->getName() < Rec2->TheDef->getName();
330 /// isLittleEndianEncoding - Return whether this target encodes its instruction
331 /// in little-endian format, i.e. bits laid out in the order [0..n]
333 bool CodeGenTarget::isLittleEndianEncoding() const {
334 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding");
337 /// reverseBitsForLittleEndianEncoding - For little-endian instruction bit
338 /// encodings, reverse the bit order of all instructions.
339 void CodeGenTarget::reverseBitsForLittleEndianEncoding() {
340 if (!isLittleEndianEncoding())
343 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
344 for (Record *R : Insts) {
345 if (R->getValueAsString("Namespace") == "TargetOpcode" ||
346 R->getValueAsBit("isPseudo"))
349 BitsInit *BI = R->getValueAsBitsInit("Inst");
351 unsigned numBits = BI->getNumBits();
353 SmallVector<Init *, 16> NewBits(numBits);
355 for (unsigned bit = 0, end = numBits / 2; bit != end; ++bit) {
356 unsigned bitSwapIdx = numBits - bit - 1;
357 Init *OrigBit = BI->getBit(bit);
358 Init *BitSwap = BI->getBit(bitSwapIdx);
359 NewBits[bit] = BitSwap;
360 NewBits[bitSwapIdx] = OrigBit;
363 unsigned middle = (numBits + 1) / 2;
364 NewBits[middle] = BI->getBit(middle);
367 BitsInit *NewBI = BitsInit::get(NewBits);
369 // Update the bits in reversed order so that emitInstrOpBits will get the
370 // correct endianness.
371 R->getValue("Inst")->setValue(NewBI);
375 /// guessInstructionProperties - Return true if it's OK to guess instruction
376 /// properties instead of raising an error.
378 /// This is configurable as a temporary migration aid. It will eventually be
379 /// permanently false.
380 bool CodeGenTarget::guessInstructionProperties() const {
381 return getInstructionSet()->getValueAsBit("guessInstructionProperties");
384 //===----------------------------------------------------------------------===//
385 // ComplexPattern implementation
387 ComplexPattern::ComplexPattern(Record *R) {
388 Ty = ::getValueType(R->getValueAsDef("Ty"));
389 NumOperands = R->getValueAsInt("NumOperands");
390 SelectFunc = R->getValueAsString("SelectFunc");
391 RootNodes = R->getValueAsListOfDefs("RootNodes");
393 // Parse the properties.
395 std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties");
396 for (unsigned i = 0, e = PropList.size(); i != e; ++i)
397 if (PropList[i]->getName() == "SDNPHasChain") {
398 Properties |= 1 << SDNPHasChain;
399 } else if (PropList[i]->getName() == "SDNPOptInGlue") {
400 Properties |= 1 << SDNPOptInGlue;
401 } else if (PropList[i]->getName() == "SDNPMayStore") {
402 Properties |= 1 << SDNPMayStore;
403 } else if (PropList[i]->getName() == "SDNPMayLoad") {
404 Properties |= 1 << SDNPMayLoad;
405 } else if (PropList[i]->getName() == "SDNPSideEffect") {
406 Properties |= 1 << SDNPSideEffect;
407 } else if (PropList[i]->getName() == "SDNPMemOperand") {
408 Properties |= 1 << SDNPMemOperand;
409 } else if (PropList[i]->getName() == "SDNPVariadic") {
410 Properties |= 1 << SDNPVariadic;
411 } else if (PropList[i]->getName() == "SDNPWantRoot") {
412 Properties |= 1 << SDNPWantRoot;
413 } else if (PropList[i]->getName() == "SDNPWantParent") {
414 Properties |= 1 << SDNPWantParent;
416 PrintFatalError("Unsupported SD Node property '" +
417 PropList[i]->getName() + "' on ComplexPattern '" +
418 R->getName() + "'!");
422 //===----------------------------------------------------------------------===//
423 // CodeGenIntrinsic Implementation
424 //===----------------------------------------------------------------------===//
426 std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC,
428 std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic");
430 std::vector<CodeGenIntrinsic> Result;
432 for (unsigned i = 0, e = I.size(); i != e; ++i) {
433 bool isTarget = I[i]->getValueAsBit("isTarget");
434 if (isTarget == TargetOnly)
435 Result.push_back(CodeGenIntrinsic(I[i]));
440 CodeGenIntrinsic::CodeGenIntrinsic(Record *R) {
442 std::string DefName = R->getName();
443 ModRef = ReadWriteMem;
444 isOverloaded = false;
445 isCommutative = false;
448 isNoDuplicate = false;
449 isConvergent = false;
451 if (DefName.size() <= 4 ||
452 std::string(DefName.begin(), DefName.begin() + 4) != "int_")
453 PrintFatalError("Intrinsic '" + DefName + "' does not start with 'int_'!");
455 EnumName = std::string(DefName.begin()+4, DefName.end());
457 if (R->getValue("GCCBuiltinName")) // Ignore a missing GCCBuiltinName field.
458 GCCBuiltinName = R->getValueAsString("GCCBuiltinName");
459 if (R->getValue("MSBuiltinName")) // Ignore a missing MSBuiltinName field.
460 MSBuiltinName = R->getValueAsString("MSBuiltinName");
462 TargetPrefix = R->getValueAsString("TargetPrefix");
463 Name = R->getValueAsString("LLVMName");
466 // If an explicit name isn't specified, derive one from the DefName.
469 for (unsigned i = 0, e = EnumName.size(); i != e; ++i)
470 Name += (EnumName[i] == '_') ? '.' : EnumName[i];
472 // Verify it starts with "llvm.".
473 if (Name.size() <= 5 ||
474 std::string(Name.begin(), Name.begin() + 5) != "llvm.")
475 PrintFatalError("Intrinsic '" + DefName + "'s name does not start with 'llvm.'!");
478 // If TargetPrefix is specified, make sure that Name starts with
479 // "llvm.<targetprefix>.".
480 if (!TargetPrefix.empty()) {
481 if (Name.size() < 6+TargetPrefix.size() ||
482 std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size())
483 != (TargetPrefix + "."))
484 PrintFatalError("Intrinsic '" + DefName + "' does not start with 'llvm." +
485 TargetPrefix + ".'!");
488 // Parse the list of return types.
489 std::vector<MVT::SimpleValueType> OverloadedVTs;
490 ListInit *TypeList = R->getValueAsListInit("RetTypes");
491 for (unsigned i = 0, e = TypeList->size(); i != e; ++i) {
492 Record *TyEl = TypeList->getElementAsRecord(i);
493 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
494 MVT::SimpleValueType VT;
495 if (TyEl->isSubClassOf("LLVMMatchType")) {
496 unsigned MatchTy = TyEl->getValueAsInt("Number");
497 assert(MatchTy < OverloadedVTs.size() &&
498 "Invalid matching number!");
499 VT = OverloadedVTs[MatchTy];
500 // It only makes sense to use the extended and truncated vector element
501 // variants with iAny types; otherwise, if the intrinsic is not
502 // overloaded, all the types can be specified directly.
503 assert(((!TyEl->isSubClassOf("LLVMExtendedType") &&
504 !TyEl->isSubClassOf("LLVMTruncatedType")) ||
505 VT == MVT::iAny || VT == MVT::vAny) &&
506 "Expected iAny or vAny type");
508 VT = getValueType(TyEl->getValueAsDef("VT"));
510 if (MVT(VT).isOverloaded()) {
511 OverloadedVTs.push_back(VT);
515 // Reject invalid types.
516 if (VT == MVT::isVoid)
517 PrintFatalError("Intrinsic '" + DefName + " has void in result type list!");
519 IS.RetVTs.push_back(VT);
520 IS.RetTypeDefs.push_back(TyEl);
523 // Parse the list of parameter types.
524 TypeList = R->getValueAsListInit("ParamTypes");
525 for (unsigned i = 0, e = TypeList->size(); i != e; ++i) {
526 Record *TyEl = TypeList->getElementAsRecord(i);
527 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
528 MVT::SimpleValueType VT;
529 if (TyEl->isSubClassOf("LLVMMatchType")) {
530 unsigned MatchTy = TyEl->getValueAsInt("Number");
531 assert(MatchTy < OverloadedVTs.size() &&
532 "Invalid matching number!");
533 VT = OverloadedVTs[MatchTy];
534 // It only makes sense to use the extended and truncated vector element
535 // variants with iAny types; otherwise, if the intrinsic is not
536 // overloaded, all the types can be specified directly.
537 assert(((!TyEl->isSubClassOf("LLVMExtendedType") &&
538 !TyEl->isSubClassOf("LLVMTruncatedType") &&
539 !TyEl->isSubClassOf("LLVMVectorSameWidth") &&
540 !TyEl->isSubClassOf("LLVMPointerToElt")) ||
541 VT == MVT::iAny || VT == MVT::vAny) &&
542 "Expected iAny or vAny type");
544 VT = getValueType(TyEl->getValueAsDef("VT"));
546 if (MVT(VT).isOverloaded()) {
547 OverloadedVTs.push_back(VT);
551 // Reject invalid types.
552 if (VT == MVT::isVoid && i != e-1 /*void at end means varargs*/)
553 PrintFatalError("Intrinsic '" + DefName + " has void in result type list!");
555 IS.ParamVTs.push_back(VT);
556 IS.ParamTypeDefs.push_back(TyEl);
559 // Parse the intrinsic properties.
560 ListInit *PropList = R->getValueAsListInit("Properties");
561 for (unsigned i = 0, e = PropList->size(); i != e; ++i) {
562 Record *Property = PropList->getElementAsRecord(i);
563 assert(Property->isSubClassOf("IntrinsicProperty") &&
564 "Expected a property!");
566 if (Property->getName() == "IntrNoMem")
568 else if (Property->getName() == "IntrReadArgMem")
570 else if (Property->getName() == "IntrReadMem")
572 else if (Property->getName() == "IntrReadWriteArgMem")
573 ModRef = ReadWriteArgMem;
574 else if (Property->getName() == "Commutative")
575 isCommutative = true;
576 else if (Property->getName() == "Throws")
578 else if (Property->getName() == "IntrNoDuplicate")
579 isNoDuplicate = true;
580 else if (Property->getName() == "IntrConvergent")
582 else if (Property->getName() == "IntrNoReturn")
584 else if (Property->isSubClassOf("NoCapture")) {
585 unsigned ArgNo = Property->getValueAsInt("ArgNo");
586 ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture));
587 } else if (Property->isSubClassOf("ReadOnly")) {
588 unsigned ArgNo = Property->getValueAsInt("ArgNo");
589 ArgumentAttributes.push_back(std::make_pair(ArgNo, ReadOnly));
590 } else if (Property->isSubClassOf("ReadNone")) {
591 unsigned ArgNo = Property->getValueAsInt("ArgNo");
592 ArgumentAttributes.push_back(std::make_pair(ArgNo, ReadNone));
594 llvm_unreachable("Unknown property!");
597 // Sort the argument attributes for later benefit.
598 std::sort(ArgumentAttributes.begin(), ArgumentAttributes.end());