1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper ---------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This class wrap target description classes used by the various code
11 // generation TableGen backends. This makes it easier to access the data and
12 // provides a single place that needs to check it for validity. All of these
13 // classes throw exceptions on error conditions.
15 //===----------------------------------------------------------------------===//
17 #include "CodeGenTarget.h"
19 #include "llvm/ADT/StringExtras.h"
20 #include "llvm/Support/CommandLine.h"
25 static cl::opt<unsigned>
26 AsmWriterNum("asmwriternum", cl::init(0),
27 cl::desc("Make -gen-asm-writer emit assembly writer #N"));
29 /// getValueType - Return the MCV::ValueType that the specified TableGen record
31 MVT::ValueType llvm::getValueType(Record *Rec) {
32 return (MVT::ValueType)Rec->getValueAsInt("Value");
35 std::string llvm::getName(MVT::ValueType T) {
37 case MVT::Other: return "UNKNOWN";
38 case MVT::i1: return "i1";
39 case MVT::i8: return "i8";
40 case MVT::i16: return "i16";
41 case MVT::i32: return "i32";
42 case MVT::i64: return "i64";
43 case MVT::i128: return "i128";
44 case MVT::f32: return "f32";
45 case MVT::f64: return "f64";
46 case MVT::f80: return "f80";
47 case MVT::f128: return "f128";
48 case MVT::isVoid:return "void";
49 default: assert(0 && "ILLEGAL VALUE TYPE!"); return "";
53 std::string llvm::getEnumName(MVT::ValueType T) {
55 case MVT::Other: return "Other";
56 case MVT::i1: return "i1";
57 case MVT::i8: return "i8";
58 case MVT::i16: return "i16";
59 case MVT::i32: return "i32";
60 case MVT::i64: return "i64";
61 case MVT::i128: return "i128";
62 case MVT::f32: return "f32";
63 case MVT::f64: return "f64";
64 case MVT::f80: return "f80";
65 case MVT::f128: return "f128";
66 case MVT::isVoid:return "isVoid";
67 default: assert(0 && "ILLEGAL VALUE TYPE!"); return "";
72 std::ostream &llvm::operator<<(std::ostream &OS, MVT::ValueType T) {
73 return OS << getName(T);
77 /// getTarget - Return the current instance of the Target class.
79 CodeGenTarget::CodeGenTarget() : PointerType(MVT::Other) {
80 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target");
81 if (Targets.size() == 0)
82 throw std::string("ERROR: No 'Target' subclasses defined!");
83 if (Targets.size() != 1)
84 throw std::string("ERROR: Multiple subclasses of Target defined!");
85 TargetRec = Targets[0];
87 // Read in all of the CalleeSavedRegisters...
88 ListInit *LI = TargetRec->getValueAsListInit("CalleeSavedRegisters");
89 for (unsigned i = 0, e = LI->getSize(); i != e; ++i)
90 if (DefInit *DI = dynamic_cast<DefInit*>(LI->getElement(i)))
91 CalleeSavedRegisters.push_back(DI->getDef());
93 throw "Target: " + TargetRec->getName() +
94 " expected register definition in CalleeSavedRegisters list!";
96 PointerType = getValueType(TargetRec->getValueAsDef("PointerType"));
100 const std::string &CodeGenTarget::getName() const {
101 return TargetRec->getName();
104 Record *CodeGenTarget::getInstructionSet() const {
105 return TargetRec->getValueAsDef("InstructionSet");
108 /// getAsmWriter - Return the AssemblyWriter definition for this target.
110 Record *CodeGenTarget::getAsmWriter() const {
111 ListInit *LI = TargetRec->getValueAsListInit("AssemblyWriters");
112 if (AsmWriterNum >= LI->getSize())
113 throw "Target does not have an AsmWriter #" + utostr(AsmWriterNum) + "!";
114 DefInit *DI = dynamic_cast<DefInit*>(LI->getElement(AsmWriterNum));
115 if (!DI) throw std::string("AssemblyWriter list should be a list of defs!");
119 void CodeGenTarget::ReadRegisters() const {
120 std::vector<Record*> Regs = Records.getAllDerivedDefinitions("Register");
122 throw std::string("No 'Register' subclasses defined!");
124 Registers.reserve(Regs.size());
125 Registers.assign(Regs.begin(), Regs.end());
128 CodeGenRegister::CodeGenRegister(Record *R) : TheDef(R) {
129 DeclaredSpillSize = R->getValueAsInt("SpillSize");
130 DeclaredSpillAlignment = R->getValueAsInt("SpillAlignment");
133 const std::string &CodeGenRegister::getName() const {
134 return TheDef->getName();
137 void CodeGenTarget::ReadRegisterClasses() const {
138 std::vector<Record*> RegClasses =
139 Records.getAllDerivedDefinitions("RegisterClass");
140 if (RegClasses.empty())
141 throw std::string("No 'RegisterClass' subclasses defined!");
143 RegisterClasses.reserve(RegClasses.size());
144 RegisterClasses.assign(RegClasses.begin(), RegClasses.end());
147 CodeGenRegisterClass::CodeGenRegisterClass(Record *R) : TheDef(R) {
148 // Rename anonymous register classes.
149 if (R->getName().size() > 9 && R->getName()[9] == '.') {
150 static unsigned AnonCounter = 0;
151 R->setName("AnonRegClass_"+utostr(AnonCounter++));
154 Namespace = R->getValueAsString("Namespace");
155 SpillSize = R->getValueAsInt("Size");
156 SpillAlignment = R->getValueAsInt("Alignment");
157 VT = getValueType(R->getValueAsDef("RegType"));
159 MethodBodies = R->getValueAsCode("MethodBodies");
160 MethodProtos = R->getValueAsCode("MethodProtos");
162 ListInit *RegList = R->getValueAsListInit("MemberList");
163 for (unsigned i = 0, e = RegList->getSize(); i != e; ++i) {
164 DefInit *RegDef = dynamic_cast<DefInit*>(RegList->getElement(i));
165 if (!RegDef) throw "Register class member is not a record!";
166 Record *Reg = RegDef->getDef();
168 if (!Reg->isSubClassOf("Register"))
169 throw "Register Class member '" + Reg->getName() +
170 "' does not derive from the Register class!";
171 Elements.push_back(Reg);
175 const std::string &CodeGenRegisterClass::getName() const {
176 return TheDef->getName();
179 void CodeGenTarget::ReadLegalValueTypes() const {
180 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
181 for (unsigned i = 0, e = RCs.size(); i != e; ++i)
182 LegalValueTypes.push_back(RCs[i].VT);
184 // Remove duplicates.
185 std::sort(LegalValueTypes.begin(), LegalValueTypes.end());
186 LegalValueTypes.erase(std::unique(LegalValueTypes.begin(),
187 LegalValueTypes.end()),
188 LegalValueTypes.end());
192 void CodeGenTarget::ReadInstructions() const {
193 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
196 throw std::string("No 'Instruction' subclasses defined!");
198 std::string InstFormatName =
199 getAsmWriter()->getValueAsString("InstFormatName");
201 for (unsigned i = 0, e = Insts.size(); i != e; ++i) {
202 std::string AsmStr = Insts[i]->getValueAsString(InstFormatName);
203 Instructions.insert(std::make_pair(Insts[i]->getName(),
204 CodeGenInstruction(Insts[i], AsmStr)));
208 /// getPHIInstruction - Return the designated PHI instruction.
210 const CodeGenInstruction &CodeGenTarget::getPHIInstruction() const {
211 Record *PHI = getInstructionSet()->getValueAsDef("PHIInst");
212 std::map<std::string, CodeGenInstruction>::const_iterator I =
213 getInstructions().find(PHI->getName());
214 if (I == Instructions.end())
215 throw "Could not find PHI instruction named '" + PHI->getName() + "'!";
219 /// getInstructionsByEnumValue - Return all of the instructions defined by the
220 /// target, ordered by their enum value.
222 getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
223 &NumberedInstructions) {
225 // Print out the rest of the instructions now.
227 const CodeGenInstruction *PHI = &getPHIInstruction();
228 NumberedInstructions.push_back(PHI);
229 for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II)
230 if (&II->second != PHI)
231 NumberedInstructions.push_back(&II->second);
235 /// isLittleEndianEncoding - Return whether this target encodes its instruction
236 /// in little-endian format, i.e. bits laid out in the order [0..n]
238 bool CodeGenTarget::isLittleEndianEncoding() const {
239 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding");
242 CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
243 : TheDef(R), AsmString(AsmStr) {
244 Name = R->getValueAsString("Name");
245 Namespace = R->getValueAsString("Namespace");
247 isReturn = R->getValueAsBit("isReturn");
248 isBranch = R->getValueAsBit("isBranch");
249 isBarrier = R->getValueAsBit("isBarrier");
250 isCall = R->getValueAsBit("isCall");
251 isLoad = R->getValueAsBit("isLoad");
252 isStore = R->getValueAsBit("isStore");
253 isTwoAddress = R->getValueAsBit("isTwoAddress");
254 isConvertibleToThreeAddress = R->getValueAsBit("isConvertibleToThreeAddress");
255 isCommutable = R->getValueAsBit("isCommutable");
256 isTerminator = R->getValueAsBit("isTerminator");
257 hasDelaySlot = R->getValueAsBit("hasDelaySlot");
258 usesCustomDAGSchedInserter = R->getValueAsBit("usesCustomDAGSchedInserter");
259 hasVariableNumberOfOperands = false;
263 DI = R->getValueAsDag("OperandList");
265 // Error getting operand list, just ignore it (sparcv9).
271 unsigned MIOperandNo = 0;
272 std::set<std::string> OperandNames;
273 for (unsigned i = 0, e = DI->getNumArgs(); i != e; ++i) {
274 DefInit *Arg = dynamic_cast<DefInit*>(DI->getArg(i));
276 throw "Illegal operand for the '" + R->getName() + "' instruction!";
278 Record *Rec = Arg->getDef();
280 std::string PrintMethod = "printOperand";
282 if (Rec->isSubClassOf("RegisterClass")) {
283 Ty = getValueType(Rec->getValueAsDef("RegType"));
284 } else if (Rec->isSubClassOf("Operand")) {
285 Ty = getValueType(Rec->getValueAsDef("Type"));
286 PrintMethod = Rec->getValueAsString("PrintMethod");
287 NumOps = Rec->getValueAsInt("NumMIOperands");
288 } else if (Rec->getName() == "variable_ops") {
289 hasVariableNumberOfOperands = true;
292 throw "Unknown operand class '" + Rec->getName() +
293 "' in instruction '" + R->getName() + "' instruction!";
295 // Check that the operand has a name and that it's unique.
296 if (DI->getArgName(i).empty())
297 throw "In instruction '" + R->getName() + "', operand #" + utostr(i) +
299 if (!OperandNames.insert(DI->getArgName(i)).second)
300 throw "In instruction '" + R->getName() + "', operand #" + utostr(i) +
301 " has the same name as a previous operand!";
303 OperandList.push_back(OperandInfo(Rec, Ty, DI->getArgName(i),
304 PrintMethod, MIOperandNo, NumOps));
305 MIOperandNo += NumOps;
311 /// getOperandNamed - Return the index of the operand with the specified
312 /// non-empty name. If the instruction does not have an operand with the
313 /// specified name, throw an exception.
315 unsigned CodeGenInstruction::getOperandNamed(const std::string &Name) const {
316 assert(!Name.empty() && "Cannot search for operand with no name!");
317 for (unsigned i = 0, e = OperandList.size(); i != e; ++i)
318 if (OperandList[i].Name == Name) return i;
319 throw "Instruction '" + TheDef->getName() +
320 "' does not have an operand named '$" + Name + "'!";