1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This class wraps target description classes used by the various code
11 // generation TableGen backends. This makes it easier to access the data and
12 // provides a single place that needs to check it for validity. All of these
13 // classes abort on error conditions.
15 //===----------------------------------------------------------------------===//
17 #include "CodeGenTarget.h"
18 #include "CodeGenIntrinsics.h"
19 #include "CodeGenSchedule.h"
20 #include "llvm/ADT/STLExtras.h"
21 #include "llvm/ADT/StringExtras.h"
22 #include "llvm/Support/CommandLine.h"
23 #include "llvm/TableGen/Error.h"
24 #include "llvm/TableGen/Record.h"
28 static cl::opt<unsigned>
29 AsmParserNum("asmparsernum", cl::init(0),
30 cl::desc("Make -gen-asm-parser emit assembly parser #N"));
32 static cl::opt<unsigned>
33 AsmWriterNum("asmwriternum", cl::init(0),
34 cl::desc("Make -gen-asm-writer emit assembly writer #N"));
36 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
37 /// record corresponds to.
38 MVT::SimpleValueType llvm::getValueType(Record *Rec) {
39 return (MVT::SimpleValueType)Rec->getValueAsInt("Value");
42 std::string llvm::getName(MVT::SimpleValueType T) {
44 case MVT::Other: return "UNKNOWN";
45 case MVT::iPTR: return "TLI.getPointerTy()";
46 case MVT::iPTRAny: return "TLI.getPointerTy()";
47 default: return getEnumName(T);
51 std::string llvm::getEnumName(MVT::SimpleValueType T) {
53 case MVT::Other: return "MVT::Other";
54 case MVT::i1: return "MVT::i1";
55 case MVT::i8: return "MVT::i8";
56 case MVT::i16: return "MVT::i16";
57 case MVT::i32: return "MVT::i32";
58 case MVT::i64: return "MVT::i64";
59 case MVT::i128: return "MVT::i128";
60 case MVT::iAny: return "MVT::iAny";
61 case MVT::fAny: return "MVT::fAny";
62 case MVT::vAny: return "MVT::vAny";
63 case MVT::f16: return "MVT::f16";
64 case MVT::f32: return "MVT::f32";
65 case MVT::f64: return "MVT::f64";
66 case MVT::f80: return "MVT::f80";
67 case MVT::f128: return "MVT::f128";
68 case MVT::ppcf128: return "MVT::ppcf128";
69 case MVT::x86mmx: return "MVT::x86mmx";
70 case MVT::Glue: return "MVT::Glue";
71 case MVT::isVoid: return "MVT::isVoid";
72 case MVT::v2i1: return "MVT::v2i1";
73 case MVT::v4i1: return "MVT::v4i1";
74 case MVT::v8i1: return "MVT::v8i1";
75 case MVT::v16i1: return "MVT::v16i1";
76 case MVT::v32i1: return "MVT::v32i1";
77 case MVT::v64i1: return "MVT::v64i1";
78 case MVT::v1i8: return "MVT::v1i8";
79 case MVT::v2i8: return "MVT::v2i8";
80 case MVT::v4i8: return "MVT::v4i8";
81 case MVT::v8i8: return "MVT::v8i8";
82 case MVT::v16i8: return "MVT::v16i8";
83 case MVT::v32i8: return "MVT::v32i8";
84 case MVT::v64i8: return "MVT::v64i8";
85 case MVT::v1i16: return "MVT::v1i16";
86 case MVT::v2i16: return "MVT::v2i16";
87 case MVT::v4i16: return "MVT::v4i16";
88 case MVT::v8i16: return "MVT::v8i16";
89 case MVT::v16i16: return "MVT::v16i16";
90 case MVT::v32i16: return "MVT::v32i16";
91 case MVT::v1i32: return "MVT::v1i32";
92 case MVT::v2i32: return "MVT::v2i32";
93 case MVT::v4i32: return "MVT::v4i32";
94 case MVT::v8i32: return "MVT::v8i32";
95 case MVT::v16i32: return "MVT::v16i32";
96 case MVT::v1i64: return "MVT::v1i64";
97 case MVT::v2i64: return "MVT::v2i64";
98 case MVT::v4i64: return "MVT::v4i64";
99 case MVT::v8i64: return "MVT::v8i64";
100 case MVT::v16i64: return "MVT::v16i64";
101 case MVT::v2f16: return "MVT::v2f16";
102 case MVT::v4f16: return "MVT::v4f16";
103 case MVT::v8f16: return "MVT::v8f16";
104 case MVT::v1f32: return "MVT::v1f32";
105 case MVT::v2f32: return "MVT::v2f32";
106 case MVT::v4f32: return "MVT::v4f32";
107 case MVT::v8f32: return "MVT::v8f32";
108 case MVT::v16f32: return "MVT::v16f32";
109 case MVT::v1f64: return "MVT::v1f64";
110 case MVT::v2f64: return "MVT::v2f64";
111 case MVT::v4f64: return "MVT::v4f64";
112 case MVT::v8f64: return "MVT::v8f64";
113 case MVT::Metadata: return "MVT::Metadata";
114 case MVT::iPTR: return "MVT::iPTR";
115 case MVT::iPTRAny: return "MVT::iPTRAny";
116 case MVT::Untyped: return "MVT::Untyped";
117 default: llvm_unreachable("ILLEGAL VALUE TYPE!");
121 /// getQualifiedName - Return the name of the specified record, with a
122 /// namespace qualifier if the record contains one.
124 std::string llvm::getQualifiedName(const Record *R) {
125 std::string Namespace;
126 if (R->getValue("Namespace"))
127 Namespace = R->getValueAsString("Namespace");
128 if (Namespace.empty()) return R->getName();
129 return Namespace + "::" + R->getName();
133 /// getTarget - Return the current instance of the Target class.
135 CodeGenTarget::CodeGenTarget(RecordKeeper &records)
136 : Records(records), RegBank(0), SchedModels(0) {
137 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target");
138 if (Targets.size() == 0)
139 PrintFatalError("ERROR: No 'Target' subclasses defined!");
140 if (Targets.size() != 1)
141 PrintFatalError("ERROR: Multiple subclasses of Target defined!");
142 TargetRec = Targets[0];
145 CodeGenTarget::~CodeGenTarget() {
150 const std::string &CodeGenTarget::getName() const {
151 return TargetRec->getName();
154 std::string CodeGenTarget::getInstNamespace() const {
155 for (inst_iterator i = inst_begin(), e = inst_end(); i != e; ++i) {
156 // Make sure not to pick up "TargetOpcode" by accidentally getting
157 // the namespace off the PHI instruction or something.
158 if ((*i)->Namespace != "TargetOpcode")
159 return (*i)->Namespace;
165 Record *CodeGenTarget::getInstructionSet() const {
166 return TargetRec->getValueAsDef("InstructionSet");
170 /// getAsmParser - Return the AssemblyParser definition for this target.
172 Record *CodeGenTarget::getAsmParser() const {
173 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyParsers");
174 if (AsmParserNum >= LI.size())
175 PrintFatalError("Target does not have an AsmParser #" + utostr(AsmParserNum) + "!");
176 return LI[AsmParserNum];
179 /// getAsmParserVariant - Return the AssmblyParserVariant definition for
182 Record *CodeGenTarget::getAsmParserVariant(unsigned i) const {
183 std::vector<Record*> LI =
184 TargetRec->getValueAsListOfDefs("AssemblyParserVariants");
186 PrintFatalError("Target does not have an AsmParserVariant #" + utostr(i) + "!");
190 /// getAsmParserVariantCount - Return the AssmblyParserVariant definition
191 /// available for this target.
193 unsigned CodeGenTarget::getAsmParserVariantCount() const {
194 std::vector<Record*> LI =
195 TargetRec->getValueAsListOfDefs("AssemblyParserVariants");
199 /// getAsmWriter - Return the AssemblyWriter definition for this target.
201 Record *CodeGenTarget::getAsmWriter() const {
202 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters");
203 if (AsmWriterNum >= LI.size())
204 PrintFatalError("Target does not have an AsmWriter #" + utostr(AsmWriterNum) + "!");
205 return LI[AsmWriterNum];
208 CodeGenRegBank &CodeGenTarget::getRegBank() const {
210 RegBank = new CodeGenRegBank(Records);
214 void CodeGenTarget::ReadRegAltNameIndices() const {
215 RegAltNameIndices = Records.getAllDerivedDefinitions("RegAltNameIndex");
216 std::sort(RegAltNameIndices.begin(), RegAltNameIndices.end(), LessRecord());
219 /// getRegisterByName - If there is a register with the specific AsmName,
221 const CodeGenRegister *CodeGenTarget::getRegisterByName(StringRef Name) const {
222 const StringMap<CodeGenRegister*> &Regs = getRegBank().getRegistersByName();
223 StringMap<CodeGenRegister*>::const_iterator I = Regs.find(Name);
229 std::vector<MVT::SimpleValueType> CodeGenTarget::
230 getRegisterVTs(Record *R) const {
231 const CodeGenRegister *Reg = getRegBank().getReg(R);
232 std::vector<MVT::SimpleValueType> Result;
233 ArrayRef<CodeGenRegisterClass*> RCs = getRegBank().getRegClasses();
234 for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
235 const CodeGenRegisterClass &RC = *RCs[i];
236 if (RC.contains(Reg)) {
237 ArrayRef<MVT::SimpleValueType> InVTs = RC.getValueTypes();
238 Result.insert(Result.end(), InVTs.begin(), InVTs.end());
242 // Remove duplicates.
243 array_pod_sort(Result.begin(), Result.end());
244 Result.erase(std::unique(Result.begin(), Result.end()), Result.end());
249 void CodeGenTarget::ReadLegalValueTypes() const {
250 ArrayRef<CodeGenRegisterClass*> RCs = getRegBank().getRegClasses();
251 for (unsigned i = 0, e = RCs.size(); i != e; ++i)
252 for (unsigned ri = 0, re = RCs[i]->VTs.size(); ri != re; ++ri)
253 LegalValueTypes.push_back(RCs[i]->VTs[ri]);
255 // Remove duplicates.
256 std::sort(LegalValueTypes.begin(), LegalValueTypes.end());
257 LegalValueTypes.erase(std::unique(LegalValueTypes.begin(),
258 LegalValueTypes.end()),
259 LegalValueTypes.end());
262 CodeGenSchedModels &CodeGenTarget::getSchedModels() const {
264 SchedModels = new CodeGenSchedModels(Records, *this);
268 void CodeGenTarget::ReadInstructions() const {
269 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
270 if (Insts.size() <= 2)
271 PrintFatalError("No 'Instruction' subclasses defined!");
273 // Parse the instructions defined in the .td file.
274 for (unsigned i = 0, e = Insts.size(); i != e; ++i)
275 Instructions[Insts[i]] = new CodeGenInstruction(Insts[i]);
278 static const CodeGenInstruction *
279 GetInstByName(const char *Name,
280 const DenseMap<const Record*, CodeGenInstruction*> &Insts,
281 RecordKeeper &Records) {
282 const Record *Rec = Records.getDef(Name);
284 DenseMap<const Record*, CodeGenInstruction*>::const_iterator
286 if (Rec == 0 || I == Insts.end())
287 PrintFatalError(std::string("Could not find '") + Name + "' instruction!");
292 /// SortInstByName - Sorting predicate to sort instructions by name.
294 struct SortInstByName {
295 bool operator()(const CodeGenInstruction *Rec1,
296 const CodeGenInstruction *Rec2) const {
297 return Rec1->TheDef->getName() < Rec2->TheDef->getName();
302 /// getInstructionsByEnumValue - Return all of the instructions defined by the
303 /// target, ordered by their enum value.
304 void CodeGenTarget::ComputeInstrsByEnum() const {
305 // The ordering here must match the ordering in TargetOpcodes.h.
306 static const char *const FixedInstrs[] = {
328 const DenseMap<const Record*, CodeGenInstruction*> &Insts = getInstructions();
329 for (const char *const *p = FixedInstrs; *p; ++p) {
330 const CodeGenInstruction *Instr = GetInstByName(*p, Insts, Records);
331 assert(Instr && "Missing target independent instruction");
332 assert(Instr->Namespace == "TargetOpcode" && "Bad namespace");
333 InstrsByEnum.push_back(Instr);
335 unsigned EndOfPredefines = InstrsByEnum.size();
337 for (DenseMap<const Record*, CodeGenInstruction*>::const_iterator
338 I = Insts.begin(), E = Insts.end(); I != E; ++I) {
339 const CodeGenInstruction *CGI = I->second;
340 if (CGI->Namespace != "TargetOpcode")
341 InstrsByEnum.push_back(CGI);
344 assert(InstrsByEnum.size() == Insts.size() && "Missing predefined instr");
346 // All of the instructions are now in random order based on the map iteration.
347 // Sort them by name.
348 std::sort(InstrsByEnum.begin()+EndOfPredefines, InstrsByEnum.end(),
353 /// isLittleEndianEncoding - Return whether this target encodes its instruction
354 /// in little-endian format, i.e. bits laid out in the order [0..n]
356 bool CodeGenTarget::isLittleEndianEncoding() const {
357 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding");
360 /// reverseBitsForLittleEndianEncoding - For little-endian instruction bit
361 /// encodings, reverse the bit order of all instructions.
362 void CodeGenTarget::reverseBitsForLittleEndianEncoding() {
363 if (!isLittleEndianEncoding())
366 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
367 for (std::vector<Record*>::iterator I = Insts.begin(), E = Insts.end();
370 if (R->getValueAsString("Namespace") == "TargetOpcode" ||
371 R->getValueAsBit("isPseudo"))
374 BitsInit *BI = R->getValueAsBitsInit("Inst");
376 unsigned numBits = BI->getNumBits();
378 SmallVector<Init *, 16> NewBits(numBits);
380 for (unsigned bit = 0, end = numBits / 2; bit != end; ++bit) {
381 unsigned bitSwapIdx = numBits - bit - 1;
382 Init *OrigBit = BI->getBit(bit);
383 Init *BitSwap = BI->getBit(bitSwapIdx);
384 NewBits[bit] = BitSwap;
385 NewBits[bitSwapIdx] = OrigBit;
388 unsigned middle = (numBits + 1) / 2;
389 NewBits[middle] = BI->getBit(middle);
392 BitsInit *NewBI = BitsInit::get(NewBits);
394 // Update the bits in reversed order so that emitInstrOpBits will get the
395 // correct endianness.
396 R->getValue("Inst")->setValue(NewBI);
400 /// guessInstructionProperties - Return true if it's OK to guess instruction
401 /// properties instead of raising an error.
403 /// This is configurable as a temporary migration aid. It will eventually be
404 /// permanently false.
405 bool CodeGenTarget::guessInstructionProperties() const {
406 return getInstructionSet()->getValueAsBit("guessInstructionProperties");
409 //===----------------------------------------------------------------------===//
410 // ComplexPattern implementation
412 ComplexPattern::ComplexPattern(Record *R) {
413 Ty = ::getValueType(R->getValueAsDef("Ty"));
414 NumOperands = R->getValueAsInt("NumOperands");
415 SelectFunc = R->getValueAsString("SelectFunc");
416 RootNodes = R->getValueAsListOfDefs("RootNodes");
418 // Parse the properties.
420 std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties");
421 for (unsigned i = 0, e = PropList.size(); i != e; ++i)
422 if (PropList[i]->getName() == "SDNPHasChain") {
423 Properties |= 1 << SDNPHasChain;
424 } else if (PropList[i]->getName() == "SDNPOptInGlue") {
425 Properties |= 1 << SDNPOptInGlue;
426 } else if (PropList[i]->getName() == "SDNPMayStore") {
427 Properties |= 1 << SDNPMayStore;
428 } else if (PropList[i]->getName() == "SDNPMayLoad") {
429 Properties |= 1 << SDNPMayLoad;
430 } else if (PropList[i]->getName() == "SDNPSideEffect") {
431 Properties |= 1 << SDNPSideEffect;
432 } else if (PropList[i]->getName() == "SDNPMemOperand") {
433 Properties |= 1 << SDNPMemOperand;
434 } else if (PropList[i]->getName() == "SDNPVariadic") {
435 Properties |= 1 << SDNPVariadic;
436 } else if (PropList[i]->getName() == "SDNPWantRoot") {
437 Properties |= 1 << SDNPWantRoot;
438 } else if (PropList[i]->getName() == "SDNPWantParent") {
439 Properties |= 1 << SDNPWantParent;
441 errs() << "Unsupported SD Node property '" << PropList[i]->getName()
442 << "' on ComplexPattern '" << R->getName() << "'!\n";
447 //===----------------------------------------------------------------------===//
448 // CodeGenIntrinsic Implementation
449 //===----------------------------------------------------------------------===//
451 std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC,
453 std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic");
455 std::vector<CodeGenIntrinsic> Result;
457 for (unsigned i = 0, e = I.size(); i != e; ++i) {
458 bool isTarget = I[i]->getValueAsBit("isTarget");
459 if (isTarget == TargetOnly)
460 Result.push_back(CodeGenIntrinsic(I[i]));
465 CodeGenIntrinsic::CodeGenIntrinsic(Record *R) {
467 std::string DefName = R->getName();
468 ModRef = ReadWriteMem;
469 isOverloaded = false;
470 isCommutative = false;
474 if (DefName.size() <= 4 ||
475 std::string(DefName.begin(), DefName.begin() + 4) != "int_")
476 PrintFatalError("Intrinsic '" + DefName + "' does not start with 'int_'!");
478 EnumName = std::string(DefName.begin()+4, DefName.end());
480 if (R->getValue("GCCBuiltinName")) // Ignore a missing GCCBuiltinName field.
481 GCCBuiltinName = R->getValueAsString("GCCBuiltinName");
483 TargetPrefix = R->getValueAsString("TargetPrefix");
484 Name = R->getValueAsString("LLVMName");
487 // If an explicit name isn't specified, derive one from the DefName.
490 for (unsigned i = 0, e = EnumName.size(); i != e; ++i)
491 Name += (EnumName[i] == '_') ? '.' : EnumName[i];
493 // Verify it starts with "llvm.".
494 if (Name.size() <= 5 ||
495 std::string(Name.begin(), Name.begin() + 5) != "llvm.")
496 PrintFatalError("Intrinsic '" + DefName + "'s name does not start with 'llvm.'!");
499 // If TargetPrefix is specified, make sure that Name starts with
500 // "llvm.<targetprefix>.".
501 if (!TargetPrefix.empty()) {
502 if (Name.size() < 6+TargetPrefix.size() ||
503 std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size())
504 != (TargetPrefix + "."))
505 PrintFatalError("Intrinsic '" + DefName + "' does not start with 'llvm." +
506 TargetPrefix + ".'!");
509 // Parse the list of return types.
510 std::vector<MVT::SimpleValueType> OverloadedVTs;
511 ListInit *TypeList = R->getValueAsListInit("RetTypes");
512 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
513 Record *TyEl = TypeList->getElementAsRecord(i);
514 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
515 MVT::SimpleValueType VT;
516 if (TyEl->isSubClassOf("LLVMMatchType")) {
517 unsigned MatchTy = TyEl->getValueAsInt("Number");
518 assert(MatchTy < OverloadedVTs.size() &&
519 "Invalid matching number!");
520 VT = OverloadedVTs[MatchTy];
521 // It only makes sense to use the extended and truncated vector element
522 // variants with iAny types; otherwise, if the intrinsic is not
523 // overloaded, all the types can be specified directly.
524 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") &&
525 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) ||
526 VT == MVT::iAny || VT == MVT::vAny) &&
527 "Expected iAny or vAny type");
529 VT = getValueType(TyEl->getValueAsDef("VT"));
531 if (EVT(VT).isOverloaded()) {
532 OverloadedVTs.push_back(VT);
536 // Reject invalid types.
537 if (VT == MVT::isVoid)
538 PrintFatalError("Intrinsic '" + DefName + " has void in result type list!");
540 IS.RetVTs.push_back(VT);
541 IS.RetTypeDefs.push_back(TyEl);
544 // Parse the list of parameter types.
545 TypeList = R->getValueAsListInit("ParamTypes");
546 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
547 Record *TyEl = TypeList->getElementAsRecord(i);
548 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
549 MVT::SimpleValueType VT;
550 if (TyEl->isSubClassOf("LLVMMatchType")) {
551 unsigned MatchTy = TyEl->getValueAsInt("Number");
552 assert(MatchTy < OverloadedVTs.size() &&
553 "Invalid matching number!");
554 VT = OverloadedVTs[MatchTy];
555 // It only makes sense to use the extended and truncated vector element
556 // variants with iAny types; otherwise, if the intrinsic is not
557 // overloaded, all the types can be specified directly.
558 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") &&
559 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) ||
560 VT == MVT::iAny || VT == MVT::vAny) &&
561 "Expected iAny or vAny type");
563 VT = getValueType(TyEl->getValueAsDef("VT"));
565 if (EVT(VT).isOverloaded()) {
566 OverloadedVTs.push_back(VT);
570 // Reject invalid types.
571 if (VT == MVT::isVoid && i != e-1 /*void at end means varargs*/)
572 PrintFatalError("Intrinsic '" + DefName + " has void in result type list!");
574 IS.ParamVTs.push_back(VT);
575 IS.ParamTypeDefs.push_back(TyEl);
578 // Parse the intrinsic properties.
579 ListInit *PropList = R->getValueAsListInit("Properties");
580 for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) {
581 Record *Property = PropList->getElementAsRecord(i);
582 assert(Property->isSubClassOf("IntrinsicProperty") &&
583 "Expected a property!");
585 if (Property->getName() == "IntrNoMem")
587 else if (Property->getName() == "IntrReadArgMem")
589 else if (Property->getName() == "IntrReadMem")
591 else if (Property->getName() == "IntrReadWriteArgMem")
592 ModRef = ReadWriteArgMem;
593 else if (Property->getName() == "Commutative")
594 isCommutative = true;
595 else if (Property->getName() == "Throws")
597 else if (Property->getName() == "IntrNoReturn")
599 else if (Property->isSubClassOf("NoCapture")) {
600 unsigned ArgNo = Property->getValueAsInt("ArgNo");
601 ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture));
602 } else if (Property->isSubClassOf("ReadOnly")) {
603 unsigned ArgNo = Property->getValueAsInt("ArgNo");
604 ArgumentAttributes.push_back(std::make_pair(ArgNo, ReadOnly));
605 } else if (Property->isSubClassOf("ReadNone")) {
606 unsigned ArgNo = Property->getValueAsInt("ArgNo");
607 ArgumentAttributes.push_back(std::make_pair(ArgNo, ReadNone));
609 llvm_unreachable("Unknown property!");
612 // Sort the argument attributes for later benefit.
613 std::sort(ArgumentAttributes.begin(), ArgumentAttributes.end());