1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This class wraps target description classes used by the various code
11 // generation TableGen backends. This makes it easier to access the data and
12 // provides a single place that needs to check it for validity. All of these
13 // classes abort on error conditions.
15 //===----------------------------------------------------------------------===//
17 #include "CodeGenTarget.h"
18 #include "CodeGenIntrinsics.h"
19 #include "CodeGenSchedule.h"
20 #include "llvm/ADT/STLExtras.h"
21 #include "llvm/ADT/StringExtras.h"
22 #include "llvm/Support/CommandLine.h"
23 #include "llvm/TableGen/Error.h"
24 #include "llvm/TableGen/Record.h"
28 static cl::opt<unsigned>
29 AsmParserNum("asmparsernum", cl::init(0),
30 cl::desc("Make -gen-asm-parser emit assembly parser #N"));
32 static cl::opt<unsigned>
33 AsmWriterNum("asmwriternum", cl::init(0),
34 cl::desc("Make -gen-asm-writer emit assembly writer #N"));
36 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
37 /// record corresponds to.
38 MVT::SimpleValueType llvm::getValueType(Record *Rec) {
39 return (MVT::SimpleValueType)Rec->getValueAsInt("Value");
42 std::string llvm::getName(MVT::SimpleValueType T) {
44 case MVT::Other: return "UNKNOWN";
45 case MVT::iPTR: return "TLI.getPointerTy()";
46 case MVT::iPTRAny: return "TLI.getPointerTy()";
47 default: return getEnumName(T);
51 std::string llvm::getEnumName(MVT::SimpleValueType T) {
53 case MVT::Other: return "MVT::Other";
54 case MVT::i1: return "MVT::i1";
55 case MVT::i8: return "MVT::i8";
56 case MVT::i16: return "MVT::i16";
57 case MVT::i32: return "MVT::i32";
58 case MVT::i64: return "MVT::i64";
59 case MVT::i128: return "MVT::i128";
60 case MVT::iAny: return "MVT::iAny";
61 case MVT::fAny: return "MVT::fAny";
62 case MVT::vAny: return "MVT::vAny";
63 case MVT::f16: return "MVT::f16";
64 case MVT::f32: return "MVT::f32";
65 case MVT::f64: return "MVT::f64";
66 case MVT::f80: return "MVT::f80";
67 case MVT::f128: return "MVT::f128";
68 case MVT::ppcf128: return "MVT::ppcf128";
69 case MVT::x86mmx: return "MVT::x86mmx";
70 case MVT::Glue: return "MVT::Glue";
71 case MVT::isVoid: return "MVT::isVoid";
72 case MVT::v2i1: return "MVT::v2i1";
73 case MVT::v4i1: return "MVT::v4i1";
74 case MVT::v8i1: return "MVT::v8i1";
75 case MVT::v16i1: return "MVT::v16i1";
76 case MVT::v32i1: return "MVT::v32i1";
77 case MVT::v64i1: return "MVT::v64i1";
78 case MVT::v1i8: return "MVT::v1i8";
79 case MVT::v2i8: return "MVT::v2i8";
80 case MVT::v4i8: return "MVT::v4i8";
81 case MVT::v8i8: return "MVT::v8i8";
82 case MVT::v16i8: return "MVT::v16i8";
83 case MVT::v32i8: return "MVT::v32i8";
84 case MVT::v64i8: return "MVT::v64i8";
85 case MVT::v1i16: return "MVT::v1i16";
86 case MVT::v2i16: return "MVT::v2i16";
87 case MVT::v4i16: return "MVT::v4i16";
88 case MVT::v8i16: return "MVT::v8i16";
89 case MVT::v16i16: return "MVT::v16i16";
90 case MVT::v32i16: return "MVT::v32i16";
91 case MVT::v1i32: return "MVT::v1i32";
92 case MVT::v2i32: return "MVT::v2i32";
93 case MVT::v4i32: return "MVT::v4i32";
94 case MVT::v8i32: return "MVT::v8i32";
95 case MVT::v16i32: return "MVT::v16i32";
96 case MVT::v1i64: return "MVT::v1i64";
97 case MVT::v2i64: return "MVT::v2i64";
98 case MVT::v4i64: return "MVT::v4i64";
99 case MVT::v8i64: return "MVT::v8i64";
100 case MVT::v16i64: return "MVT::v16i64";
101 case MVT::v2f16: return "MVT::v2f16";
102 case MVT::v4f16: return "MVT::v4f16";
103 case MVT::v8f16: return "MVT::v8f16";
104 case MVT::v1f32: return "MVT::v1f32";
105 case MVT::v2f32: return "MVT::v2f32";
106 case MVT::v4f32: return "MVT::v4f32";
107 case MVT::v8f32: return "MVT::v8f32";
108 case MVT::v16f32: return "MVT::v16f32";
109 case MVT::v1f64: return "MVT::v1f64";
110 case MVT::v2f64: return "MVT::v2f64";
111 case MVT::v4f64: return "MVT::v4f64";
112 case MVT::v8f64: return "MVT::v8f64";
113 case MVT::Metadata: return "MVT::Metadata";
114 case MVT::iPTR: return "MVT::iPTR";
115 case MVT::iPTRAny: return "MVT::iPTRAny";
116 case MVT::Untyped: return "MVT::Untyped";
117 default: llvm_unreachable("ILLEGAL VALUE TYPE!");
121 /// getQualifiedName - Return the name of the specified record, with a
122 /// namespace qualifier if the record contains one.
124 std::string llvm::getQualifiedName(const Record *R) {
125 std::string Namespace;
126 if (R->getValue("Namespace"))
127 Namespace = R->getValueAsString("Namespace");
128 if (Namespace.empty()) return R->getName();
129 return Namespace + "::" + R->getName();
133 /// getTarget - Return the current instance of the Target class.
135 CodeGenTarget::CodeGenTarget(RecordKeeper &records)
136 : Records(records), RegBank(nullptr), SchedModels(nullptr) {
137 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target");
138 if (Targets.size() == 0)
139 PrintFatalError("ERROR: No 'Target' subclasses defined!");
140 if (Targets.size() != 1)
141 PrintFatalError("ERROR: Multiple subclasses of Target defined!");
142 TargetRec = Targets[0];
145 CodeGenTarget::~CodeGenTarget() {
146 DeleteContainerSeconds(Instructions);
151 const std::string &CodeGenTarget::getName() const {
152 return TargetRec->getName();
155 std::string CodeGenTarget::getInstNamespace() const {
156 for (inst_iterator i = inst_begin(), e = inst_end(); i != e; ++i) {
157 // Make sure not to pick up "TargetOpcode" by accidentally getting
158 // the namespace off the PHI instruction or something.
159 if ((*i)->Namespace != "TargetOpcode")
160 return (*i)->Namespace;
166 Record *CodeGenTarget::getInstructionSet() const {
167 return TargetRec->getValueAsDef("InstructionSet");
171 /// getAsmParser - Return the AssemblyParser definition for this target.
173 Record *CodeGenTarget::getAsmParser() const {
174 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyParsers");
175 if (AsmParserNum >= LI.size())
176 PrintFatalError("Target does not have an AsmParser #" +
177 Twine(AsmParserNum) + "!");
178 return LI[AsmParserNum];
181 /// getAsmParserVariant - Return the AssmblyParserVariant definition for
184 Record *CodeGenTarget::getAsmParserVariant(unsigned i) const {
185 std::vector<Record*> LI =
186 TargetRec->getValueAsListOfDefs("AssemblyParserVariants");
188 PrintFatalError("Target does not have an AsmParserVariant #" + Twine(i) +
193 /// getAsmParserVariantCount - Return the AssmblyParserVariant definition
194 /// available for this target.
196 unsigned CodeGenTarget::getAsmParserVariantCount() const {
197 std::vector<Record*> LI =
198 TargetRec->getValueAsListOfDefs("AssemblyParserVariants");
202 /// getAsmWriter - Return the AssemblyWriter definition for this target.
204 Record *CodeGenTarget::getAsmWriter() const {
205 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters");
206 if (AsmWriterNum >= LI.size())
207 PrintFatalError("Target does not have an AsmWriter #" +
208 Twine(AsmWriterNum) + "!");
209 return LI[AsmWriterNum];
212 CodeGenRegBank &CodeGenTarget::getRegBank() const {
214 RegBank = new CodeGenRegBank(Records);
218 void CodeGenTarget::ReadRegAltNameIndices() const {
219 RegAltNameIndices = Records.getAllDerivedDefinitions("RegAltNameIndex");
220 std::sort(RegAltNameIndices.begin(), RegAltNameIndices.end(), LessRecord());
223 /// getRegisterByName - If there is a register with the specific AsmName,
225 const CodeGenRegister *CodeGenTarget::getRegisterByName(StringRef Name) const {
226 const StringMap<CodeGenRegister*> &Regs = getRegBank().getRegistersByName();
227 StringMap<CodeGenRegister*>::const_iterator I = Regs.find(Name);
233 std::vector<MVT::SimpleValueType> CodeGenTarget::
234 getRegisterVTs(Record *R) const {
235 const CodeGenRegister *Reg = getRegBank().getReg(R);
236 std::vector<MVT::SimpleValueType> Result;
237 ArrayRef<CodeGenRegisterClass*> RCs = getRegBank().getRegClasses();
238 for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
239 const CodeGenRegisterClass &RC = *RCs[i];
240 if (RC.contains(Reg)) {
241 ArrayRef<MVT::SimpleValueType> InVTs = RC.getValueTypes();
242 Result.insert(Result.end(), InVTs.begin(), InVTs.end());
246 // Remove duplicates.
247 array_pod_sort(Result.begin(), Result.end());
248 Result.erase(std::unique(Result.begin(), Result.end()), Result.end());
253 void CodeGenTarget::ReadLegalValueTypes() const {
254 ArrayRef<CodeGenRegisterClass*> RCs = getRegBank().getRegClasses();
255 for (unsigned i = 0, e = RCs.size(); i != e; ++i)
256 for (unsigned ri = 0, re = RCs[i]->VTs.size(); ri != re; ++ri)
257 LegalValueTypes.push_back(RCs[i]->VTs[ri]);
259 // Remove duplicates.
260 std::sort(LegalValueTypes.begin(), LegalValueTypes.end());
261 LegalValueTypes.erase(std::unique(LegalValueTypes.begin(),
262 LegalValueTypes.end()),
263 LegalValueTypes.end());
266 CodeGenSchedModels &CodeGenTarget::getSchedModels() const {
268 SchedModels = new CodeGenSchedModels(Records, *this);
272 void CodeGenTarget::ReadInstructions() const {
273 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
274 if (Insts.size() <= 2)
275 PrintFatalError("No 'Instruction' subclasses defined!");
277 // Parse the instructions defined in the .td file.
278 for (unsigned i = 0, e = Insts.size(); i != e; ++i)
279 Instructions[Insts[i]] = new CodeGenInstruction(Insts[i]);
282 static const CodeGenInstruction *
283 GetInstByName(const char *Name,
284 const DenseMap<const Record*, CodeGenInstruction*> &Insts,
285 RecordKeeper &Records) {
286 const Record *Rec = Records.getDef(Name);
288 DenseMap<const Record*, CodeGenInstruction*>::const_iterator
290 if (!Rec || I == Insts.end())
291 PrintFatalError(Twine("Could not find '") + Name + "' instruction!");
295 /// \brief Return all of the instructions defined by the target, ordered by
296 /// their enum value.
297 void CodeGenTarget::ComputeInstrsByEnum() const {
298 // The ordering here must match the ordering in TargetOpcodes.h.
299 static const char *const FixedInstrs[] = {
300 "PHI", "INLINEASM", "CFI_INSTRUCTION", "EH_LABEL",
301 "GC_LABEL", "KILL", "EXTRACT_SUBREG", "INSERT_SUBREG",
302 "IMPLICIT_DEF", "SUBREG_TO_REG", "COPY_TO_REGCLASS", "DBG_VALUE",
303 "REG_SEQUENCE", "COPY", "BUNDLE", "LIFETIME_START",
304 "LIFETIME_END", "STACKMAP", "PATCHPOINT", "LOAD_STACK_GUARD",
306 const DenseMap<const Record*, CodeGenInstruction*> &Insts = getInstructions();
307 for (const char *const *p = FixedInstrs; *p; ++p) {
308 const CodeGenInstruction *Instr = GetInstByName(*p, Insts, Records);
309 assert(Instr && "Missing target independent instruction");
310 assert(Instr->Namespace == "TargetOpcode" && "Bad namespace");
311 InstrsByEnum.push_back(Instr);
313 unsigned EndOfPredefines = InstrsByEnum.size();
315 for (DenseMap<const Record*, CodeGenInstruction*>::const_iterator
316 I = Insts.begin(), E = Insts.end(); I != E; ++I) {
317 const CodeGenInstruction *CGI = I->second;
318 if (CGI->Namespace != "TargetOpcode")
319 InstrsByEnum.push_back(CGI);
322 assert(InstrsByEnum.size() == Insts.size() && "Missing predefined instr");
324 // All of the instructions are now in random order based on the map iteration.
325 // Sort them by name.
326 std::sort(InstrsByEnum.begin() + EndOfPredefines, InstrsByEnum.end(),
327 [](const CodeGenInstruction *Rec1, const CodeGenInstruction *Rec2) {
328 return Rec1->TheDef->getName() < Rec2->TheDef->getName();
333 /// isLittleEndianEncoding - Return whether this target encodes its instruction
334 /// in little-endian format, i.e. bits laid out in the order [0..n]
336 bool CodeGenTarget::isLittleEndianEncoding() const {
337 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding");
340 /// reverseBitsForLittleEndianEncoding - For little-endian instruction bit
341 /// encodings, reverse the bit order of all instructions.
342 void CodeGenTarget::reverseBitsForLittleEndianEncoding() {
343 if (!isLittleEndianEncoding())
346 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
347 for (std::vector<Record*>::iterator I = Insts.begin(), E = Insts.end();
350 if (R->getValueAsString("Namespace") == "TargetOpcode" ||
351 R->getValueAsBit("isPseudo"))
354 BitsInit *BI = R->getValueAsBitsInit("Inst");
356 unsigned numBits = BI->getNumBits();
358 SmallVector<Init *, 16> NewBits(numBits);
360 for (unsigned bit = 0, end = numBits / 2; bit != end; ++bit) {
361 unsigned bitSwapIdx = numBits - bit - 1;
362 Init *OrigBit = BI->getBit(bit);
363 Init *BitSwap = BI->getBit(bitSwapIdx);
364 NewBits[bit] = BitSwap;
365 NewBits[bitSwapIdx] = OrigBit;
368 unsigned middle = (numBits + 1) / 2;
369 NewBits[middle] = BI->getBit(middle);
372 BitsInit *NewBI = BitsInit::get(NewBits);
374 // Update the bits in reversed order so that emitInstrOpBits will get the
375 // correct endianness.
376 R->getValue("Inst")->setValue(NewBI);
380 /// guessInstructionProperties - Return true if it's OK to guess instruction
381 /// properties instead of raising an error.
383 /// This is configurable as a temporary migration aid. It will eventually be
384 /// permanently false.
385 bool CodeGenTarget::guessInstructionProperties() const {
386 return getInstructionSet()->getValueAsBit("guessInstructionProperties");
389 //===----------------------------------------------------------------------===//
390 // ComplexPattern implementation
392 ComplexPattern::ComplexPattern(Record *R) {
393 Ty = ::getValueType(R->getValueAsDef("Ty"));
394 NumOperands = R->getValueAsInt("NumOperands");
395 SelectFunc = R->getValueAsString("SelectFunc");
396 RootNodes = R->getValueAsListOfDefs("RootNodes");
398 // Parse the properties.
400 std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties");
401 for (unsigned i = 0, e = PropList.size(); i != e; ++i)
402 if (PropList[i]->getName() == "SDNPHasChain") {
403 Properties |= 1 << SDNPHasChain;
404 } else if (PropList[i]->getName() == "SDNPOptInGlue") {
405 Properties |= 1 << SDNPOptInGlue;
406 } else if (PropList[i]->getName() == "SDNPMayStore") {
407 Properties |= 1 << SDNPMayStore;
408 } else if (PropList[i]->getName() == "SDNPMayLoad") {
409 Properties |= 1 << SDNPMayLoad;
410 } else if (PropList[i]->getName() == "SDNPSideEffect") {
411 Properties |= 1 << SDNPSideEffect;
412 } else if (PropList[i]->getName() == "SDNPMemOperand") {
413 Properties |= 1 << SDNPMemOperand;
414 } else if (PropList[i]->getName() == "SDNPVariadic") {
415 Properties |= 1 << SDNPVariadic;
416 } else if (PropList[i]->getName() == "SDNPWantRoot") {
417 Properties |= 1 << SDNPWantRoot;
418 } else if (PropList[i]->getName() == "SDNPWantParent") {
419 Properties |= 1 << SDNPWantParent;
421 errs() << "Unsupported SD Node property '" << PropList[i]->getName()
422 << "' on ComplexPattern '" << R->getName() << "'!\n";
427 //===----------------------------------------------------------------------===//
428 // CodeGenIntrinsic Implementation
429 //===----------------------------------------------------------------------===//
431 std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC,
433 std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic");
435 std::vector<CodeGenIntrinsic> Result;
437 for (unsigned i = 0, e = I.size(); i != e; ++i) {
438 bool isTarget = I[i]->getValueAsBit("isTarget");
439 if (isTarget == TargetOnly)
440 Result.push_back(CodeGenIntrinsic(I[i]));
445 CodeGenIntrinsic::CodeGenIntrinsic(Record *R) {
447 std::string DefName = R->getName();
448 ModRef = ReadWriteMem;
449 isOverloaded = false;
450 isCommutative = false;
453 isNoDuplicate = false;
455 if (DefName.size() <= 4 ||
456 std::string(DefName.begin(), DefName.begin() + 4) != "int_")
457 PrintFatalError("Intrinsic '" + DefName + "' does not start with 'int_'!");
459 EnumName = std::string(DefName.begin()+4, DefName.end());
461 if (R->getValue("GCCBuiltinName")) // Ignore a missing GCCBuiltinName field.
462 GCCBuiltinName = R->getValueAsString("GCCBuiltinName");
463 if (R->getValue("MSBuiltinName")) // Ignore a missing MSBuiltinName field.
464 MSBuiltinName = R->getValueAsString("MSBuiltinName");
466 TargetPrefix = R->getValueAsString("TargetPrefix");
467 Name = R->getValueAsString("LLVMName");
470 // If an explicit name isn't specified, derive one from the DefName.
473 for (unsigned i = 0, e = EnumName.size(); i != e; ++i)
474 Name += (EnumName[i] == '_') ? '.' : EnumName[i];
476 // Verify it starts with "llvm.".
477 if (Name.size() <= 5 ||
478 std::string(Name.begin(), Name.begin() + 5) != "llvm.")
479 PrintFatalError("Intrinsic '" + DefName + "'s name does not start with 'llvm.'!");
482 // If TargetPrefix is specified, make sure that Name starts with
483 // "llvm.<targetprefix>.".
484 if (!TargetPrefix.empty()) {
485 if (Name.size() < 6+TargetPrefix.size() ||
486 std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size())
487 != (TargetPrefix + "."))
488 PrintFatalError("Intrinsic '" + DefName + "' does not start with 'llvm." +
489 TargetPrefix + ".'!");
492 // Parse the list of return types.
493 std::vector<MVT::SimpleValueType> OverloadedVTs;
494 ListInit *TypeList = R->getValueAsListInit("RetTypes");
495 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
496 Record *TyEl = TypeList->getElementAsRecord(i);
497 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
498 MVT::SimpleValueType VT;
499 if (TyEl->isSubClassOf("LLVMMatchType")) {
500 unsigned MatchTy = TyEl->getValueAsInt("Number");
501 assert(MatchTy < OverloadedVTs.size() &&
502 "Invalid matching number!");
503 VT = OverloadedVTs[MatchTy];
504 // It only makes sense to use the extended and truncated vector element
505 // variants with iAny types; otherwise, if the intrinsic is not
506 // overloaded, all the types can be specified directly.
507 assert(((!TyEl->isSubClassOf("LLVMExtendedType") &&
508 !TyEl->isSubClassOf("LLVMTruncatedType")) ||
509 VT == MVT::iAny || VT == MVT::vAny) &&
510 "Expected iAny or vAny type");
512 VT = getValueType(TyEl->getValueAsDef("VT"));
514 if (MVT(VT).isOverloaded()) {
515 OverloadedVTs.push_back(VT);
519 // Reject invalid types.
520 if (VT == MVT::isVoid)
521 PrintFatalError("Intrinsic '" + DefName + " has void in result type list!");
523 IS.RetVTs.push_back(VT);
524 IS.RetTypeDefs.push_back(TyEl);
527 // Parse the list of parameter types.
528 TypeList = R->getValueAsListInit("ParamTypes");
529 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
530 Record *TyEl = TypeList->getElementAsRecord(i);
531 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
532 MVT::SimpleValueType VT;
533 if (TyEl->isSubClassOf("LLVMMatchType")) {
534 unsigned MatchTy = TyEl->getValueAsInt("Number");
535 assert(MatchTy < OverloadedVTs.size() &&
536 "Invalid matching number!");
537 VT = OverloadedVTs[MatchTy];
538 // It only makes sense to use the extended and truncated vector element
539 // variants with iAny types; otherwise, if the intrinsic is not
540 // overloaded, all the types can be specified directly.
541 assert(((!TyEl->isSubClassOf("LLVMExtendedType") &&
542 !TyEl->isSubClassOf("LLVMTruncatedType")) ||
543 VT == MVT::iAny || VT == MVT::vAny) &&
544 "Expected iAny or vAny type");
546 VT = getValueType(TyEl->getValueAsDef("VT"));
548 if (MVT(VT).isOverloaded()) {
549 OverloadedVTs.push_back(VT);
553 // Reject invalid types.
554 if (VT == MVT::isVoid && i != e-1 /*void at end means varargs*/)
555 PrintFatalError("Intrinsic '" + DefName + " has void in result type list!");
557 IS.ParamVTs.push_back(VT);
558 IS.ParamTypeDefs.push_back(TyEl);
561 // Parse the intrinsic properties.
562 ListInit *PropList = R->getValueAsListInit("Properties");
563 for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) {
564 Record *Property = PropList->getElementAsRecord(i);
565 assert(Property->isSubClassOf("IntrinsicProperty") &&
566 "Expected a property!");
568 if (Property->getName() == "IntrNoMem")
570 else if (Property->getName() == "IntrReadArgMem")
572 else if (Property->getName() == "IntrReadMem")
574 else if (Property->getName() == "IntrReadWriteArgMem")
575 ModRef = ReadWriteArgMem;
576 else if (Property->getName() == "Commutative")
577 isCommutative = true;
578 else if (Property->getName() == "Throws")
580 else if (Property->getName() == "IntrNoDuplicate")
581 isNoDuplicate = true;
582 else if (Property->getName() == "IntrNoReturn")
584 else if (Property->isSubClassOf("NoCapture")) {
585 unsigned ArgNo = Property->getValueAsInt("ArgNo");
586 ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture));
587 } else if (Property->isSubClassOf("ReadOnly")) {
588 unsigned ArgNo = Property->getValueAsInt("ArgNo");
589 ArgumentAttributes.push_back(std::make_pair(ArgNo, ReadOnly));
590 } else if (Property->isSubClassOf("ReadNone")) {
591 unsigned ArgNo = Property->getValueAsInt("ArgNo");
592 ArgumentAttributes.push_back(std::make_pair(ArgNo, ReadNone));
594 llvm_unreachable("Unknown property!");
597 // Sort the argument attributes for later benefit.
598 std::sort(ArgumentAttributes.begin(), ArgumentAttributes.end());