1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This class wraps target description classes used by the various code
11 // generation TableGen backends. This makes it easier to access the data and
12 // provides a single place that needs to check it for validity. All of these
13 // classes throw exceptions on error conditions.
15 //===----------------------------------------------------------------------===//
17 #include "CodeGenTarget.h"
18 #include "CodeGenIntrinsics.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/ADT/STLExtras.h"
22 #include "llvm/Support/CommandLine.h"
26 static cl::opt<unsigned>
27 AsmParserNum("asmparsernum", cl::init(0),
28 cl::desc("Make -gen-asm-parser emit assembly parser #N"));
30 static cl::opt<unsigned>
31 AsmWriterNum("asmwriternum", cl::init(0),
32 cl::desc("Make -gen-asm-writer emit assembly writer #N"));
34 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
35 /// record corresponds to.
36 MVT::SimpleValueType llvm::getValueType(Record *Rec) {
37 return (MVT::SimpleValueType)Rec->getValueAsInt("Value");
40 std::string llvm::getName(MVT::SimpleValueType T) {
42 case MVT::Other: return "UNKNOWN";
43 case MVT::iPTR: return "TLI.getPointerTy()";
44 case MVT::iPTRAny: return "TLI.getPointerTy()";
45 default: return getEnumName(T);
49 std::string llvm::getEnumName(MVT::SimpleValueType T) {
51 case MVT::Other: return "MVT::Other";
52 case MVT::i1: return "MVT::i1";
53 case MVT::i8: return "MVT::i8";
54 case MVT::i16: return "MVT::i16";
55 case MVT::i32: return "MVT::i32";
56 case MVT::i64: return "MVT::i64";
57 case MVT::i128: return "MVT::i128";
58 case MVT::iAny: return "MVT::iAny";
59 case MVT::fAny: return "MVT::fAny";
60 case MVT::vAny: return "MVT::vAny";
61 case MVT::f32: return "MVT::f32";
62 case MVT::f64: return "MVT::f64";
63 case MVT::f80: return "MVT::f80";
64 case MVT::f128: return "MVT::f128";
65 case MVT::ppcf128: return "MVT::ppcf128";
66 case MVT::Flag: return "MVT::Flag";
67 case MVT::isVoid:return "MVT::isVoid";
68 case MVT::v2i8: return "MVT::v2i8";
69 case MVT::v4i8: return "MVT::v4i8";
70 case MVT::v8i8: return "MVT::v8i8";
71 case MVT::v16i8: return "MVT::v16i8";
72 case MVT::v32i8: return "MVT::v32i8";
73 case MVT::v2i16: return "MVT::v2i16";
74 case MVT::v4i16: return "MVT::v4i16";
75 case MVT::v8i16: return "MVT::v8i16";
76 case MVT::v16i16: return "MVT::v16i16";
77 case MVT::v2i32: return "MVT::v2i32";
78 case MVT::v4i32: return "MVT::v4i32";
79 case MVT::v8i32: return "MVT::v8i32";
80 case MVT::v1i64: return "MVT::v1i64";
81 case MVT::v2i64: return "MVT::v2i64";
82 case MVT::v4i64: return "MVT::v4i64";
83 case MVT::v8i64: return "MVT::v8i64";
84 case MVT::v2f32: return "MVT::v2f32";
85 case MVT::v4f32: return "MVT::v4f32";
86 case MVT::v8f32: return "MVT::v8f32";
87 case MVT::v2f64: return "MVT::v2f64";
88 case MVT::v4f64: return "MVT::v4f64";
89 case MVT::Metadata: return "MVT::Metadata";
90 case MVT::iPTR: return "MVT::iPTR";
91 case MVT::iPTRAny: return "MVT::iPTRAny";
92 default: assert(0 && "ILLEGAL VALUE TYPE!"); return "";
96 /// getQualifiedName - Return the name of the specified record, with a
97 /// namespace qualifier if the record contains one.
99 std::string llvm::getQualifiedName(const Record *R) {
100 std::string Namespace = R->getValueAsString("Namespace");
101 if (Namespace.empty()) return R->getName();
102 return Namespace + "::" + R->getName();
108 /// getTarget - Return the current instance of the Target class.
110 CodeGenTarget::CodeGenTarget() {
111 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target");
112 if (Targets.size() == 0)
113 throw std::string("ERROR: No 'Target' subclasses defined!");
114 if (Targets.size() != 1)
115 throw std::string("ERROR: Multiple subclasses of Target defined!");
116 TargetRec = Targets[0];
120 const std::string &CodeGenTarget::getName() const {
121 return TargetRec->getName();
124 std::string CodeGenTarget::getInstNamespace() const {
125 for (inst_iterator i = inst_begin(), e = inst_end(); i != e; ++i) {
126 // Make sure not to pick up "TargetOpcode" by accidentally getting
127 // the namespace off the PHI instruction or something.
128 if ((*i)->Namespace != "TargetOpcode")
129 return (*i)->Namespace;
135 Record *CodeGenTarget::getInstructionSet() const {
136 return TargetRec->getValueAsDef("InstructionSet");
140 /// getAsmParser - Return the AssemblyParser definition for this target.
142 Record *CodeGenTarget::getAsmParser() const {
143 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyParsers");
144 if (AsmParserNum >= LI.size())
145 throw "Target does not have an AsmParser #" + utostr(AsmParserNum) + "!";
146 return LI[AsmParserNum];
149 /// getAsmWriter - Return the AssemblyWriter definition for this target.
151 Record *CodeGenTarget::getAsmWriter() const {
152 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters");
153 if (AsmWriterNum >= LI.size())
154 throw "Target does not have an AsmWriter #" + utostr(AsmWriterNum) + "!";
155 return LI[AsmWriterNum];
158 void CodeGenTarget::ReadRegisters() const {
159 std::vector<Record*> Regs = Records.getAllDerivedDefinitions("Register");
161 throw std::string("No 'Register' subclasses defined!");
163 Registers.reserve(Regs.size());
164 Registers.assign(Regs.begin(), Regs.end());
167 CodeGenRegister::CodeGenRegister(Record *R) : TheDef(R) {
168 DeclaredSpillSize = R->getValueAsInt("SpillSize");
169 DeclaredSpillAlignment = R->getValueAsInt("SpillAlignment");
172 const std::string &CodeGenRegister::getName() const {
173 return TheDef->getName();
176 void CodeGenTarget::ReadSubRegIndices() const {
177 SubRegIndices = Records.getAllDerivedDefinitions("SubRegIndex");
180 void CodeGenTarget::ReadRegisterClasses() const {
181 std::vector<Record*> RegClasses =
182 Records.getAllDerivedDefinitions("RegisterClass");
183 if (RegClasses.empty())
184 throw std::string("No 'RegisterClass' subclasses defined!");
186 RegisterClasses.reserve(RegClasses.size());
187 RegisterClasses.assign(RegClasses.begin(), RegClasses.end());
190 std::vector<MVT::SimpleValueType> CodeGenTarget::
191 getRegisterVTs(Record *R) const {
192 std::vector<MVT::SimpleValueType> Result;
193 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
194 for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
195 const CodeGenRegisterClass &RC = RegisterClasses[i];
196 for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) {
197 if (R == RC.Elements[ei]) {
198 const std::vector<MVT::SimpleValueType> &InVTs = RC.getValueTypes();
199 Result.insert(Result.end(), InVTs.begin(), InVTs.end());
204 // Remove duplicates.
205 array_pod_sort(Result.begin(), Result.end());
206 Result.erase(std::unique(Result.begin(), Result.end()), Result.end());
211 CodeGenRegisterClass::CodeGenRegisterClass(Record *R) : TheDef(R) {
212 // Rename anonymous register classes.
213 if (R->getName().size() > 9 && R->getName()[9] == '.') {
214 static unsigned AnonCounter = 0;
215 R->setName("AnonRegClass_"+utostr(AnonCounter++));
218 std::vector<Record*> TypeList = R->getValueAsListOfDefs("RegTypes");
219 for (unsigned i = 0, e = TypeList.size(); i != e; ++i) {
220 Record *Type = TypeList[i];
221 if (!Type->isSubClassOf("ValueType"))
222 throw "RegTypes list member '" + Type->getName() +
223 "' does not derive from the ValueType class!";
224 VTs.push_back(getValueType(Type));
226 assert(!VTs.empty() && "RegisterClass must contain at least one ValueType!");
228 std::vector<Record*> RegList = R->getValueAsListOfDefs("MemberList");
229 for (unsigned i = 0, e = RegList.size(); i != e; ++i) {
230 Record *Reg = RegList[i];
231 if (!Reg->isSubClassOf("Register"))
232 throw "Register Class member '" + Reg->getName() +
233 "' does not derive from the Register class!";
234 Elements.push_back(Reg);
237 // SubRegClasses is a list<dag> containing (RC, subregindex, ...) dags.
238 ListInit *SRC = R->getValueAsListInit("SubRegClasses");
239 for (ListInit::const_iterator i = SRC->begin(), e = SRC->end(); i != e; ++i) {
240 DagInit *DAG = dynamic_cast<DagInit*>(*i);
241 if (!DAG) throw "SubRegClasses must contain DAGs";
242 DefInit *DAGOp = dynamic_cast<DefInit*>(DAG->getOperator());
244 if (!DAGOp || !(RCRec = DAGOp->getDef())->isSubClassOf("RegisterClass"))
245 throw "Operator '" + DAG->getOperator()->getAsString() +
246 "' in SubRegClasses is not a RegisterClass";
247 // Iterate over args, all SubRegIndex instances.
248 for (DagInit::const_arg_iterator ai = DAG->arg_begin(), ae = DAG->arg_end();
250 DefInit *Idx = dynamic_cast<DefInit*>(*ai);
252 if (!Idx || !(IdxRec = Idx->getDef())->isSubClassOf("SubRegIndex"))
253 throw "Argument '" + (*ai)->getAsString() +
254 "' in SubRegClasses is not a SubRegIndex";
255 if (!SubRegClasses.insert(std::make_pair(IdxRec, RCRec)).second)
256 throw "SubRegIndex '" + IdxRec->getName() + "' mentioned twice";
260 // Allow targets to override the size in bits of the RegisterClass.
261 unsigned Size = R->getValueAsInt("Size");
263 Namespace = R->getValueAsString("Namespace");
264 SpillSize = Size ? Size : EVT(VTs[0]).getSizeInBits();
265 SpillAlignment = R->getValueAsInt("Alignment");
266 CopyCost = R->getValueAsInt("CopyCost");
267 MethodBodies = R->getValueAsCode("MethodBodies");
268 MethodProtos = R->getValueAsCode("MethodProtos");
271 const std::string &CodeGenRegisterClass::getName() const {
272 return TheDef->getName();
275 void CodeGenTarget::ReadLegalValueTypes() const {
276 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
277 for (unsigned i = 0, e = RCs.size(); i != e; ++i)
278 for (unsigned ri = 0, re = RCs[i].VTs.size(); ri != re; ++ri)
279 LegalValueTypes.push_back(RCs[i].VTs[ri]);
281 // Remove duplicates.
282 std::sort(LegalValueTypes.begin(), LegalValueTypes.end());
283 LegalValueTypes.erase(std::unique(LegalValueTypes.begin(),
284 LegalValueTypes.end()),
285 LegalValueTypes.end());
289 void CodeGenTarget::ReadInstructions() const {
290 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
291 if (Insts.size() <= 2)
292 throw std::string("No 'Instruction' subclasses defined!");
294 // Parse the instructions defined in the .td file.
295 std::string InstFormatName =
296 getAsmWriter()->getValueAsString("InstFormatName");
298 for (unsigned i = 0, e = Insts.size(); i != e; ++i) {
299 std::string AsmStr = Insts[i]->getValueAsString(InstFormatName);
300 Instructions[Insts[i]] = new CodeGenInstruction(Insts[i], AsmStr);
304 static const CodeGenInstruction *
305 GetInstByName(const char *Name,
306 const DenseMap<const Record*, CodeGenInstruction*> &Insts) {
307 const Record *Rec = Records.getDef(Name);
309 DenseMap<const Record*, CodeGenInstruction*>::const_iterator
311 if (Rec == 0 || I == Insts.end())
312 throw std::string("Could not find '") + Name + "' instruction!";
317 /// SortInstByName - Sorting predicate to sort instructions by name.
319 struct SortInstByName {
320 bool operator()(const CodeGenInstruction *Rec1,
321 const CodeGenInstruction *Rec2) const {
322 return Rec1->TheDef->getName() < Rec2->TheDef->getName();
327 /// getInstructionsByEnumValue - Return all of the instructions defined by the
328 /// target, ordered by their enum value.
329 void CodeGenTarget::ComputeInstrsByEnum() const {
330 const DenseMap<const Record*, CodeGenInstruction*> &Insts = getInstructions();
331 const CodeGenInstruction *PHI = GetInstByName("PHI", Insts);
332 const CodeGenInstruction *INLINEASM = GetInstByName("INLINEASM", Insts);
333 const CodeGenInstruction *DBG_LABEL = GetInstByName("DBG_LABEL", Insts);
334 const CodeGenInstruction *EH_LABEL = GetInstByName("EH_LABEL", Insts);
335 const CodeGenInstruction *GC_LABEL = GetInstByName("GC_LABEL", Insts);
336 const CodeGenInstruction *KILL = GetInstByName("KILL", Insts);
337 const CodeGenInstruction *EXTRACT_SUBREG =
338 GetInstByName("EXTRACT_SUBREG", Insts);
339 const CodeGenInstruction *INSERT_SUBREG =
340 GetInstByName("INSERT_SUBREG", Insts);
341 const CodeGenInstruction *IMPLICIT_DEF = GetInstByName("IMPLICIT_DEF", Insts);
342 const CodeGenInstruction *SUBREG_TO_REG =
343 GetInstByName("SUBREG_TO_REG", Insts);
344 const CodeGenInstruction *COPY_TO_REGCLASS =
345 GetInstByName("COPY_TO_REGCLASS", Insts);
346 const CodeGenInstruction *DBG_VALUE = GetInstByName("DBG_VALUE", Insts);
347 const CodeGenInstruction *REG_SEQUENCE = GetInstByName("REG_SEQUENCE", Insts);
349 // Print out the rest of the instructions now.
350 InstrsByEnum.push_back(PHI);
351 InstrsByEnum.push_back(INLINEASM);
352 InstrsByEnum.push_back(DBG_LABEL);
353 InstrsByEnum.push_back(EH_LABEL);
354 InstrsByEnum.push_back(GC_LABEL);
355 InstrsByEnum.push_back(KILL);
356 InstrsByEnum.push_back(EXTRACT_SUBREG);
357 InstrsByEnum.push_back(INSERT_SUBREG);
358 InstrsByEnum.push_back(IMPLICIT_DEF);
359 InstrsByEnum.push_back(SUBREG_TO_REG);
360 InstrsByEnum.push_back(COPY_TO_REGCLASS);
361 InstrsByEnum.push_back(DBG_VALUE);
362 InstrsByEnum.push_back(REG_SEQUENCE);
364 unsigned EndOfPredefines = InstrsByEnum.size();
366 for (DenseMap<const Record*, CodeGenInstruction*>::const_iterator
367 I = Insts.begin(), E = Insts.end(); I != E; ++I) {
368 const CodeGenInstruction *CGI = I->second;
375 CGI != EXTRACT_SUBREG &&
376 CGI != INSERT_SUBREG &&
377 CGI != IMPLICIT_DEF &&
378 CGI != SUBREG_TO_REG &&
379 CGI != COPY_TO_REGCLASS &&
382 InstrsByEnum.push_back(CGI);
385 // All of the instructions are now in random order based on the map iteration.
386 // Sort them by name.
387 std::sort(InstrsByEnum.begin()+EndOfPredefines, InstrsByEnum.end(),
392 /// isLittleEndianEncoding - Return whether this target encodes its instruction
393 /// in little-endian format, i.e. bits laid out in the order [0..n]
395 bool CodeGenTarget::isLittleEndianEncoding() const {
396 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding");
399 //===----------------------------------------------------------------------===//
400 // ComplexPattern implementation
402 ComplexPattern::ComplexPattern(Record *R) {
403 Ty = ::getValueType(R->getValueAsDef("Ty"));
404 NumOperands = R->getValueAsInt("NumOperands");
405 SelectFunc = R->getValueAsString("SelectFunc");
406 RootNodes = R->getValueAsListOfDefs("RootNodes");
408 // Parse the properties.
410 std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties");
411 for (unsigned i = 0, e = PropList.size(); i != e; ++i)
412 if (PropList[i]->getName() == "SDNPHasChain") {
413 Properties |= 1 << SDNPHasChain;
414 } else if (PropList[i]->getName() == "SDNPOptInFlag") {
415 Properties |= 1 << SDNPOptInFlag;
416 } else if (PropList[i]->getName() == "SDNPMayStore") {
417 Properties |= 1 << SDNPMayStore;
418 } else if (PropList[i]->getName() == "SDNPMayLoad") {
419 Properties |= 1 << SDNPMayLoad;
420 } else if (PropList[i]->getName() == "SDNPSideEffect") {
421 Properties |= 1 << SDNPSideEffect;
422 } else if (PropList[i]->getName() == "SDNPMemOperand") {
423 Properties |= 1 << SDNPMemOperand;
424 } else if (PropList[i]->getName() == "SDNPVariadic") {
425 Properties |= 1 << SDNPVariadic;
427 errs() << "Unsupported SD Node property '" << PropList[i]->getName()
428 << "' on ComplexPattern '" << R->getName() << "'!\n";
433 //===----------------------------------------------------------------------===//
434 // CodeGenIntrinsic Implementation
435 //===----------------------------------------------------------------------===//
437 std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC,
439 std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic");
441 std::vector<CodeGenIntrinsic> Result;
443 for (unsigned i = 0, e = I.size(); i != e; ++i) {
444 bool isTarget = I[i]->getValueAsBit("isTarget");
445 if (isTarget == TargetOnly)
446 Result.push_back(CodeGenIntrinsic(I[i]));
451 CodeGenIntrinsic::CodeGenIntrinsic(Record *R) {
453 std::string DefName = R->getName();
455 isOverloaded = false;
456 isCommutative = false;
458 if (DefName.size() <= 4 ||
459 std::string(DefName.begin(), DefName.begin() + 4) != "int_")
460 throw "Intrinsic '" + DefName + "' does not start with 'int_'!";
462 EnumName = std::string(DefName.begin()+4, DefName.end());
464 if (R->getValue("GCCBuiltinName")) // Ignore a missing GCCBuiltinName field.
465 GCCBuiltinName = R->getValueAsString("GCCBuiltinName");
467 TargetPrefix = R->getValueAsString("TargetPrefix");
468 Name = R->getValueAsString("LLVMName");
471 // If an explicit name isn't specified, derive one from the DefName.
474 for (unsigned i = 0, e = EnumName.size(); i != e; ++i)
475 Name += (EnumName[i] == '_') ? '.' : EnumName[i];
477 // Verify it starts with "llvm.".
478 if (Name.size() <= 5 ||
479 std::string(Name.begin(), Name.begin() + 5) != "llvm.")
480 throw "Intrinsic '" + DefName + "'s name does not start with 'llvm.'!";
483 // If TargetPrefix is specified, make sure that Name starts with
484 // "llvm.<targetprefix>.".
485 if (!TargetPrefix.empty()) {
486 if (Name.size() < 6+TargetPrefix.size() ||
487 std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size())
488 != (TargetPrefix + "."))
489 throw "Intrinsic '" + DefName + "' does not start with 'llvm." +
490 TargetPrefix + ".'!";
493 // Parse the list of return types.
494 std::vector<MVT::SimpleValueType> OverloadedVTs;
495 ListInit *TypeList = R->getValueAsListInit("RetTypes");
496 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
497 Record *TyEl = TypeList->getElementAsRecord(i);
498 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
499 MVT::SimpleValueType VT;
500 if (TyEl->isSubClassOf("LLVMMatchType")) {
501 unsigned MatchTy = TyEl->getValueAsInt("Number");
502 assert(MatchTy < OverloadedVTs.size() &&
503 "Invalid matching number!");
504 VT = OverloadedVTs[MatchTy];
505 // It only makes sense to use the extended and truncated vector element
506 // variants with iAny types; otherwise, if the intrinsic is not
507 // overloaded, all the types can be specified directly.
508 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") &&
509 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) ||
510 VT == MVT::iAny || VT == MVT::vAny) &&
511 "Expected iAny or vAny type");
513 VT = getValueType(TyEl->getValueAsDef("VT"));
515 if (EVT(VT).isOverloaded()) {
516 OverloadedVTs.push_back(VT);
520 // Reject invalid types.
521 if (VT == MVT::isVoid)
522 throw "Intrinsic '" + DefName + " has void in result type list!";
524 IS.RetVTs.push_back(VT);
525 IS.RetTypeDefs.push_back(TyEl);
528 // Parse the list of parameter types.
529 TypeList = R->getValueAsListInit("ParamTypes");
530 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
531 Record *TyEl = TypeList->getElementAsRecord(i);
532 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
533 MVT::SimpleValueType VT;
534 if (TyEl->isSubClassOf("LLVMMatchType")) {
535 unsigned MatchTy = TyEl->getValueAsInt("Number");
536 assert(MatchTy < OverloadedVTs.size() &&
537 "Invalid matching number!");
538 VT = OverloadedVTs[MatchTy];
539 // It only makes sense to use the extended and truncated vector element
540 // variants with iAny types; otherwise, if the intrinsic is not
541 // overloaded, all the types can be specified directly.
542 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") &&
543 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) ||
544 VT == MVT::iAny || VT == MVT::vAny) &&
545 "Expected iAny or vAny type");
547 VT = getValueType(TyEl->getValueAsDef("VT"));
549 if (EVT(VT).isOverloaded()) {
550 OverloadedVTs.push_back(VT);
554 // Reject invalid types.
555 if (VT == MVT::isVoid && i != e-1 /*void at end means varargs*/)
556 throw "Intrinsic '" + DefName + " has void in result type list!";
558 IS.ParamVTs.push_back(VT);
559 IS.ParamTypeDefs.push_back(TyEl);
562 // Parse the intrinsic properties.
563 ListInit *PropList = R->getValueAsListInit("Properties");
564 for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) {
565 Record *Property = PropList->getElementAsRecord(i);
566 assert(Property->isSubClassOf("IntrinsicProperty") &&
567 "Expected a property!");
569 if (Property->getName() == "IntrNoMem")
571 else if (Property->getName() == "IntrReadArgMem")
573 else if (Property->getName() == "IntrReadMem")
575 else if (Property->getName() == "IntrWriteArgMem")
576 ModRef = WriteArgMem;
577 else if (Property->getName() == "IntrWriteMem")
579 else if (Property->getName() == "Commutative")
580 isCommutative = true;
581 else if (Property->isSubClassOf("NoCapture")) {
582 unsigned ArgNo = Property->getValueAsInt("ArgNo");
583 ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture));
585 assert(0 && "Unknown property!");