1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This class wraps target description classes used by the various code
11 // generation TableGen backends. This makes it easier to access the data and
12 // provides a single place that needs to check it for validity. All of these
13 // classes throw exceptions on error conditions.
15 //===----------------------------------------------------------------------===//
17 #include "CodeGenTarget.h"
18 #include "CodeGenIntrinsics.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/Support/CommandLine.h"
25 static cl::opt<unsigned>
26 AsmParserNum("asmparsernum", cl::init(0),
27 cl::desc("Make -gen-asm-parser emit assembly parser #N"));
29 static cl::opt<unsigned>
30 AsmWriterNum("asmwriternum", cl::init(0),
31 cl::desc("Make -gen-asm-writer emit assembly writer #N"));
33 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
34 /// record corresponds to.
35 MVT::SimpleValueType llvm::getValueType(Record *Rec) {
36 return (MVT::SimpleValueType)Rec->getValueAsInt("Value");
39 std::string llvm::getName(MVT::SimpleValueType T) {
41 case MVT::Other: return "UNKNOWN";
42 case MVT::iPTR: return "TLI.getPointerTy()";
43 case MVT::iPTRAny: return "TLI.getPointerTy()";
44 default: return getEnumName(T);
48 std::string llvm::getEnumName(MVT::SimpleValueType T) {
50 case MVT::Other: return "MVT::Other";
51 case MVT::i1: return "MVT::i1";
52 case MVT::i8: return "MVT::i8";
53 case MVT::i16: return "MVT::i16";
54 case MVT::i32: return "MVT::i32";
55 case MVT::i64: return "MVT::i64";
56 case MVT::i128: return "MVT::i128";
57 case MVT::iAny: return "MVT::iAny";
58 case MVT::fAny: return "MVT::fAny";
59 case MVT::vAny: return "MVT::vAny";
60 case MVT::f32: return "MVT::f32";
61 case MVT::f64: return "MVT::f64";
62 case MVT::f80: return "MVT::f80";
63 case MVT::f128: return "MVT::f128";
64 case MVT::ppcf128: return "MVT::ppcf128";
65 case MVT::Flag: return "MVT::Flag";
66 case MVT::isVoid:return "MVT::isVoid";
67 case MVT::v2i8: return "MVT::v2i8";
68 case MVT::v4i8: return "MVT::v4i8";
69 case MVT::v8i8: return "MVT::v8i8";
70 case MVT::v16i8: return "MVT::v16i8";
71 case MVT::v32i8: return "MVT::v32i8";
72 case MVT::v2i16: return "MVT::v2i16";
73 case MVT::v4i16: return "MVT::v4i16";
74 case MVT::v8i16: return "MVT::v8i16";
75 case MVT::v16i16: return "MVT::v16i16";
76 case MVT::v2i32: return "MVT::v2i32";
77 case MVT::v4i32: return "MVT::v4i32";
78 case MVT::v8i32: return "MVT::v8i32";
79 case MVT::v1i64: return "MVT::v1i64";
80 case MVT::v2i64: return "MVT::v2i64";
81 case MVT::v4i64: return "MVT::v4i64";
82 case MVT::v2f32: return "MVT::v2f32";
83 case MVT::v4f32: return "MVT::v4f32";
84 case MVT::v8f32: return "MVT::v8f32";
85 case MVT::v2f64: return "MVT::v2f64";
86 case MVT::v4f64: return "MVT::v4f64";
87 case MVT::Metadata: return "MVT::Metadata";
88 case MVT::iPTR: return "MVT::iPTR";
89 case MVT::iPTRAny: return "MVT::iPTRAny";
90 default: assert(0 && "ILLEGAL VALUE TYPE!"); return "";
94 /// getQualifiedName - Return the name of the specified record, with a
95 /// namespace qualifier if the record contains one.
97 std::string llvm::getQualifiedName(const Record *R) {
98 std::string Namespace = R->getValueAsString("Namespace");
99 if (Namespace.empty()) return R->getName();
100 return Namespace + "::" + R->getName();
106 /// getTarget - Return the current instance of the Target class.
108 CodeGenTarget::CodeGenTarget() {
109 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target");
110 if (Targets.size() == 0)
111 throw std::string("ERROR: No 'Target' subclasses defined!");
112 if (Targets.size() != 1)
113 throw std::string("ERROR: Multiple subclasses of Target defined!");
114 TargetRec = Targets[0];
118 const std::string &CodeGenTarget::getName() const {
119 return TargetRec->getName();
122 std::string CodeGenTarget::getInstNamespace() const {
125 for (inst_iterator i = inst_begin(), e = inst_end(); i != e; ++i) {
126 InstNS = i->second.Namespace;
128 // Make sure not to pick up "TargetInstrInfo" by accidentally getting
129 // the namespace off the PHI instruction or something.
130 if (InstNS != "TargetInstrInfo")
137 Record *CodeGenTarget::getInstructionSet() const {
138 return TargetRec->getValueAsDef("InstructionSet");
142 CodeGenInstruction &CodeGenTarget::getInstruction(const Record *InstRec) const {
143 return getInstruction(InstRec->getName());
147 /// getAsmParser - Return the AssemblyParser definition for this target.
149 Record *CodeGenTarget::getAsmParser() const {
150 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyParsers");
151 if (AsmParserNum >= LI.size())
152 throw "Target does not have an AsmParser #" + utostr(AsmParserNum) + "!";
153 return LI[AsmParserNum];
156 /// getAsmWriter - Return the AssemblyWriter definition for this target.
158 Record *CodeGenTarget::getAsmWriter() const {
159 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters");
160 if (AsmWriterNum >= LI.size())
161 throw "Target does not have an AsmWriter #" + utostr(AsmWriterNum) + "!";
162 return LI[AsmWriterNum];
165 void CodeGenTarget::ReadRegisters() const {
166 std::vector<Record*> Regs = Records.getAllDerivedDefinitions("Register");
168 throw std::string("No 'Register' subclasses defined!");
170 Registers.reserve(Regs.size());
171 Registers.assign(Regs.begin(), Regs.end());
174 CodeGenRegister::CodeGenRegister(Record *R) : TheDef(R) {
175 DeclaredSpillSize = R->getValueAsInt("SpillSize");
176 DeclaredSpillAlignment = R->getValueAsInt("SpillAlignment");
179 const std::string &CodeGenRegister::getName() const {
180 return TheDef->getName();
183 void CodeGenTarget::ReadRegisterClasses() const {
184 std::vector<Record*> RegClasses =
185 Records.getAllDerivedDefinitions("RegisterClass");
186 if (RegClasses.empty())
187 throw std::string("No 'RegisterClass' subclasses defined!");
189 RegisterClasses.reserve(RegClasses.size());
190 RegisterClasses.assign(RegClasses.begin(), RegClasses.end());
193 std::vector<MVT::SimpleValueType> CodeGenTarget::
194 getRegisterVTs(Record *R) const {
195 std::vector<MVT::SimpleValueType> Result;
196 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
197 for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
198 const CodeGenRegisterClass &RC = RegisterClasses[i];
199 for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) {
200 if (R == RC.Elements[ei]) {
201 const std::vector<MVT::SimpleValueType> &InVTs = RC.getValueTypes();
202 Result.insert(Result.end(), InVTs.begin(), InVTs.end());
210 CodeGenRegisterClass::CodeGenRegisterClass(Record *R) : TheDef(R) {
211 // Rename anonymous register classes.
212 if (R->getName().size() > 9 && R->getName()[9] == '.') {
213 static unsigned AnonCounter = 0;
214 R->setName("AnonRegClass_"+utostr(AnonCounter++));
217 std::vector<Record*> TypeList = R->getValueAsListOfDefs("RegTypes");
218 for (unsigned i = 0, e = TypeList.size(); i != e; ++i) {
219 Record *Type = TypeList[i];
220 if (!Type->isSubClassOf("ValueType"))
221 throw "RegTypes list member '" + Type->getName() +
222 "' does not derive from the ValueType class!";
223 VTs.push_back(getValueType(Type));
225 assert(!VTs.empty() && "RegisterClass must contain at least one ValueType!");
227 std::vector<Record*> RegList = R->getValueAsListOfDefs("MemberList");
228 for (unsigned i = 0, e = RegList.size(); i != e; ++i) {
229 Record *Reg = RegList[i];
230 if (!Reg->isSubClassOf("Register"))
231 throw "Register Class member '" + Reg->getName() +
232 "' does not derive from the Register class!";
233 Elements.push_back(Reg);
236 std::vector<Record*> SubRegClassList =
237 R->getValueAsListOfDefs("SubRegClassList");
238 for (unsigned i = 0, e = SubRegClassList.size(); i != e; ++i) {
239 Record *SubRegClass = SubRegClassList[i];
240 if (!SubRegClass->isSubClassOf("RegisterClass"))
241 throw "Register Class member '" + SubRegClass->getName() +
242 "' does not derive from the RegisterClass class!";
243 SubRegClasses.push_back(SubRegClass);
246 // Allow targets to override the size in bits of the RegisterClass.
247 unsigned Size = R->getValueAsInt("Size");
249 Namespace = R->getValueAsString("Namespace");
250 SpillSize = Size ? Size : EVT(VTs[0]).getSizeInBits();
251 SpillAlignment = R->getValueAsInt("Alignment");
252 CopyCost = R->getValueAsInt("CopyCost");
253 MethodBodies = R->getValueAsCode("MethodBodies");
254 MethodProtos = R->getValueAsCode("MethodProtos");
257 const std::string &CodeGenRegisterClass::getName() const {
258 return TheDef->getName();
261 void CodeGenTarget::ReadLegalValueTypes() const {
262 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
263 for (unsigned i = 0, e = RCs.size(); i != e; ++i)
264 for (unsigned ri = 0, re = RCs[i].VTs.size(); ri != re; ++ri)
265 LegalValueTypes.push_back(RCs[i].VTs[ri]);
267 // Remove duplicates.
268 std::sort(LegalValueTypes.begin(), LegalValueTypes.end());
269 LegalValueTypes.erase(std::unique(LegalValueTypes.begin(),
270 LegalValueTypes.end()),
271 LegalValueTypes.end());
275 void CodeGenTarget::ReadInstructions() const {
276 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
277 if (Insts.size() <= 2)
278 throw std::string("No 'Instruction' subclasses defined!");
280 // Parse the instructions defined in the .td file.
281 std::string InstFormatName =
282 getAsmWriter()->getValueAsString("InstFormatName");
284 for (unsigned i = 0, e = Insts.size(); i != e; ++i) {
285 std::string AsmStr = Insts[i]->getValueAsString(InstFormatName);
286 Instructions.insert(std::make_pair(Insts[i]->getName(),
287 CodeGenInstruction(Insts[i], AsmStr)));
291 static const CodeGenInstruction *
292 GetInstByName(const char *Name,
293 const std::map<std::string, CodeGenInstruction> &Insts) {
294 std::map<std::string, CodeGenInstruction>::const_iterator
295 I = Insts.find(Name);
296 if (I == Insts.end())
297 throw std::string("Could not find '") + Name + "' instruction!";
301 /// getInstructionsByEnumValue - Return all of the instructions defined by the
302 /// target, ordered by their enum value.
304 getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
305 &NumberedInstructions) {
306 const std::map<std::string, CodeGenInstruction> &Insts = getInstructions();
308 const CodeGenInstruction *PHI = GetInstByName("PHI", Insts);
309 const CodeGenInstruction *INLINEASM = GetInstByName("INLINEASM", Insts);
310 const CodeGenInstruction *DBG_LABEL = GetInstByName("DBG_LABEL", Insts);
311 const CodeGenInstruction *EH_LABEL = GetInstByName("EH_LABEL", Insts);
312 const CodeGenInstruction *GC_LABEL = GetInstByName("GC_LABEL", Insts);
313 const CodeGenInstruction *KILL = GetInstByName("KILL", Insts);
314 const CodeGenInstruction *EXTRACT_SUBREG =
315 GetInstByName("EXTRACT_SUBREG", Insts);
316 const CodeGenInstruction *INSERT_SUBREG =
317 GetInstByName("INSERT_SUBREG", Insts);
318 const CodeGenInstruction *IMPLICIT_DEF = GetInstByName("IMPLICIT_DEF", Insts);
319 const CodeGenInstruction *SUBREG_TO_REG =
320 GetInstByName("SUBREG_TO_REG", Insts);
321 const CodeGenInstruction *COPY_TO_REGCLASS =
322 GetInstByName("COPY_TO_REGCLASS", Insts);
323 const CodeGenInstruction *DBG_VALUE = GetInstByName("DBG_VALUE", Insts);
325 // Print out the rest of the instructions now.
326 NumberedInstructions.push_back(PHI);
327 NumberedInstructions.push_back(INLINEASM);
328 NumberedInstructions.push_back(DBG_LABEL);
329 NumberedInstructions.push_back(EH_LABEL);
330 NumberedInstructions.push_back(GC_LABEL);
331 NumberedInstructions.push_back(KILL);
332 NumberedInstructions.push_back(EXTRACT_SUBREG);
333 NumberedInstructions.push_back(INSERT_SUBREG);
334 NumberedInstructions.push_back(IMPLICIT_DEF);
335 NumberedInstructions.push_back(SUBREG_TO_REG);
336 NumberedInstructions.push_back(COPY_TO_REGCLASS);
337 NumberedInstructions.push_back(DBG_VALUE);
338 for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II)
339 if (&II->second != PHI &&
340 &II->second != INLINEASM &&
341 &II->second != DBG_LABEL &&
342 &II->second != EH_LABEL &&
343 &II->second != GC_LABEL &&
344 &II->second != KILL &&
345 &II->second != EXTRACT_SUBREG &&
346 &II->second != INSERT_SUBREG &&
347 &II->second != IMPLICIT_DEF &&
348 &II->second != SUBREG_TO_REG &&
349 &II->second != COPY_TO_REGCLASS &&
350 &II->second != DBG_VALUE)
351 NumberedInstructions.push_back(&II->second);
355 /// isLittleEndianEncoding - Return whether this target encodes its instruction
356 /// in little-endian format, i.e. bits laid out in the order [0..n]
358 bool CodeGenTarget::isLittleEndianEncoding() const {
359 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding");
362 //===----------------------------------------------------------------------===//
363 // ComplexPattern implementation
365 ComplexPattern::ComplexPattern(Record *R) {
366 Ty = ::getValueType(R->getValueAsDef("Ty"));
367 NumOperands = R->getValueAsInt("NumOperands");
368 SelectFunc = R->getValueAsString("SelectFunc");
369 RootNodes = R->getValueAsListOfDefs("RootNodes");
371 // Parse the properties.
373 std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties");
374 for (unsigned i = 0, e = PropList.size(); i != e; ++i)
375 if (PropList[i]->getName() == "SDNPHasChain") {
376 Properties |= 1 << SDNPHasChain;
377 } else if (PropList[i]->getName() == "SDNPOptInFlag") {
378 Properties |= 1 << SDNPOptInFlag;
379 } else if (PropList[i]->getName() == "SDNPMayStore") {
380 Properties |= 1 << SDNPMayStore;
381 } else if (PropList[i]->getName() == "SDNPMayLoad") {
382 Properties |= 1 << SDNPMayLoad;
383 } else if (PropList[i]->getName() == "SDNPSideEffect") {
384 Properties |= 1 << SDNPSideEffect;
385 } else if (PropList[i]->getName() == "SDNPMemOperand") {
386 Properties |= 1 << SDNPMemOperand;
388 errs() << "Unsupported SD Node property '" << PropList[i]->getName()
389 << "' on ComplexPattern '" << R->getName() << "'!\n";
394 //===----------------------------------------------------------------------===//
395 // CodeGenIntrinsic Implementation
396 //===----------------------------------------------------------------------===//
398 std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC,
400 std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic");
402 std::vector<CodeGenIntrinsic> Result;
404 for (unsigned i = 0, e = I.size(); i != e; ++i) {
405 bool isTarget = I[i]->getValueAsBit("isTarget");
406 if (isTarget == TargetOnly)
407 Result.push_back(CodeGenIntrinsic(I[i]));
412 CodeGenIntrinsic::CodeGenIntrinsic(Record *R) {
414 std::string DefName = R->getName();
416 isOverloaded = false;
417 isCommutative = false;
419 if (DefName.size() <= 4 ||
420 std::string(DefName.begin(), DefName.begin() + 4) != "int_")
421 throw "Intrinsic '" + DefName + "' does not start with 'int_'!";
423 EnumName = std::string(DefName.begin()+4, DefName.end());
425 if (R->getValue("GCCBuiltinName")) // Ignore a missing GCCBuiltinName field.
426 GCCBuiltinName = R->getValueAsString("GCCBuiltinName");
428 TargetPrefix = R->getValueAsString("TargetPrefix");
429 Name = R->getValueAsString("LLVMName");
432 // If an explicit name isn't specified, derive one from the DefName.
435 for (unsigned i = 0, e = EnumName.size(); i != e; ++i)
436 Name += (EnumName[i] == '_') ? '.' : EnumName[i];
438 // Verify it starts with "llvm.".
439 if (Name.size() <= 5 ||
440 std::string(Name.begin(), Name.begin() + 5) != "llvm.")
441 throw "Intrinsic '" + DefName + "'s name does not start with 'llvm.'!";
444 // If TargetPrefix is specified, make sure that Name starts with
445 // "llvm.<targetprefix>.".
446 if (!TargetPrefix.empty()) {
447 if (Name.size() < 6+TargetPrefix.size() ||
448 std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size())
449 != (TargetPrefix + "."))
450 throw "Intrinsic '" + DefName + "' does not start with 'llvm." +
451 TargetPrefix + ".'!";
454 // Parse the list of return types.
455 std::vector<MVT::SimpleValueType> OverloadedVTs;
456 ListInit *TypeList = R->getValueAsListInit("RetTypes");
457 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
458 Record *TyEl = TypeList->getElementAsRecord(i);
459 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
460 MVT::SimpleValueType VT;
461 if (TyEl->isSubClassOf("LLVMMatchType")) {
462 unsigned MatchTy = TyEl->getValueAsInt("Number");
463 assert(MatchTy < OverloadedVTs.size() &&
464 "Invalid matching number!");
465 VT = OverloadedVTs[MatchTy];
466 // It only makes sense to use the extended and truncated vector element
467 // variants with iAny types; otherwise, if the intrinsic is not
468 // overloaded, all the types can be specified directly.
469 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") &&
470 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) ||
471 VT == MVT::iAny || VT == MVT::vAny) &&
472 "Expected iAny or vAny type");
474 VT = getValueType(TyEl->getValueAsDef("VT"));
476 if (EVT(VT).isOverloaded()) {
477 OverloadedVTs.push_back(VT);
478 isOverloaded |= true;
480 IS.RetVTs.push_back(VT);
481 IS.RetTypeDefs.push_back(TyEl);
484 if (IS.RetVTs.size() == 0)
485 throw "Intrinsic '"+DefName+"' needs at least a type for the ret value!";
487 // Parse the list of parameter types.
488 TypeList = R->getValueAsListInit("ParamTypes");
489 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
490 Record *TyEl = TypeList->getElementAsRecord(i);
491 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
492 MVT::SimpleValueType VT;
493 if (TyEl->isSubClassOf("LLVMMatchType")) {
494 unsigned MatchTy = TyEl->getValueAsInt("Number");
495 assert(MatchTy < OverloadedVTs.size() &&
496 "Invalid matching number!");
497 VT = OverloadedVTs[MatchTy];
498 // It only makes sense to use the extended and truncated vector element
499 // variants with iAny types; otherwise, if the intrinsic is not
500 // overloaded, all the types can be specified directly.
501 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") &&
502 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) ||
503 VT == MVT::iAny || VT == MVT::vAny) &&
504 "Expected iAny or vAny type");
506 VT = getValueType(TyEl->getValueAsDef("VT"));
507 if (EVT(VT).isOverloaded()) {
508 OverloadedVTs.push_back(VT);
509 isOverloaded |= true;
511 IS.ParamVTs.push_back(VT);
512 IS.ParamTypeDefs.push_back(TyEl);
515 // Parse the intrinsic properties.
516 ListInit *PropList = R->getValueAsListInit("Properties");
517 for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) {
518 Record *Property = PropList->getElementAsRecord(i);
519 assert(Property->isSubClassOf("IntrinsicProperty") &&
520 "Expected a property!");
522 if (Property->getName() == "IntrNoMem")
524 else if (Property->getName() == "IntrReadArgMem")
526 else if (Property->getName() == "IntrReadMem")
528 else if (Property->getName() == "IntrWriteArgMem")
529 ModRef = WriteArgMem;
530 else if (Property->getName() == "IntrWriteMem")
532 else if (Property->getName() == "Commutative")
533 isCommutative = true;
534 else if (Property->isSubClassOf("NoCapture")) {
535 unsigned ArgNo = Property->getValueAsInt("ArgNo");
536 ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture));
538 assert(0 && "Unknown property!");