1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper ---------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This class wrap target description classes used by the various code
11 // generation TableGen backends. This makes it easier to access the data and
12 // provides a single place that needs to check it for validity. All of these
13 // classes throw exceptions on error conditions.
15 //===----------------------------------------------------------------------===//
17 #include "CodeGenTarget.h"
19 #include "llvm/ADT/StringExtras.h"
20 #include "llvm/Support/CommandLine.h"
24 static cl::opt<unsigned>
25 AsmWriterNum("asmwriternum", cl::init(0),
26 cl::desc("Make -gen-asm-writer emit assembly writer #N"));
28 /// getValueType - Return the MCV::ValueType that the specified TableGen record
30 MVT::ValueType llvm::getValueType(Record *Rec) {
31 return (MVT::ValueType)Rec->getValueAsInt("Value");
34 std::string llvm::getName(MVT::ValueType T) {
36 case MVT::Other: return "UNKNOWN";
37 case MVT::i1: return "i1";
38 case MVT::i8: return "i8";
39 case MVT::i16: return "i16";
40 case MVT::i32: return "i32";
41 case MVT::i64: return "i64";
42 case MVT::i128: return "i128";
43 case MVT::f32: return "f32";
44 case MVT::f64: return "f64";
45 case MVT::f80: return "f80";
46 case MVT::f128: return "f128";
47 case MVT::isVoid:return "void";
48 default: assert(0 && "ILLEGAL VALUE TYPE!"); return "";
52 std::string llvm::getEnumName(MVT::ValueType T) {
54 case MVT::Other: return "Other";
55 case MVT::i1: return "i1";
56 case MVT::i8: return "i8";
57 case MVT::i16: return "i16";
58 case MVT::i32: return "i32";
59 case MVT::i64: return "i64";
60 case MVT::i128: return "i128";
61 case MVT::f32: return "f32";
62 case MVT::f64: return "f64";
63 case MVT::f80: return "f80";
64 case MVT::f128: return "f128";
65 case MVT::isVoid:return "isVoid";
66 default: assert(0 && "ILLEGAL VALUE TYPE!"); return "";
71 std::ostream &llvm::operator<<(std::ostream &OS, MVT::ValueType T) {
72 return OS << getName(T);
76 /// getTarget - Return the current instance of the Target class.
78 CodeGenTarget::CodeGenTarget() : PointerType(MVT::Other) {
79 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target");
80 if (Targets.size() == 0)
81 throw std::string("ERROR: No 'Target' subclasses defined!");
82 if (Targets.size() != 1)
83 throw std::string("ERROR: Multiple subclasses of Target defined!");
84 TargetRec = Targets[0];
86 // Read in all of the CalleeSavedRegisters...
87 ListInit *LI = TargetRec->getValueAsListInit("CalleeSavedRegisters");
88 for (unsigned i = 0, e = LI->getSize(); i != e; ++i)
89 if (DefInit *DI = dynamic_cast<DefInit*>(LI->getElement(i)))
90 CalleeSavedRegisters.push_back(DI->getDef());
92 throw "Target: " + TargetRec->getName() +
93 " expected register definition in CalleeSavedRegisters list!";
95 PointerType = getValueType(TargetRec->getValueAsDef("PointerType"));
99 const std::string &CodeGenTarget::getName() const {
100 return TargetRec->getName();
103 Record *CodeGenTarget::getInstructionSet() const {
104 return TargetRec->getValueAsDef("InstructionSet");
107 /// getAsmWriter - Return the AssemblyWriter definition for this target.
109 Record *CodeGenTarget::getAsmWriter() const {
110 ListInit *LI = TargetRec->getValueAsListInit("AssemblyWriters");
111 if (AsmWriterNum >= LI->getSize())
112 throw "Target does not have an AsmWriter #" + utostr(AsmWriterNum) + "!";
113 DefInit *DI = dynamic_cast<DefInit*>(LI->getElement(AsmWriterNum));
114 if (!DI) throw std::string("AssemblyWriter list should be a list of defs!");
118 void CodeGenTarget::ReadRegisters() const {
119 std::vector<Record*> Regs = Records.getAllDerivedDefinitions("Register");
121 throw std::string("No 'Register' subclasses defined!");
123 Registers.reserve(Regs.size());
124 Registers.assign(Regs.begin(), Regs.end());
127 CodeGenRegister::CodeGenRegister(Record *R) : TheDef(R) {
128 DeclaredSpillSize = R->getValueAsInt("SpillSize");
129 DeclaredSpillAlignment = R->getValueAsInt("SpillAlignment");
132 const std::string &CodeGenRegister::getName() const {
133 return TheDef->getName();
136 void CodeGenTarget::ReadRegisterClasses() const {
137 std::vector<Record*> RegClasses =
138 Records.getAllDerivedDefinitions("RegisterClass");
139 if (RegClasses.empty())
140 throw std::string("No 'RegisterClass' subclasses defined!");
142 RegisterClasses.reserve(RegClasses.size());
143 RegisterClasses.assign(RegClasses.begin(), RegClasses.end());
146 CodeGenRegisterClass::CodeGenRegisterClass(Record *R) : TheDef(R) {
147 // Rename anonymous register classes.
148 if (R->getName().size() > 9 && R->getName()[9] == '.') {
149 static unsigned AnonCounter = 0;
150 R->setName("AnonRegClass_"+utostr(AnonCounter++));
153 Namespace = R->getValueAsString("Namespace");
154 SpillSize = R->getValueAsInt("Size");
155 SpillAlignment = R->getValueAsInt("Alignment");
156 VT = getValueType(R->getValueAsDef("RegType"));
158 MethodBodies = R->getValueAsCode("MethodBodies");
159 MethodProtos = R->getValueAsCode("MethodProtos");
161 ListInit *RegList = R->getValueAsListInit("MemberList");
162 for (unsigned i = 0, e = RegList->getSize(); i != e; ++i) {
163 DefInit *RegDef = dynamic_cast<DefInit*>(RegList->getElement(i));
164 if (!RegDef) throw "Register class member is not a record!";
165 Record *Reg = RegDef->getDef();
167 if (!Reg->isSubClassOf("Register"))
168 throw "Register Class member '" + Reg->getName() +
169 "' does not derive from the Register class!";
170 Elements.push_back(Reg);
174 const std::string &CodeGenRegisterClass::getName() const {
175 return TheDef->getName();
178 void CodeGenTarget::ReadLegalValueTypes() const {
179 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
180 for (unsigned i = 0, e = RCs.size(); i != e; ++i)
181 LegalValueTypes.push_back(RCs[i].VT);
185 void CodeGenTarget::ReadInstructions() const {
186 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
189 throw std::string("No 'Instruction' subclasses defined!");
191 std::string InstFormatName =
192 getAsmWriter()->getValueAsString("InstFormatName");
194 for (unsigned i = 0, e = Insts.size(); i != e; ++i) {
195 std::string AsmStr = Insts[i]->getValueAsString(InstFormatName);
196 Instructions.insert(std::make_pair(Insts[i]->getName(),
197 CodeGenInstruction(Insts[i], AsmStr)));
201 /// getPHIInstruction - Return the designated PHI instruction.
203 const CodeGenInstruction &CodeGenTarget::getPHIInstruction() const {
204 Record *PHI = getInstructionSet()->getValueAsDef("PHIInst");
205 std::map<std::string, CodeGenInstruction>::const_iterator I =
206 getInstructions().find(PHI->getName());
207 if (I == Instructions.end())
208 throw "Could not find PHI instruction named '" + PHI->getName() + "'!";
212 /// getInstructionsByEnumValue - Return all of the instructions defined by the
213 /// target, ordered by their enum value.
215 getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
216 &NumberedInstructions) {
218 // Print out the rest of the instructions now.
220 const CodeGenInstruction *PHI = &getPHIInstruction();
221 NumberedInstructions.push_back(PHI);
222 for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II)
223 if (&II->second != PHI)
224 NumberedInstructions.push_back(&II->second);
228 /// isLittleEndianEncoding - Return whether this target encodes its instruction
229 /// in little-endian format, i.e. bits laid out in the order [0..n]
231 bool CodeGenTarget::isLittleEndianEncoding() const {
232 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding");
235 CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
236 : TheDef(R), AsmString(AsmStr) {
237 Name = R->getValueAsString("Name");
238 Namespace = R->getValueAsString("Namespace");
240 isReturn = R->getValueAsBit("isReturn");
241 isBranch = R->getValueAsBit("isBranch");
242 isBarrier = R->getValueAsBit("isBarrier");
243 isCall = R->getValueAsBit("isCall");
244 isLoad = R->getValueAsBit("isLoad");
245 isStore = R->getValueAsBit("isStore");
246 isTwoAddress = R->getValueAsBit("isTwoAddress");
247 isConvertibleToThreeAddress = R->getValueAsBit("isConvertibleToThreeAddress");
248 isCommutable = R->getValueAsBit("isCommutable");
249 isTerminator = R->getValueAsBit("isTerminator");
250 hasDelaySlot = R->getValueAsBit("hasDelaySlot");
251 usesCustomDAGSchedInserter = R->getValueAsBit("usesCustomDAGSchedInserter");
252 hasVariableNumberOfOperands = false;
256 DI = R->getValueAsDag("OperandList");
258 // Error getting operand list, just ignore it (sparcv9).
264 unsigned MIOperandNo = 0;
265 std::set<std::string> OperandNames;
266 for (unsigned i = 0, e = DI->getNumArgs(); i != e; ++i) {
267 DefInit *Arg = dynamic_cast<DefInit*>(DI->getArg(i));
269 throw "Illegal operand for the '" + R->getName() + "' instruction!";
271 Record *Rec = Arg->getDef();
273 std::string PrintMethod = "printOperand";
275 if (Rec->isSubClassOf("RegisterClass")) {
276 Ty = getValueType(Rec->getValueAsDef("RegType"));
277 } else if (Rec->isSubClassOf("Operand")) {
278 Ty = getValueType(Rec->getValueAsDef("Type"));
279 PrintMethod = Rec->getValueAsString("PrintMethod");
280 NumOps = Rec->getValueAsInt("NumMIOperands");
281 } else if (Rec->getName() == "variable_ops") {
282 hasVariableNumberOfOperands = true;
285 throw "Unknown operand class '" + Rec->getName() +
286 "' in instruction '" + R->getName() + "' instruction!";
288 // Check that the operand has a name and that it's unique.
289 if (DI->getArgName(i).empty())
290 throw "In instruction '" + R->getName() + "', operand #" + utostr(i) +
292 if (!OperandNames.insert(DI->getArgName(i)).second)
293 throw "In instruction '" + R->getName() + "', operand #" + utostr(i) +
294 " has the same name as a previous operand!";
296 OperandList.push_back(OperandInfo(Rec, Ty, DI->getArgName(i),
297 PrintMethod, MIOperandNo, NumOps));
298 MIOperandNo += NumOps;
304 /// getOperandNamed - Return the index of the operand with the specified
305 /// non-empty name. If the instruction does not have an operand with the
306 /// specified name, throw an exception.
308 unsigned CodeGenInstruction::getOperandNamed(const std::string &Name) const {
309 assert(!Name.empty() && "Cannot search for operand with no name!");
310 for (unsigned i = 0, e = OperandList.size(); i != e; ++i)
311 if (OperandList[i].Name == Name) return i;
312 throw "Instruction '" + TheDef->getName() +
313 "' does not have an operand named '$" + Name + "'!";