1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This class wraps target description classes used by the various code
11 // generation TableGen backends. This makes it easier to access the data and
12 // provides a single place that needs to check it for validity. All of these
13 // classes throw exceptions on error conditions.
15 //===----------------------------------------------------------------------===//
17 #include "CodeGenTarget.h"
18 #include "CodeGenIntrinsics.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/Support/CommandLine.h"
25 static cl::opt<unsigned>
26 AsmParserNum("asmparsernum", cl::init(0),
27 cl::desc("Make -gen-asm-parser emit assembly parser #N"));
29 static cl::opt<unsigned>
30 AsmWriterNum("asmwriternum", cl::init(0),
31 cl::desc("Make -gen-asm-writer emit assembly writer #N"));
33 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
34 /// record corresponds to.
35 MVT::SimpleValueType llvm::getValueType(Record *Rec) {
36 return (MVT::SimpleValueType)Rec->getValueAsInt("Value");
39 std::string llvm::getName(MVT::SimpleValueType T) {
41 case MVT::Other: return "UNKNOWN";
42 case MVT::iPTR: return "TLI.getPointerTy()";
43 case MVT::iPTRAny: return "TLI.getPointerTy()";
44 default: return getEnumName(T);
48 std::string llvm::getEnumName(MVT::SimpleValueType T) {
50 case MVT::Other: return "MVT::Other";
51 case MVT::i1: return "MVT::i1";
52 case MVT::i8: return "MVT::i8";
53 case MVT::i16: return "MVT::i16";
54 case MVT::i32: return "MVT::i32";
55 case MVT::i64: return "MVT::i64";
56 case MVT::i128: return "MVT::i128";
57 case MVT::iAny: return "MVT::iAny";
58 case MVT::fAny: return "MVT::fAny";
59 case MVT::f32: return "MVT::f32";
60 case MVT::f64: return "MVT::f64";
61 case MVT::f80: return "MVT::f80";
62 case MVT::f128: return "MVT::f128";
63 case MVT::ppcf128: return "MVT::ppcf128";
64 case MVT::Flag: return "MVT::Flag";
65 case MVT::isVoid:return "MVT::isVoid";
66 case MVT::v2i8: return "MVT::v2i8";
67 case MVT::v4i8: return "MVT::v4i8";
68 case MVT::v8i8: return "MVT::v8i8";
69 case MVT::v16i8: return "MVT::v16i8";
70 case MVT::v32i8: return "MVT::v32i8";
71 case MVT::v2i16: return "MVT::v2i16";
72 case MVT::v4i16: return "MVT::v4i16";
73 case MVT::v8i16: return "MVT::v8i16";
74 case MVT::v16i16: return "MVT::v16i16";
75 case MVT::v2i32: return "MVT::v2i32";
76 case MVT::v4i32: return "MVT::v4i32";
77 case MVT::v8i32: return "MVT::v8i32";
78 case MVT::v1i64: return "MVT::v1i64";
79 case MVT::v2i64: return "MVT::v2i64";
80 case MVT::v4i64: return "MVT::v4i64";
81 case MVT::v2f32: return "MVT::v2f32";
82 case MVT::v4f32: return "MVT::v4f32";
83 case MVT::v8f32: return "MVT::v8f32";
84 case MVT::v2f64: return "MVT::v2f64";
85 case MVT::v4f64: return "MVT::v4f64";
86 case MVT::Metadata: return "MVT::Metadata";
87 case MVT::iPTR: return "MVT::iPTR";
88 case MVT::iPTRAny: return "MVT::iPTRAny";
89 default: assert(0 && "ILLEGAL VALUE TYPE!"); return "";
93 /// getQualifiedName - Return the name of the specified record, with a
94 /// namespace qualifier if the record contains one.
96 std::string llvm::getQualifiedName(const Record *R) {
97 std::string Namespace = R->getValueAsString("Namespace");
98 if (Namespace.empty()) return R->getName();
99 return Namespace + "::" + R->getName();
105 /// getTarget - Return the current instance of the Target class.
107 CodeGenTarget::CodeGenTarget() {
108 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target");
109 if (Targets.size() == 0)
110 throw std::string("ERROR: No 'Target' subclasses defined!");
111 if (Targets.size() != 1)
112 throw std::string("ERROR: Multiple subclasses of Target defined!");
113 TargetRec = Targets[0];
117 const std::string &CodeGenTarget::getName() const {
118 return TargetRec->getName();
121 std::string CodeGenTarget::getInstNamespace() const {
124 for (inst_iterator i = inst_begin(), e = inst_end(); i != e; ++i) {
125 InstNS = i->second.Namespace;
127 // Make sure not to pick up "TargetInstrInfo" by accidentally getting
128 // the namespace off the PHI instruction or something.
129 if (InstNS != "TargetInstrInfo")
136 Record *CodeGenTarget::getInstructionSet() const {
137 return TargetRec->getValueAsDef("InstructionSet");
140 /// getAsmParser - Return the AssemblyParser definition for this target.
142 Record *CodeGenTarget::getAsmParser() const {
143 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyParsers");
144 if (AsmParserNum >= LI.size())
145 throw "Target does not have an AsmParser #" + utostr(AsmParserNum) + "!";
146 return LI[AsmParserNum];
149 /// getAsmWriter - Return the AssemblyWriter definition for this target.
151 Record *CodeGenTarget::getAsmWriter() const {
152 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters");
153 if (AsmWriterNum >= LI.size())
154 throw "Target does not have an AsmWriter #" + utostr(AsmWriterNum) + "!";
155 return LI[AsmWriterNum];
158 void CodeGenTarget::ReadRegisters() const {
159 std::vector<Record*> Regs = Records.getAllDerivedDefinitions("Register");
161 throw std::string("No 'Register' subclasses defined!");
163 Registers.reserve(Regs.size());
164 Registers.assign(Regs.begin(), Regs.end());
167 CodeGenRegister::CodeGenRegister(Record *R) : TheDef(R) {
168 DeclaredSpillSize = R->getValueAsInt("SpillSize");
169 DeclaredSpillAlignment = R->getValueAsInt("SpillAlignment");
172 const std::string &CodeGenRegister::getName() const {
173 return TheDef->getName();
176 void CodeGenTarget::ReadRegisterClasses() const {
177 std::vector<Record*> RegClasses =
178 Records.getAllDerivedDefinitions("RegisterClass");
179 if (RegClasses.empty())
180 throw std::string("No 'RegisterClass' subclasses defined!");
182 RegisterClasses.reserve(RegClasses.size());
183 RegisterClasses.assign(RegClasses.begin(), RegClasses.end());
186 std::vector<unsigned char> CodeGenTarget::getRegisterVTs(Record *R) const {
187 std::vector<unsigned char> Result;
188 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
189 for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
190 const CodeGenRegisterClass &RC = RegisterClasses[i];
191 for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) {
192 if (R == RC.Elements[ei]) {
193 const std::vector<MVT::SimpleValueType> &InVTs = RC.getValueTypes();
194 for (unsigned i = 0, e = InVTs.size(); i != e; ++i)
195 Result.push_back(InVTs[i]);
203 CodeGenRegisterClass::CodeGenRegisterClass(Record *R) : TheDef(R) {
204 // Rename anonymous register classes.
205 if (R->getName().size() > 9 && R->getName()[9] == '.') {
206 static unsigned AnonCounter = 0;
207 R->setName("AnonRegClass_"+utostr(AnonCounter++));
210 std::vector<Record*> TypeList = R->getValueAsListOfDefs("RegTypes");
211 for (unsigned i = 0, e = TypeList.size(); i != e; ++i) {
212 Record *Type = TypeList[i];
213 if (!Type->isSubClassOf("ValueType"))
214 throw "RegTypes list member '" + Type->getName() +
215 "' does not derive from the ValueType class!";
216 VTs.push_back(getValueType(Type));
218 assert(!VTs.empty() && "RegisterClass must contain at least one ValueType!");
220 std::vector<Record*> RegList = R->getValueAsListOfDefs("MemberList");
221 for (unsigned i = 0, e = RegList.size(); i != e; ++i) {
222 Record *Reg = RegList[i];
223 if (!Reg->isSubClassOf("Register"))
224 throw "Register Class member '" + Reg->getName() +
225 "' does not derive from the Register class!";
226 Elements.push_back(Reg);
229 std::vector<Record*> SubRegClassList =
230 R->getValueAsListOfDefs("SubRegClassList");
231 for (unsigned i = 0, e = SubRegClassList.size(); i != e; ++i) {
232 Record *SubRegClass = SubRegClassList[i];
233 if (!SubRegClass->isSubClassOf("RegisterClass"))
234 throw "Register Class member '" + SubRegClass->getName() +
235 "' does not derive from the RegisterClass class!";
236 SubRegClasses.push_back(SubRegClass);
239 // Allow targets to override the size in bits of the RegisterClass.
240 unsigned Size = R->getValueAsInt("Size");
242 Namespace = R->getValueAsString("Namespace");
243 SpillSize = Size ? Size : MVT(VTs[0]).getSizeInBits();
244 SpillAlignment = R->getValueAsInt("Alignment");
245 CopyCost = R->getValueAsInt("CopyCost");
246 MethodBodies = R->getValueAsCode("MethodBodies");
247 MethodProtos = R->getValueAsCode("MethodProtos");
250 const std::string &CodeGenRegisterClass::getName() const {
251 return TheDef->getName();
254 void CodeGenTarget::ReadLegalValueTypes() const {
255 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
256 for (unsigned i = 0, e = RCs.size(); i != e; ++i)
257 for (unsigned ri = 0, re = RCs[i].VTs.size(); ri != re; ++ri)
258 LegalValueTypes.push_back(RCs[i].VTs[ri]);
260 // Remove duplicates.
261 std::sort(LegalValueTypes.begin(), LegalValueTypes.end());
262 LegalValueTypes.erase(std::unique(LegalValueTypes.begin(),
263 LegalValueTypes.end()),
264 LegalValueTypes.end());
268 void CodeGenTarget::ReadInstructions() const {
269 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
270 if (Insts.size() <= 2)
271 throw std::string("No 'Instruction' subclasses defined!");
273 // Parse the instructions defined in the .td file.
274 std::string InstFormatName =
275 getAsmWriter()->getValueAsString("InstFormatName");
277 for (unsigned i = 0, e = Insts.size(); i != e; ++i) {
278 std::string AsmStr = Insts[i]->getValueAsString(InstFormatName);
279 Instructions.insert(std::make_pair(Insts[i]->getName(),
280 CodeGenInstruction(Insts[i], AsmStr)));
284 /// getInstructionsByEnumValue - Return all of the instructions defined by the
285 /// target, ordered by their enum value.
287 getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
288 &NumberedInstructions) {
289 std::map<std::string, CodeGenInstruction>::const_iterator I;
290 I = getInstructions().find("PHI");
291 if (I == Instructions.end()) throw "Could not find 'PHI' instruction!";
292 const CodeGenInstruction *PHI = &I->second;
294 I = getInstructions().find("INLINEASM");
295 if (I == Instructions.end()) throw "Could not find 'INLINEASM' instruction!";
296 const CodeGenInstruction *INLINEASM = &I->second;
298 I = getInstructions().find("DBG_LABEL");
299 if (I == Instructions.end()) throw "Could not find 'DBG_LABEL' instruction!";
300 const CodeGenInstruction *DBG_LABEL = &I->second;
302 I = getInstructions().find("EH_LABEL");
303 if (I == Instructions.end()) throw "Could not find 'EH_LABEL' instruction!";
304 const CodeGenInstruction *EH_LABEL = &I->second;
306 I = getInstructions().find("GC_LABEL");
307 if (I == Instructions.end()) throw "Could not find 'GC_LABEL' instruction!";
308 const CodeGenInstruction *GC_LABEL = &I->second;
310 I = getInstructions().find("DECLARE");
311 if (I == Instructions.end()) throw "Could not find 'DECLARE' instruction!";
312 const CodeGenInstruction *DECLARE = &I->second;
314 I = getInstructions().find("EXTRACT_SUBREG");
315 if (I == Instructions.end())
316 throw "Could not find 'EXTRACT_SUBREG' instruction!";
317 const CodeGenInstruction *EXTRACT_SUBREG = &I->second;
319 I = getInstructions().find("INSERT_SUBREG");
320 if (I == Instructions.end())
321 throw "Could not find 'INSERT_SUBREG' instruction!";
322 const CodeGenInstruction *INSERT_SUBREG = &I->second;
324 I = getInstructions().find("IMPLICIT_DEF");
325 if (I == Instructions.end())
326 throw "Could not find 'IMPLICIT_DEF' instruction!";
327 const CodeGenInstruction *IMPLICIT_DEF = &I->second;
329 I = getInstructions().find("SUBREG_TO_REG");
330 if (I == Instructions.end())
331 throw "Could not find 'SUBREG_TO_REG' instruction!";
332 const CodeGenInstruction *SUBREG_TO_REG = &I->second;
334 I = getInstructions().find("COPY_TO_REGCLASS");
335 if (I == Instructions.end())
336 throw "Could not find 'COPY_TO_REGCLASS' instruction!";
337 const CodeGenInstruction *COPY_TO_REGCLASS = &I->second;
339 // Print out the rest of the instructions now.
340 NumberedInstructions.push_back(PHI);
341 NumberedInstructions.push_back(INLINEASM);
342 NumberedInstructions.push_back(DBG_LABEL);
343 NumberedInstructions.push_back(EH_LABEL);
344 NumberedInstructions.push_back(GC_LABEL);
345 NumberedInstructions.push_back(DECLARE);
346 NumberedInstructions.push_back(EXTRACT_SUBREG);
347 NumberedInstructions.push_back(INSERT_SUBREG);
348 NumberedInstructions.push_back(IMPLICIT_DEF);
349 NumberedInstructions.push_back(SUBREG_TO_REG);
350 NumberedInstructions.push_back(COPY_TO_REGCLASS);
351 for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II)
352 if (&II->second != PHI &&
353 &II->second != INLINEASM &&
354 &II->second != DBG_LABEL &&
355 &II->second != EH_LABEL &&
356 &II->second != GC_LABEL &&
357 &II->second != DECLARE &&
358 &II->second != EXTRACT_SUBREG &&
359 &II->second != INSERT_SUBREG &&
360 &II->second != IMPLICIT_DEF &&
361 &II->second != SUBREG_TO_REG &&
362 &II->second != COPY_TO_REGCLASS)
363 NumberedInstructions.push_back(&II->second);
367 /// isLittleEndianEncoding - Return whether this target encodes its instruction
368 /// in little-endian format, i.e. bits laid out in the order [0..n]
370 bool CodeGenTarget::isLittleEndianEncoding() const {
371 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding");
374 //===----------------------------------------------------------------------===//
375 // ComplexPattern implementation
377 ComplexPattern::ComplexPattern(Record *R) {
378 Ty = ::getValueType(R->getValueAsDef("Ty"));
379 NumOperands = R->getValueAsInt("NumOperands");
380 SelectFunc = R->getValueAsString("SelectFunc");
381 RootNodes = R->getValueAsListOfDefs("RootNodes");
383 // Parse the properties.
385 std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties");
386 for (unsigned i = 0, e = PropList.size(); i != e; ++i)
387 if (PropList[i]->getName() == "SDNPHasChain") {
388 Properties |= 1 << SDNPHasChain;
389 } else if (PropList[i]->getName() == "SDNPOptInFlag") {
390 Properties |= 1 << SDNPOptInFlag;
391 } else if (PropList[i]->getName() == "SDNPMayStore") {
392 Properties |= 1 << SDNPMayStore;
393 } else if (PropList[i]->getName() == "SDNPMayLoad") {
394 Properties |= 1 << SDNPMayLoad;
395 } else if (PropList[i]->getName() == "SDNPSideEffect") {
396 Properties |= 1 << SDNPSideEffect;
397 } else if (PropList[i]->getName() == "SDNPMemOperand") {
398 Properties |= 1 << SDNPMemOperand;
400 errs() << "Unsupported SD Node property '" << PropList[i]->getName()
401 << "' on ComplexPattern '" << R->getName() << "'!\n";
405 // Parse the attributes.
407 PropList = R->getValueAsListOfDefs("Attributes");
408 for (unsigned i = 0, e = PropList.size(); i != e; ++i)
409 if (PropList[i]->getName() == "CPAttrParentAsRoot") {
410 Attributes |= 1 << CPAttrParentAsRoot;
412 errs() << "Unsupported pattern attribute '" << PropList[i]->getName()
413 << "' on ComplexPattern '" << R->getName() << "'!\n";
418 //===----------------------------------------------------------------------===//
419 // CodeGenIntrinsic Implementation
420 //===----------------------------------------------------------------------===//
422 std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC,
424 std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic");
426 std::vector<CodeGenIntrinsic> Result;
428 for (unsigned i = 0, e = I.size(); i != e; ++i) {
429 bool isTarget = I[i]->getValueAsBit("isTarget");
430 if (isTarget == TargetOnly)
431 Result.push_back(CodeGenIntrinsic(I[i]));
436 CodeGenIntrinsic::CodeGenIntrinsic(Record *R) {
438 std::string DefName = R->getName();
440 isOverloaded = false;
441 isCommutative = false;
443 if (DefName.size() <= 4 ||
444 std::string(DefName.begin(), DefName.begin() + 4) != "int_")
445 throw "Intrinsic '" + DefName + "' does not start with 'int_'!";
447 EnumName = std::string(DefName.begin()+4, DefName.end());
449 if (R->getValue("GCCBuiltinName")) // Ignore a missing GCCBuiltinName field.
450 GCCBuiltinName = R->getValueAsString("GCCBuiltinName");
452 TargetPrefix = R->getValueAsString("TargetPrefix");
453 Name = R->getValueAsString("LLVMName");
456 // If an explicit name isn't specified, derive one from the DefName.
459 for (unsigned i = 0, e = EnumName.size(); i != e; ++i)
460 Name += (EnumName[i] == '_') ? '.' : EnumName[i];
462 // Verify it starts with "llvm.".
463 if (Name.size() <= 5 ||
464 std::string(Name.begin(), Name.begin() + 5) != "llvm.")
465 throw "Intrinsic '" + DefName + "'s name does not start with 'llvm.'!";
468 // If TargetPrefix is specified, make sure that Name starts with
469 // "llvm.<targetprefix>.".
470 if (!TargetPrefix.empty()) {
471 if (Name.size() < 6+TargetPrefix.size() ||
472 std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size())
473 != (TargetPrefix + "."))
474 throw "Intrinsic '" + DefName + "' does not start with 'llvm." +
475 TargetPrefix + ".'!";
478 // Parse the list of return types.
479 std::vector<MVT::SimpleValueType> OverloadedVTs;
480 ListInit *TypeList = R->getValueAsListInit("RetTypes");
481 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
482 Record *TyEl = TypeList->getElementAsRecord(i);
483 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
484 MVT::SimpleValueType VT;
485 if (TyEl->isSubClassOf("LLVMMatchType")) {
486 unsigned MatchTy = TyEl->getValueAsInt("Number");
487 assert(MatchTy < OverloadedVTs.size() &&
488 "Invalid matching number!");
489 VT = OverloadedVTs[MatchTy];
490 // It only makes sense to use the extended and truncated vector element
491 // variants with iAny types; otherwise, if the intrinsic is not
492 // overloaded, all the types can be specified directly.
493 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") &&
494 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) ||
495 VT == MVT::iAny) && "Expected iAny type");
497 VT = getValueType(TyEl->getValueAsDef("VT"));
499 if (VT == MVT::iAny || VT == MVT::fAny || VT == MVT::iPTRAny) {
500 OverloadedVTs.push_back(VT);
501 isOverloaded |= true;
503 IS.RetVTs.push_back(VT);
504 IS.RetTypeDefs.push_back(TyEl);
507 if (IS.RetVTs.size() == 0)
508 throw "Intrinsic '"+DefName+"' needs at least a type for the ret value!";
510 // Parse the list of parameter types.
511 TypeList = R->getValueAsListInit("ParamTypes");
512 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
513 Record *TyEl = TypeList->getElementAsRecord(i);
514 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
515 MVT::SimpleValueType VT;
516 if (TyEl->isSubClassOf("LLVMMatchType")) {
517 unsigned MatchTy = TyEl->getValueAsInt("Number");
518 assert(MatchTy < OverloadedVTs.size() &&
519 "Invalid matching number!");
520 VT = OverloadedVTs[MatchTy];
521 // It only makes sense to use the extended and truncated vector element
522 // variants with iAny types; otherwise, if the intrinsic is not
523 // overloaded, all the types can be specified directly.
524 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") &&
525 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) ||
526 VT == MVT::iAny) && "Expected iAny type");
528 VT = getValueType(TyEl->getValueAsDef("VT"));
529 if (VT == MVT::iAny || VT == MVT::fAny || VT == MVT::iPTRAny) {
530 OverloadedVTs.push_back(VT);
531 isOverloaded |= true;
533 IS.ParamVTs.push_back(VT);
534 IS.ParamTypeDefs.push_back(TyEl);
537 // Parse the intrinsic properties.
538 ListInit *PropList = R->getValueAsListInit("Properties");
539 for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) {
540 Record *Property = PropList->getElementAsRecord(i);
541 assert(Property->isSubClassOf("IntrinsicProperty") &&
542 "Expected a property!");
544 if (Property->getName() == "IntrNoMem")
546 else if (Property->getName() == "IntrReadArgMem")
548 else if (Property->getName() == "IntrReadMem")
550 else if (Property->getName() == "IntrWriteArgMem")
551 ModRef = WriteArgMem;
552 else if (Property->getName() == "IntrWriteMem")
554 else if (Property->getName() == "Commutative")
555 isCommutative = true;
556 else if (Property->isSubClassOf("NoCapture")) {
557 unsigned ArgNo = Property->getValueAsInt("ArgNo");
558 ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture));
560 assert(0 && "Unknown property!");